Displays Controlled by MIM Switches of Small Capacitance

This invention relates to field effect display panels, specifically to such panels matrix multiplexed to a high level.

In a matrix multiplexed addressing scheme for a display panel, a series of scan pulses V.sub.s is, for example, applied sequentially to each of a series of row conductors, (scan lines), while a series of data pulses V.sub.d is applied to selected ones of a series of column conductors, (data lines). To turn on a picture element (pel), at a selected row and column intersection, the difference between V.sub.s and V.sub.d applied to the selected row and column respectively, is made great enough to locally alter the optical characteristics of an intervening field effect liquid, for example, a liquid crystal (LC) or electrophoretic medium.

Several factors combine to limit the number of lines that can be multiplexed in a field effect display such as a LC display.

Firstly, at the instant a pel is selected, other, non-selected pels in the selected column also experience a pulse V.sub.d. For one address period, the rms voltage experienced by these pels is insufficient to turn them on, but if N pels in a column are switched on and off in a single field scan, a non-selected pel in that column will experience V.sub.d for N address periods. This may be enough to turn the non-selected pel on. It can be shown that the ratio of rms voltage experienced by a selected pel to that experienced by a non-selected pel is: ##EQU1## As N increases, the ratio becomes smaller and, since field effect materials such as LC's do not have a sharp threshold distinguishing on from off, the contrast ratio between selected and non-selected pels becomes poorer. At a certain number of row conductors, the contrast ratio becomes unacceptable.

This problem is compounded for LC displays which have a narrow viewing angle. Also, since the electro-optic response of field effect materials is generally temperature dependent, then if a pel is to be off at V.sub.non-select at high temperature, and on at V.sub.select at low temperature, the difference between V.sub.non-select and V.sub.select must be greater than for constant temperature operation. For the above reasons, the known level of multiplexing displays is limited.

This problem can be alleviated by placing a controlling switch in series with each pel at the intersections of scan and data lines. In use, pulses V.sub.d do not activate the switch pel combination whereas a selection pulses V.sub.s +V.sub.d do activate the switch whereupon the field effect material experiences voltage. In the case of LC's, such a switch should be symmetrical with respect to zero voltage since, for the purpose of preventing irreversible electro-chemical degradation of a LC, net dc bias should be avoided.

In its broadest aspect, the invention proposes the use of a thin film, metal-insulator-metal (MIM) device as a matrix display switch. MIM devices function by tunnelling or trap depth modulation. In the former, carriers pass through a thin insulator by field enhanced quantum mechanical tunnelling. In the latter, carriers are released from traps in the insulator as the field developed between flanking metal layers diminishes the potential barrier to current flow. Such devices are known which exhibit, in a switching regime, an increase of from 500 to 10,000 times the original current passed for a doubling of voltage. This turn-on is sufficiently sharp that for display purposes the number of multiplexed lines, compared to the number achieved when no switches are used, can be increased by at least a factor of 8. If, on the other hand, the number of multiplexed lines is maintained, then using MIM switches, a greatly increased viewing angle, contrast ratio and permitted temperature range can be obtained.

Thin film MIM switches may have insulators such as aluminum oxide, tantalum pentoxide, silicon nitride, silicon dioxide, and zinc oxide. The thickness of the dielectric layer determines the conduction process. Below 50-100 Angstrom units, electron tunnelling is possible; from 100 to 1000 Angstrom units, trap depth modulation conduction processes dominate. The metal of the MIM switch may be any material which forms an ohmic or weakly blocking contact.

Embodiments of the invention will now be described by way of example with reference to the accompanying drawings in which:

FIG. 1 shows in schematic form a matrix multiplexed addressing scheme for a field effect display;

FIG. 2 is a part-perspective, part-sectional view, not to scale of a part of a MIM switch controlled LCD using one form of MIM switch;

FIG. 3 shows in schematic form a LC pel controlled by a MIM switch configuration relatively independent of current polarity;

FIG. 4 shows in schematic form an alternative MIM switch for obtaining relative independence from current polarity;

FIG. 5 is a part-perspective, part-sectional view, not to scale of the MIM switch controlled LCD of FIG. 3;

FIG. 6 shows in circuit schematic form of a MIM switch controlled LC pel;

FIG. 7 shows in circuit schematic form an alternative to the MIM switch controlled LC pel of FIG. 6;

FIG. 8 shows a production process sequence for making a practical display embodying the MIM switch controlled pel of FIG. 7; and

FIG. 9 shows in cross-section a buried MIM switch embodiment of the invention.

In a conventional matrix multiplexed addressing scheme for a liquid crystal display (LCD) as shown at bottom left in FIG. 1, a series of scan pulses V.sub.s are applied successively to row conductors 10 (scan lines), while a series of data pulses V.sub.d are applied to selected ones of a series of column conductors 12 (data lines). To turn on a LC pel 14 at a selected row and column intersection, the electric field produced by applying voltages V.sub.s and V.sub.d to the selected row and column respectively, is made great enough to locally change the optical characteristics of intervening LC and thus the transmissivity of the LCD in a manner known in the art.

As previously explained, since LC's do not have a sharp threshold distinguishing on from off, then a pel may turn on even though not specifically addressed because it experiences data pulses V.sub.d driving selected pels in the same column.

As shown at top right in FIG. 1, the invention proposes a LCD having a thin film MIM switch 16 in series with each LC pel 14.

Referring to FIG. 2, the LCD comprises a pair of glass plates 18, 20 with a layer of twisted nematic LC 22 sealed between them. The glass plates are polarizing plates having axes of polarization perpendicular to one another. The inner surfaces of the plates 18, 20 are treated in a manner known in the art so that in the absence of an applied electric field, LC molecules adjacent the two plates line up with the axis of polarization. The longitudinal axes of the LC molecules twist through a right angle across the thickness of the LC. By applying a voltage across selected regions of the LC layer, the LC can be caused to undergo localized molecular reorientation light passing into the LCD through one plate is polarized and then, at the other plate, is extinguished, the applied voltage thus reducing the optical transmissivity of the LCD. The pels are defined by a row-column array of indium tin oxide transparent electrodes 24 on the inside surface of plate 18 and by a corresponding array of transparent electrodes 24 on the inside surface of plate 20. A dedicated MIM switch is situated adjacent electrode 24 of each pel 14 on the plate 18.

To fabricate the MIM switches on the inside surface of plate 18, a thin film 26 of tantalum is sputter deposited and then thermally oxidized at 475.degree. C. for 16 hours to protect the glass from subsequent etch steps. A second layer of tantalum is then sputter deposited and photodefined into row conductors 10 from 2 to 25 mils wide and running the breadth of plate 18. The conductors 10, parts of which function as terminals of the MIM switches may be locally reduced to 0.5 mils wide at active areas of the switches. The conductors are subsequently anodized in a weak citric acid solution with an anodizing voltage of 25-60 V to produce surface layers 28 of tantalum pentoxide which act as the insulators of the MIM switches. I-V characteristics of the MIM switches can be adjusted by performing the Ta sputter deposition in a nitrogen atmosphere of appropriate concentration.

Cross conductors 30 are then deposited over the tantalum pentoxide layers as distinct NiCr:Au regions 30 from 0.5 to 5.0 mils wide. Each region 30 overlies and electrically contacts an electrode 24. The active area of each MIM switch, typically 1.0 mil.sup.2, is the region of overlay of a layer 28 and a region 30. Each MIM switch is thus series connected between one of the electrodes 24 and a tantalum conductor 10. The display is fabricated by sealing a twisted nematic liquid crystal layer between the glass plates 18 and 20 processed as described above. The electrodes 24 common to a particular column on the glass plate 20 are electrically connected by thin film conducting leads 32 which enable pulses to be selectively applied to LC pels 14 by applying data and scanning pulses V.sub.d and V.sub.s to the appropriate row conductors 10 on plate 18 and column conductors 32 on plate 20.

Other examples of MIM switch have insulators of tantalum oxynitride, aluminum oxide, silicon nitride, silicon dioxide, silicon oxynitride, silicon monoxide, and zinc oxide. Generally oxides of the valve metals make passable MIM switch insulators. Other examples of metallization are aluminum and chromium. The important performance characteristics of such switches are that they be prepared as thin film devices and that they function as a switch by virtue of field enhanced quantum mechanical tunnelling or trap depth modulation mentioned previously. Thus, in an alternative embodiment of the invention, the "metal" at one face of the MIM switch is conducting indium tin oxide which has the advantage of being inherently transparent and so does not significantly attenuate light transmitted through it. To take advantage of this property, another embodiment (not shown) uses a single thin film indium tin oxide region to function both as the LC electrode and one "metal" layer of the MIM switch. Other materials used in MIM switches, for example, NiCr+Au, which are effectively transparent when of the order only of a few tens of Angstrom units in thickness, can also be used as combined pel electrode and MIM switch metallization.

The particular thin film technique, (sputtering, chemical vapour deposition, vacuum evaporation, or anodization) used in the formation of MIM switch layers is chosen to be compatibile both with the material being formed and the glass substrate material. However anodization appears currently to be the simplest, least costly and most effective process for forming MIM switch insulators.

To achieve long lifetime from LC displays the LC should not experience any net d.c. bias. For this reason the polarity of the drive pulse is usually periodically reversed. In the MIM switch controlled LCD however the voltage pulse experienced by a LC pel is modified by the electrical response of the MIM switch. If the I-V characteristic of the individual MIM switches are not symmetric with respect to polarity then non-polar configurations of pairs of MIM switches may be fabricated instead at each pel site.

Two non-polar configurations of MIM switch pairs are shown schematically in FIGS. 3 and 4, the diode representations of the MIM switches 16 being indicative of the asymmetry in the I-V characteristic of each MIM. In the FIG. 3 embodiment the I-V characteristic derives from the less conductive branch, while in the FIG. 4 embodiment the I-V characteristic derives from the more conductive branch. Various fabrication sequences can be readily derived from the previous description and one example for the FIG. 3 embodiment, is described in detail with reference to FIG. 5.

Referring in detail to FIG. 5, on the inside surface of glass plate 18 forming one flanking plate of a LCD, a thin film layer 26 of etch protectant is formed as described for the previous embodiment. A thin film of tantalum is then formed over the etch protectant and is photo-etched to produce regions 34 which are anodized to form surface layers 36 of tantalum pentoxide. A thin film layer of NiCr:Au is next formed on the substrate. From this layer, two pads 38a and 38b are photodefined on each region 34 to produce a structure equivalent to a pair of back-to-back MIM switches. Leads 40a and 40b are simultaneously and integrally formed with the pads 38. Each of the leads 40a extends between one of the regions 38a and the electrode 24 of that pel controlled by the MIM switch. Each of the leads 40b interconnects the pads 38 of those MIM switches in a particular column. As described with reference to the FIG. 2 embodiment, the number of process steps in the manufacture of the FIG. 5 LCD is reduced if pads 38, leads 40 and electrodes 24 on plate 18 are formed at the same time, as, for example, a transparent thin film of indium tin oxide.

In the FIGS. 3 and 4 embodiments the switch characteristics tend not to depend on current polarity since the device is symmetrical. In both cases, current experiences both a MIM switch and its inverted structure MIM switch.

Using MIM switches at matrix crosspoints, high level multiplexing of a matrix addressed array of LCD pels can be obtained with high contrast between selected and non-selected elements, and without the problem of greatly limited operating temperature ranges. MIM switches may be used both in transmissive and reflective displays. In the former case the MIM switch though it may be opaque is sufficiently small compared with the pel size that very little light is intercepted by the MIM switch when the LC is in its transmissive state.

Since the thin film MIM switches are only of the order of 1 micron thick, their presence on the transparent plate flanking the LC does not prevent the use of a correspondingly thin layer of LC as would thick film devices. In turn, and assuming the resistivity of the LC is very high, of the order of 10.sup.10 ohm-cm., then the charge through the MIM switches is limited by the LC resistance. Coupled with the fact that MIM switches used show their switching characteristics at very low currents, of the order of 10 microamps it will be appreciated that the MIM switches can be operated in a very low current regime which reduces the chance of their failing through excess heat dissipation. In the intended application to a large area (up to 9".times.9"), high pel density (pel area less than 25 mil square) display, fabrication of the MIM switches offers significant cost benefits over thin film transistor switches since fabrication techniques for the latter are more complex and are characterized by poor yield. In addition, the fabrication techniques proposed are preferred to silicon IC techniques, again, because of cost and further because glass substrates can be readily obtained which are substantially larger in area, and considerably flatter than the largest available silicon wafers.

The deposition order described for the FIGS. 2 and 5 embodiments is as follows:

1. Etch stop deposition--Ta.sub.2 O.sub.5 on soda lime glass substrate.

2. Ta deposited, photodefined and anodized.

3. NiCr:Au crossover layer deposited and photodefined.

4. Transparent pel electrode deposited.

Processing however is not confined to this particular order. If dry etching techniques are used, no etch stop layer need be deposited. Other possible processing sequences are listed briefly below.

A. Ta deposition--anodization--crossover deposition--pel electrode deposition.

B. Pel electrode deposition--Ta deposition--anodization--crossover deposition.

C. Ta deposition--pel electrode deposition--anodization--crossover deposition.

D. Ta deposition--anodization--pel electrode and crossover deposition (one step).

Also as indicated previously although currently it is found convenient to deposit MIM switch and addressing leads in an operation distinct from pel electrode deposition, the LC pel and its series connected MIM switch can have their common terminal deposited as a homogeneous transparent conducting layer, thereby reducing the number of processing steps.

Although not illustrated, MIM switches can be series connected to both electrodes of each pel, each pel thus having an associated thin film fabricated MIM switch on each of the plates 18 and 20. Alternatively there may be some advantage in fabricating a display with some MIM switches on one glass plate and other MIM switches on the other glass plate. When using opaque MIM switches for example, such an embodiment has the advantage of maximizing the area of each plate which can be devoted to pel electrode formation. Moreover from a production viewpoint the two glass plates flanking the LC can be processed identically.

Considering operation of the LCD illustrated in FIG. 2, a circuit equivalent of a liquid crystal pel 14 and its series connected MIM switch 16 is shown in FIG. 6. The liquid crystal pel 14 is represented as a resistance R.sub.p in parallel with a capacitance C.sub.p and the MIM switch is represented as a variable resistance R.sub.s in parallel with a capacitance C.sub.s. The cell is driven by a voltage V=V.sub.s +V.sub.p where V.sub.s is the voltage across the switch and V.sub.p is the voltage across the pel.

In time division multiplexing, the addressing period for each of N scan lines is T/N, where T is the total frame time. During this period (T/N<< for large N) selected pels are addressed with the full V.sub.s +V.sub.d voltage. For the remainder of the frame, the "relaxation period", they see only the .+-.V.sub.d data pulses applied to the other lines. The LC pel capacitance, C.sub.p, must be charged through the MIM non-linear resistance R.sub.s. In the voltage regime under consideration, R.sub.s is designed to be small for the selected pels and large for unselected pels. During the relaxation period the LC pel begins to discharge both through its own internal resistance R.sub.p and to the now parasitic capacitance C.sub.s of the MIM. In order to maintain as high an RMS voltage on the selected LC pel as possible, R.sub.p must be large and C.sub.s <<C.sub.p. If C.sub.c is not small compared to C.sub.p, the voltage division effect of the capacitors greatly reduces the effective voltage on the LC.

For flat plate capacitors of which the pel and the MIM switch are more-or-less examples:

where A is the area and l is the spacing of the plates. The twisted nematic LC thickness is typically 10 microns and the thin film tantalum pentoxide insulator is typically 0.05 microns. Since the dielectric constants are similar, then if (A/l).sub.p is to be very much greater than (A/l).sub.s, then A.sub.p /10 is >>A.sub.s /0.05. or A.sub.p >>200A.sub.s.

In order that the switch operates before its series connected pel and, more importantly, before unselected pels in the same column as the selected pel, the area of the MIM switch must be very much smaller than the area of the LC pel. This area is typically 1/1600 of the pel area.

As an alternative to regulating the relative areas of the pel and its controlling MIM switch, extra capacitance C.sub.E can be introduced in parallel with the LC capacitance C.sub.p as shown schematically in FIG. 7. This arrangement is preferable particularly when the size of MIM switches needed to preserve the capacitance relationship discussed previously is approaching the limits of photolithographic resolution.

Following, several production sequences for practically realizing the FIG. 7 embodiment are described.

In a first method the dielectic of capacitor C.sub.E is Ta.sub.2 O.sub.5 which has a high capacitance density so ensuring that capacitors C.sub.E occupy small areas of substrate and so do not materially reduce the substrate area available for pel electrodes.

In addition to a MIM Ta line 46, a second C.sub.E line 48 is deposited parallel to each MIM line, (FIG. 8a). Using a mask, unshaded areas including regions 50, 52 are anodized, (FIG. 8b). If anodized separately, the C.sub.E oxide 52 may be made of thickness different from that of the MIM oxide 50. The C.sub.E tantalum interconnects are then etched away to leave the anodized oxide region 52 and a contact pad 54 (FIG. 8c). Additional dielectric is then deposited at regions 56 followed by top contact metallization regions 58 for the MIM switch and regions 60 connected to leads 62 for the capacitor C.sub.E. The C.sub.E is connected into the pel circuit on subsequent deposition of the pel electrode 24 (FIG. 8e) and, after LCD packaging, by externally connecting the leads 62 to column electrodes 32 on the opposite plate 20 of the LCD. The dielectric region 56 is not required if capacitive crosstalk or leakage is small.

Although not specifically illustrated, the process step of anodizing through a mask can be avoided by depositing a layer of dielectric to function as the C.sub.E insulator at the same time as crossover isolation regions are deposited. Readily available dielectrics are of relatively low dielectric constant so large capacitors are required which may detract from the space available for pel electrodes.

In contrast to the two previous embodiments a large storage capacitor C.sub.E can be buried under the pel electrode 24. However, particularly for twisted nematic LC displays, the capacitor C.sub.E must be transparent which somewhat limits the materials which can be used.

An advantage of the LCD-MIM switch combinations described previously is that the MIM switches are laterally offset from the LC pels 14 which they control. This means that the part of the LC layer 22 which undergoes a transmissivity change is located directly between the two glass plates 18 and 20 each of which is covered by a thin layer of oxidized tantalum and a thin film pel electrode 24. Thus the layer of liquid crystal 22 is nearly as flat as the surfaces of the underlying glass. Flatness if important is contrast variations are not to exist over the area of the pel. Such flatness is more difficult to achieve if the MIM switch and liquid crystal pel are superimposed as shown in FIG. 9.

As an alternative to the previous embodiments in which the MIM switch is offset from the pel electrode, the MIM switch 16 can be buried under the pel electrode 24. As illustrated in cross-section in FIG. 9, anodized tantalum regions 64 are overlain by interconnect metallization having contact pads 68. To keep the MIM switch area small compared to LC pel area, a pel electrode 70 is deposited through a via in a thick dielectric layer 72 to provide a top contact 74 for the MIM switch 16. A wholly transparent display can be obtained by using In:Sn:O or Cd:Sn:O instead of tantalum as bottom layer 76 and then depositing the MIM dielectric 64.

Fabrication of the MIM switches using thin film technology is considered to be advantageous since deposition of thin films permits the use of a thin twisted nematic LC which has a very low switching voltage. The threshold voltages of the MIM switches can be made correspondingly low which contributes to the overall display panel, although having many densely located pels, being a relatively low power device which can be driven using CMOS logic.

The embodiments described have been in terms of a transmissive display using a twisted nematic LC extending between crossed polarizing glass plates.

However the display can be made reflective by siting a reflecting sheet on the far side of the LC from an illuminating source. The glass plates confining the LC are made polarizing by the deposition of a thin polarizing film thereon.

Although twisted nematic LC's are preferred for the reasons discussed above, many liquids which can be stimulated to produce an electrical field related change in optical characteristics can be used in a MIM switch controlled matrix display. Thus, for example, the twisted nematic LC could be replaced by a dyed nematic phase transition LC in which crossed polarizers are unnecessary. Other guest-host LC's which function on the basis of anisotropic absorption of light by dichroic dyes will be familiar to those in the LCD display art. In addition, the liquid layer need not be a LC at all but could be an electrophoretic medium operating by field related movement of colloidal pigment particles.