Current Comparator Circuit

The present invention relates mainly to a current comparator circuit suitable for use in various types of electronic apparatus, and particularly to a current comparator circuit capable of low power or low voltage driving.

Comparator circuits which have been used in various kinds of electronic apparatus perform a comparison mostly on the basis of voltage, in which voltage V.sub.S of a supplied input signal is compared with a reference voltage to obtain some detected voltage. In such a comparator circuit as to make a comparison on the basis of voltage, a power source voltage for obtaining the reference voltage requires something in addition to the voltage V.sub.S of the input signal. As a result, when the voltage V.sub.S of the input signal is large, the source voltage should be made high resulting in the increase of electric power. Therefore, there is a limit to low power or low voltage driving and high frequency driving.

It is an object of this invention to provide a current comparator circuit free from the above drawbacks with a simplified construction.

It is another object of this invention to provide a current comparator circuit which is suitable for low power or low voltage driving and high frequency driving.

According to the feature of this invention, a current comparator circuit is provided which includes an input signal current source, plural pairs each consisting of a diode and reference current source, and a plurality of transistors. In this circuit, each pair of diode and reference current source is connected to the input signal current source, and each transistor is connected to the connection point between the paired diode and reference current source so that a compared output can be obtained from the collector of the transistor.

The other objects, features and advantages of this invention will be apparent from the following description taken in conjunction with the accompanying drawings.

FIG. 1 is a connection diagram showing one embodiment of a current comparator circuit according to this invention;

FIGS. 2A through 2E are graphs used for explaining this invention;

FIGS. 3 to 9, inclusive, are connection diagrams each showing an example of a constant current source used in this invention;

FIGS. 10, 11, 12 and 14 are connection diagrams showing other embodiments of this invention;

FIGS. 13A and 13B are waveform diagrams used for explaining this invention; and

FIG. 15 is a connection diagram used for explaining this invention.

One embodiment of a current comparator circuit of this invention will hereinafter be described with reference to FIG. 1.

In a circuit of FIG. 1, an input signal current source 1 is provided with one end thereof being grounded. The other end of the input signal current source 1 is also grounded through a constant current source 2a of current i.sub.1 and also connected to the anode of a diode 2b. The cathode of the diode 2b is grounded through a constant current source 3a of current i.sub.2 and also connected to the anode of a diode 3b. Similarly, the cathode of the diode 3b is grounded through a constant current source 4a of current i.sub.3 and also connected to the anode of a diode 4b. The cathode of this diode 4b is then grounded through a constant current source 5a of current i.sub.4 and also connected to the anode of a diode 5b, the cathode of which is grounded. The connection point between constant current source 2a and diode 2b, the connection point between constant current source 3a and diode 3b, the connection point between constant current source 4a and diode 4b, and the connection point between constant current source 5a and diode 5b are respectively connected to the bases of npn-type transistors 2c, 3c, 4c and 5c, each forming a detector circuit. The emitters of these transistors 2c, 3c, 4c and 5c are grounded through resistors 2d, 3d, 4d and 5d, respectively, and the collectors thereof are connected to output terminals 2e, 3e, 4e and 5e, respectively. Reference currents i.sub.1, i.sub.2, i.sub.3 and i.sub.4 are respectively determined arbitrarily in accordance with detected currents. By way of example, these currents i.sub.1, i.sub.2, i.sub.3 and i.sub.4 can be selected to be the same in value.

With the above mentioned circuit arrangement of this invention, when a current i.sub.S, which increases with the lapse of time as shown in FIG. 2A, is supplied from the input signal current source 1, the base potentials of transistors 2c, 3c, 4c and 5c are varied as shown in FIGS. 2B, 2C, 2D and 2E, respectively, wherein V.sub.D represents a forward drop voltage across each diode. When the input current i.sub.S is smaller than i.sub.1, the current i.sub.S is all absorbed into the constant current source 2a so that the base potential of transistor 2c becomes zero to make the same nonconductive or OFF. In this case, the other transistors 3c, 4c and 5c are also all nonconductive because the bases thereof are applied with no voltage. Next, when the input current i.sub.S is increased and once exceeds the current i.sub.1, the current overflows and the overflowed current (i.sub.S -i.sub.1) flows through the diode 2b to the constant current source 3a. The potential at the connection point between the cathode of diode 2b and the constant current source 3a is clamped at zero potential, so that the base potential of the transistor 2c is clamped to the voltage V.sub.D thereby to make the transistor 2c conductive or ON. When the current (i.sub.S -i.sub.1) is smaller than the current i.sub. 2, this current is all absorbed into the constant current source 3a so that the base voltage of transistor 3c keeps zero to make it OFF. The transistors 4c and 5c are also supplied with no voltage so that they are nonconductive. Next, when the current (i.sub.S -i.sub.1) exceeds the current i.sub.2, the current overflows and this overflowed current (i.sub.S -i.sub.1 -i.sub.2) flows through the diode 3b to the constant current source 4a. The potential at the connection point between the cathode of diode 3b and the constant current source 4a is clamped to zero potential, so that the base potential of transistor 2c is clamped to 2V.sub.D as shown in FIG. 2B and also the base potential of transistor 3c is clamped to V.sub.D as shown in FIG. 2C with the result that the transistors 2c and 3c are turned ON. When the current (i.sub.S -i.sub.1 -i.sub.2) is smaller than the current i.sub.3, this current is all absorbed into the constant current source 4a so that the base potential of transistor 4c becomes zero to make it nonconductive. The transistor 5c is also nonconductive because no voltage is applied thereto. Next, when the current (i.sub.S -i.sub.1 -i.sub.2) exceeds the current i.sub.3, the current overflows and the overflowed current (i.sub.S -i.sub.1 -i.sub.2 -i.sub.3) flows through the diode 4b to the constant current source 5a. The potential at the connection point between the cathode of diode 4b and the constant current source 5a is clamped to zero potential, so that the base potentials of transistors 2c, 3c and 4c are respectively clamped to 3V.sub.D, 2V.sub.D and V.sub.D, as shown in FIGS. 2B, 2C and 2D to make them conductive. When the current (i.sub.S -i.sub.1 -i.sub.2 -i.sub.3) is smaller than the current i.sub.4, this current is all absorbed into the constant current source 5a so that the base potential of transistor 5c becomes zero to make it nonconductive. Next, when the current (i.sub.S -i.sub.1 -i.sub.2 -i.sub.3) exceeds the current i.sub.4, the current overflows and this overflowed current (i.sub.S -i.sub.1 -i.sub.2 -i.sub.3 -i.sub.4) flows through the diode 5b to the ground. In this case, since the cathode potential of diode 5b is zero, the base potentials of transistors 2c, 3c, 4c and 5c are respectively clamped to 4V.sub.D, 3V.sub.D, 2V.sub.D and V.sub.D as shown in FIGS. 2B, 2C, 2D and 2E to make these transistors conductive. Accordingly, the value of input signal current i.sub.S can be detected by the ON and OFF condition of the transistors 2c, 3c, 4c and 5c.

As described above, according to this invention, the input signal current i.sub.S is detected with the maximum input signal current being divided into a plurality of reference currents (i.sub.1 +i.sub.2 +i.sub.3 +i.sub.4). Therefore, even though the input signal current i.sub.S is large, only a small source voltage, such as several V.sub.D, is necessary for producing the reference currents. As a result, low power or low voltage driving and high frequency driving can be achieved.

As the constant current sources 2a, 3a, 4a and 5a in FIG. 1, there can be used those as shown in FIGS. 3 to 9, inclusive. In the example of FIG. 3, the emitter of a diode-connected pnp-type transistor D.sub.0 is connected to a DC voltage source terminal V.sub.CC, while the collector-base connecting point of the transistor D.sub.0 is grounded through a resistor R.sub.1 and also connected to the base of a pnp-type transistor Q.sub.A. The emitter of transistor Q.sub.A is connected to the voltage source terminal V.sub.CC and the collector thereof is connected to an output terminal 7a. Thus, a current mirror circuit is formed by the diode-connected transistor D.sub.0, the resistor R.sub.1 and the transistor Q.sub.A. In this case, if a current amplification factor according to the transistors D.sub.0 and Q.sub.A is taken as 1, and also a resistance value of the resistor R.sub.1 and a positive DC voltage applied to the terminal V.sub.CC are respectively taken as R.sub.1 and V.sub.CC for the sake of convenience, a constant current I.sub.R is given as follows: ##EQU1## where V.sub.BE is the base-emitter voltage of transistor Q.sub.A.

In the example of FIG. 4, the emitter of diode-connected pnp-type transistor D.sub.0 is connected through a resistor R.sub.2 to the voltage source terminal V.sub.CC, while the collector-base connecting point of transistor D.sub.0 is grounded through the resistor R.sub.1 and also connected to the base of pnp-type transistor Q.sub.A. The emitter of transistor Q.sub.A is connected through a resistor R.sub.3 to the voltage source terminal V.sub.CC and the collector thereof is connected to the output terminal 7a. This circuit is formed by the circuit of FIG. 3 with resistors R.sub.2 and R.sub.3 being added thereto. In the same manner as the example of FIG. 3, the constant current I.sub.R in the circuit of FIG. 4 is given as follows: ##EQU2## where R.sub.2 and R.sub.3 similarly represent the resistance value of resistors R.sub.2 and R.sub.3 for the sake of convenience.

In the constant current sources shown in FIGS. 2 and 4, the constant current I.sub.R is proportional to (V.sub.CC -V.sub.BE). In this case, when the source voltage V.sub.CC is small, the value of V.sub.BE is not negligible. Since the value of (V.sub.CC -V.sub.BE) is changed according to temperature, the current I.sub.R is also changed according to temperature and hence these circuits can not always be defined as the constant current source having good characteristics. Therefore, if temperature characteristics are more seriously taken into consideration, a constant current circuit as shown in FIG. 5 should be considered. In the circuit of FIG. 5, the voltage source terminal V.sub.CC is connected through the resistor R.sub.2 to one end of a series circuit of m number of diode-connected pnp-type transistors 12.sub.1, . . . 12.sub.m, while the other end of this series circuit is connected to one end of a series circuit of n number of diode-connected pnp-type transistors 13.sub.1, . . . , 13.sub.n. The other end of the series circuit of transistors 13.sub.1, . . . 13.sub.n is then grounded through the resistor R.sub.1. The connection point P between the above two series circuits is connected through a series circuit of (l-1) number of diode-connected pnp-type transistors 14.sub.1, . . . , 14.sub.l-1 to the base of pnp-type transistor Q.sub.A, while the emitter of transistor Q.sub.A is connected through the resistor R.sub.3 to the voltage source terminal V.sub.CC and the collector thereof is connected to the output terminal 7a. In the circuit of FIG. 5, a potential V.sub.P at the point P is expressed as follows: ##EQU3## The emitter potential V.sub.E of transistor Q.sub.A is given as follows:

Thus, the constant current I.sub.R becomes as follows: ##EQU4## If it is assumed as follows:

the following equation is obtained: ##EQU5## and hence a constant current source with good temperature characteristics can be obtained.

In this case, if l=n=1 and m=2 be assumed, the following result is obtained: ##EQU6## A practical example therefor will have a construction as shown in FIG. 6. Accordingly, in the circuit of FIG. 6, the constant current I.sub.R is expressed as follows: ##EQU7## Thus, a constant current source with good temperature characteristics can be obtained. As a practical application of the circuit of FIG. 6, there is considered a circuit as shown in FIG. 7. In the circuit of FIG. 7, the transistors 12.sub.1, 12.sub.2, 13.sub.1 and Q.sub.A of FIG. 6 are respectively replaced by npn-transistors. Further, the collector of transistor Q.sub.A is connected to the collector-base connecting point of a pnp-type transistor 15 and also to the base of a pnp-type transistor 16. While the emitters of transistors 15 and 16 are respectively connected to the voltage source terminal V.sub.CC and the collector of transistor 16 is connected to the output terminal 7a. Similarly, in this circuit of FIG. 7, there can be produced a constant current with good temperature characteristics.

As another example of the constant current source with good temperature characteristics, there is also considered a circuit such as shown in FIG. 8. In this circuit, the voltage source terminal V.sub.CC is grounded through a series circuit of m number of diode-connected pnp-type transistors 17.sub.1, . . . 17.sub.m and the resistor R.sub.2. The collector-base connecting point of the transistor 17.sub.m, which is the nearest to the voltage source terminal V.sub.CC in the transistors 17.sub.1, . . . , 17.sub.m, is connected to the base of a pnp-type transistor 18. Further, the emitter of transistor 18 is connected to the voltage source terminal V.sub.CC, and thus a current mirror circuit is formed by these transistors 18 and 17.sub.m. The collector of transistor 18 is also connected to the collector-base connecting point of a diode-connected pnp-type transistor 19 which is in turn connected at its emitter to the voltage source terminal V.sub.CC. The collector-base connecting point of transistor 19 is grounded through the resistor R.sub.1 and also connected to the base of a pnp-type transistor 20 which is then connected at its emitter to the voltage source terminal V.sub.CC and at its collector to the output terminal 7a. In this case, a current mirror circuit is formed by these transistors 19 and 20. Now, let it be assumed that these transistors 17.sub.1, . . . , 17.sub.m, 18, 19 and 20 have the same characteristics. Further, if a current flowing through the transistor 18 is taken as I.sub.1, a current flowing through the transistor 19 as I.sub.2, a current flowing through the resistor R.sub.1 as I.sub.3 and the base current of each transistor is neglected, the following relations are given: ##EQU8## Accordingly, the constant current I.sub.R is expressed as follows: ##EQU9## Assuming R.sub.2 =mR.sub.1, the following equation is obtained: ##EQU10## From the above relation, it is noted that the current I.sub.R is independent of V.sub.BE, and hence there can be obtained a constant current circuit with good temperature characteristics. If assumed m=2 in the above example, a circuit as shown in FIG. 9 can be formed. The constant current I.sub.R in the circuit of FIG. 9 becomes I.sub.R =(V.sub.CC /2R.sub.1) and hence there can also be obtained a constant current circuit with good temperature characteristics.

These constant current sources as shown in FIGS. 3 through 9 can be selectively used as occasion demands. In order to obtain the opposite direction of the output current I.sub.R in the above circuits, the conductivity of used transistors may be reversed. The circuits shown in FIGS. 3 through 9 can also be basically used as the input signal current source 1 of the circuit of FIG. 1. In this case, a constant current may be made changeable according to input signals. It is needless to say that those shown in FIGS. 3 to 9 can be similarly applied to constant current sources which will be described below.

If the basic circuit of FIG. 1 is modified in circuit arrangements as shown in FIGS. 10 and 11, detected currents can be easily obtained. By way of example, three reference constant current sources 2a, 3a and 4a are used in the circuit of FIG. 10 and four reference constant current sources 2a, 3a, 4a and 5a are used in the circuit of FIG. 11. In any way, the number of this reference constant current source is preferred to be two or more. In the circuits of FIGS. 10 and 11, elements corresponding to those in FIG. 1 will be shown by the same reference numerals.

In the circuit of FIG. 10, the connection point between constant current source 2a and diode 2b, the connection point between constant current source 3a and diode 3b, and the connection point between constant current source 4a and diode 4b are respectively connected to the emitters of transistors 2c, 3c and 4c, which are applied at each base thereof with a predetermined bias voltage from a battery 6. The other portions of FIG. 10 are formed in the same manner as those in FIG. 1.

In this circuit of FIG. 10, when the input signal current i.sub.S is zero, the constant current i.sub.1 is supplied through the transistor 2c, the constant current i.sub.2 is supplied through the transistor 3c, and the constant current i.sub.3 is supplied through the transistor 4c so that these transistors are turned ON, respectively. When the input signal current i.sub.S is 0<i.sub.S <i.sub.1, the transistors 2c, 3c and 4c still keep in their ON-state except that the current flowing through the transistor 2c becomes (i.sub.1 -i.sub.S).

When the input signal current i.sub.S satisfies the relation of i.sub.1 .ltoreq.i.sub.S <(i.sub.1 +i.sub.2), the constant current i.sub.1 of the constant current source 2a is all fed from i.sub.S and a current of (i.sub.S -i.sub.1) flows into the constant current source 3a through the diode 2b. Accordingly, the transistor 2c is turned off and a current flowing through the transistor 3c becomes (i.sub.1 +i.sub.2 -i.sub.S). In this case, the transistor 4c keeps the current i.sub.3 flowing therethrough. That is, when the transistor 2c is turned OFF from its ON state, it can be noticed that the input signal current i.sub.S has exceeded the reference current i.sub.1.

When the input signal i.sub.S satisfied the relation of (i.sub.1 +i.sub.2).ltoreq.i.sub.S <(i.sub.1 +i.sub.2 +i.sub.3), a current of (i.sub.S -i.sub.1 -i.sub.2) similarly flows through the diode 3b into the constant current source 4a. That is, the transistor 3c is turned OFF from its ON state thereby to reveal that the input signal current i.sub.S has exceeded (i.sub.1 +i.sub.2). Similarly, when the input signal current i.sub.S exceeds (i.sub.1 +i.sub.2 +i.sub.3), all of the transistors 2c, 3c and 4c are turned OFF. It will be easily understood that the circuit of FIG. 10 has the same working effect as that of FIG. 1.

In the circuit of FIG. 11, the input signal current source 1 is grounded through a series circuit of diode 2b and constant current source 2a, a series circuit of diode 3b and constant current source 3a, a series circuit of diode 4b and constant current source 4a, and a series circuit of diode 5b and constant current source 5a, respectively. The connection point between diode 2b and constant current source 2a is connected to the emitter of npn-type transistor 2c. Similarly, the connection point between diode 3b and constant current source 3a, the connection point between diode 4b and constant current source 4a, and the connection point between diode 5b and constant current sources 5a are respectively connected to the emitters of respective npn-type transistors 3c, 4c and 5c. The bases of transistors 2c, 3c, 4c and 5c are applied with positive DC biasing voltages E.sub.1, E.sub.2 , E.sub.3 and E.sub.4. In this case, the values of these voltages are selected to have a little difference from each other in a relation of E.sub.1 <E.sub.2 <E.sub.3 <E.sub.4. Further, when i.sub.S =0, the constant currents i.sub.1, i.sub.2, i.sub.3 and i.sub.4 flow through the transistors 2c, 3c, 4c and 5c to make them conductive. When 0<i.sub.S <i.sub.1, this current i.sub.S is all supplied through the diode 2b to the constant current source 2a with the result that the output current of transistor 2c becomes (i.sub.1 -i.sub.S) but the transistor 2c keeps its ON state. Next, when the input signal current is i.sub.1 .ltoreq.i.sub.S <(i.sub.1 +i.sub.2), the current i.sub.1 is supplied by the current i.sub.S so that the transistor 2c is turned OFF and the difference current (i.sub.S -i.sub.1) flows through the diode 3b to the constant current source 3a. Accordingly, a current flowing through the transistor 3c becomes (i.sub.1 +i.sub.2 -i.sub.S), but the transistor 2c is changed from ON state to OFF state to reveal that the input signal current i.sub.S has exceeded the reference constant current i.sub.1. In a similar and sequential manner, the transistor 3c is turned OFF to disclose that the input signal current i.sub.S has exceeded (i.sub.1 +i.sub.2), the transistor 4c is turned OFF to reveal that the input signal current i.sub.S has exceeded (i.sub.1 +i.sub.2 +i.sub.3), and the transistor 5c is turned OFF to suggest that the input signal current i.sub.S has exceeded (i.sub.1 +i.sub.2 +i.sub.3 +i.sub.4). Of course, the circuit of FIG. 11 has the same working effect as that of FIG. 1.

FIG. 12 shows an example wherein this invention is applied to an automatic gain control (AGC) circuit for a luminance signal of a video tape recorder or the like. In the circuit of FIG. 12, as the input signal current source 1 there is used a luminance signal as shown in FIG. 13A. The input signal current source 1 is connected at its one end to the ground and at its other end to the base-collector connecting point of a diode-connected npn-type transistor 30 which is then grounded at its emitter. The other end of input signal current source 1 is also connected to the collector of a pnp-type transistor 31 the emitter of which is connected to the voltage source terminal V.sub.CC to which a positive DC voltage is supplied. The other end of input signal current source 1 is further connected to the bases of npn-type transistors 32 and 33. The emitters of these transistors 32 and 33 are respectively grounded and the collector of transistor 32 is connected to a luminance signal output terminal 34. While the collector of transistor 33 is connected through the constant current source 2a of current i.sub.1 to the voltage source terminal V.sub.CC and also connected to the cathode of diode 2b. The anode of diode 2b is then connected through the constant current source 3a of current i.sub.2 to the voltage source terminal V.sub.CC and also connected to the cathode of diode 3b. Further, the anode of diode 3b is connected through the constant current source 4a of current i.sub.3 to the voltage source terminal V.sub.CC. In this case, values of the currents i.sub.1, i.sub.2 and i.sub.3 are respectively selected as shown in FIG. 13A. In other words, i.sub.1 is selected as a current corresponding to the established white peak level of a negative modulated luminance signal, i.sub.2 is selected as a current between the pedestal level and the established white peak level, and i.sub.3 is selected as a current correspondiang to the level of a synchronizing signal. The connection point between constant current source 2a and diode 2b, the connection point between diode 3b and constant current source 3a, and the connection point between diode 3b and constant current source 4a are respectively connected to the emitters of pnp-type transistors 2c, 3c and 4c. The respective bases of transistors 2c, 3c and 4c are grounded through a biasing battery 6. The collector of transistor 2c is connected to an AGC signal output terminal 35, while the collector of transistor 4c is connected to the base of a pnp-type transistor 36 and also grounded through a constant current source 37 of a minute current. Further, the emitter of transistor 36 is connected to the positive electrode of the battery 6 and the collector thereof is connected to the AGC signal output terminal 25. The transistor 3c is connected at its collector to the collector of an npn-type transistor 38. The emitter of transistor 38 is grounded and the base thereof is connected to a control signal input terminal 38a to which is supplied a control signal as shown in FIG. 13B so that the transistor 38 is turned off only during a period corresponding to the front porch at the pedestal portion of the video signal. The collector of transistor 38 is also connected to the base of an npn-type transistor 39, the emitter of which is grounded. The collector of transistor 39 is connected to the base of transistor 31 and also grounded through a capacitor 40.

With the circuit arrangement shown in FIG. 12, when the luminance signal i.sub.S is i.sub.1 .ltoreq.i.sub.S <(i.sub.1 +i.sub.2), the collector current of transistor 32 is supplied by i.sub.S and the collector current of transistor 33 is supplied by the currents i.sub.1 and i.sub.2, and since the transistor 38 is normally ON, a current (i.sub.1 +i.sub.2 -i.sub.S) flows through the transistors 3c and 38. At this time, the transistors 39 and 31 are respectively OFF due to the ON state of the transistor 38. When the transistor 38 is turned OFF during the period corresponding to the front porch of the pedestal level, the transistors 39 and 31 are turned ON and a current is supplied through the transistors 3c, 39 and 31 to the bases of transistors 32 and 33. As a result, the collector currents of transistors 32 and 33 increase and a current flowing from the constant current source 3a to the collector of transistor 33 increases so that a current flowing through the transistor 3c is decreased. That is, the transistors 3c, 39 and 31 form a negative feedback circuit and the collector currents of transistors 32 and 33 are clamped to (i.sub.1 +i.sub.2) during the pedestal period. When the input signal current i.sub.S exceeds (i.sub.1 +i.sub.2 +i.sub.3) at the synchronizing signal portion, the transistor 4c is turned OFF to make the transistor 36 conductive so that an AGC signal is obtained at the output terminal 35. This AGC signal is fed back to the luminance signal amplifier and, as a result, the amplitude of the luminance signal is lowered to control the transistors 32 and 33 so as to have the same collector current of (i.sub.1 +i.sub.2 +i.sub.3). However, since the pedestal level is clamped to (i.sub.1 +i.sub.2), if the level of the horizontal synchronizing signal is suppressed to i.sub.3 the peak value or maximum level of the video signal will be clamped to (i.sub.1 +i.sub.2 +i.sub.3). When the input signal current i.sub. S becomes lower than the level of i.sub.1 at the white peak, the transistor 2c is turned ON to produce the AGC signal which is fed back through the output terminal 35 to the luminance signal amplifier to control the same so that the amplitude of the luminance signal is lowered and the level of the white peak becomes i.sub.1.

FIG. 14 shows a further embodiment of this invention. In the circuit of FIG. 14, elements corresponding to those of FIG. 1 are shown by the same reference numerals with their description being omitted. In this circuit of FIG. 14, one end of the input signal current source 1 is grounded. The other end of the current source 1 is also grounded through a series connection consisting of a parallel circuit of constant current source 2a of current i.sub.1 and diode 2b, a parallel circuit of constant current source 3a of current i.sub.2 and diode 3b, parallel circuit of constant current source 4a of current i.sub.3 and diode 4b, and a parallel circuit of constant current source 5a of current i.sub.4 and diode 5b. These diodes 2b, 3b, 4b and 5b are respectively connected at their anode sides to the bases of npn-type transistors 2c, 3c, 4c and 5c which are grounded at their emitters through resistors 2d, 3d, 4d and 5d and connected at their collectors to output terminals 2e, 3e, 4e and 5e, respectively. In this case, the current i.sub.1, i.sub.2, i.sub.3 and i.sub.4 are selected in value so as to satisfy a relation of i.sub.1 <i.sub.2 <i.sub.3 <i .sub.4. Now, when the input signal current i.sub.S is smaller than i.sub.1, the current i.sub.S flows through series-connected constant current sources 2a, 3a, 4a and 5a to the ground and the diodes 2b, 3b, 4b and 5b become OFF. At this time, since only the input signal current i.sub.S flows through the constant current sources 2a, 3a, 4a and 5a, voltages across the respective diodes 2b, 3b, 4b and 5b become zero. Thus, the respective base potentials of transistors 2c, 3c, 4c and 5c become zero thereby to make all of them OFF.

When the input signal current i.sub.S is i.sub.1 <i.sub.S <i.sub.2, a current of (i.sub.S -i.sub.1) flows through diode 2b and the other diodes 3b, 4b and 5b are kept OFF. As a result, the base potential of transistor 2c becomes V.sub.D to make it ON. However, the base potentials of other transistors 3c, 4c and 5c are kept zero so that they ar all OFF. In other words, turning-ON of transistor 2c gives a notice that the input signal current i.sub.S has exceeded i.sub.1.

When i.sub.2 <i.sub.S <i.sub.3, the current of (i.sub.S -i.sub.1) flows through diode 2b and a current of (i.sub.S -i.sub.2) flows through diode 3b, so that the base potential of transistor 2c becomes 2V.sub.D and that of transistor 3c becomes V.sub.D to make both transistors ON, but the transistors 4c and 5c are still OFF. Thus, these transistors 2c and 3c are turned ON to reveal that the input signal current i.sub.S has exceeded i.sub.2.

Similarly, when i.sub.3 <i.sub.S <i.sub.4, the transistors 2c, 3c and 4c are turned ON, and when i.sub.4 <i.sub.S, the transistors 2c, 3c, 4c and 5c are turned ON so that it can be noticed that i.sub.S has exceeded i.sub.3 or i.sub.4. It is, of course, that the working effect of the circuit of FIG. 14 is the same as that of FIG. 1.

In the circuit of FIG. 14, when diodes are all non-conductive, a series connection of constant current sources will be equivalently inserted therein. In this case, when a constant current I.sub.R1 of one constant current source is smaller than a constant current I.sub.R2 of other constant current source, there may occur a simple question as to where the difference current flows. A detailed consideration will be given below to the aforesaid question.

As a simple circuit example wherein two constant current sources are connected in series across the voltage source, where is considered a circuit as shown in FIG. 15. In this circuit of FIG. 15, the voltage source terminal V.sub.CC is grounded through a series circuit of diode 26a and resistor 26b. The connection point between diode 26a and resistor 26b is connected to the base of a pnp-type transistor 26 whose emitter is connected to the voltage source terminal V.sub.CC to form a first constant current source. Further, the voltage source terminal V.sub.CC is grounded through a series circuit of resistor 27a and diode 27b, and the connection point therebetween is connected to the base of an npn-type transistor 27 whose emitter is grounded to form a second constant current source. The collectors of transistors 26 and 27 are interconnected.

A first consideration will be taken on a case where the current I.sub.R1 of the first constant current source is smaller than the current I.sub.R2 of the second constant current source. In this case, since the collector-emitter voltage V.sub.CE of transistor 27 will have been reduced, the transistor 27 will be driven into its saturated region. As a result, I.sub.R2 is decreased and balanced at I.sub.R1 =I.sub.R2. In other words, the current value of the constant curent source consisting of transistor 27 is subjected to change. Next, when the current I.sub.R1 is larger than the current I.sub.R2, the collector potential of transistor 27 increases toward the positive DC voltage V.sub.CC so that the transistor 26 will be driven into its saturated region. Finally, the current I.sub.R1 is decreased and balanced at I.sub.R2 =I.sub.R1. In other words, the current value os the constant current source consisting of transistor 26 is subjected to change so as to be automatically balanced. That is, the constant current source mentioned in this invention means a circuit forming a constant current by transistors and is not a circuit supplying a constant current under any available conditions.

In this invention, the number of the pair of constant current source and diode should be two or more. Further, in the above-mentioned embodiments, the transistors 2c, 3c, 4c and 5c can be, of course, replaced by any other switching elements or detecting elements.

It will be apparent that a number of changes and variations can be effected without departing from the scope of the novel concepts of this invention.