Reactance Measurement Circuit

1. Field of the Invention

This invention relates to AC reactance sensor circuitry and more particularly to capacitance transducers for measuring pressure.

2. Prior Art

In the prior art, various AC reactance measuring schemes are shown. While many such techniques have been successful, a problem of prior art schemes has been that typically the amplitude of the (peak to peak) voltage applied to the sensor circuitry has been the controlled parameter for such circuitry and change in the voltage results in reduced stability of the output signal.

One further significant disadvantage has been the requirement of driving a transformer to provide such peak to peak voltage to a varying reactive load. As known to those skilled in the art, a transformer, though faithful once operable, is more difficult to reliably acquire than resistors, capacitors, or solid state components. Elimination of the transformer results in a reduction of size and power required. A further problem is that such transformers do not lend themselves to use with hybrid circuitry. Such hybrid circuitry with an interactive or capacitive sensor is desirable. Elimination of such transformers results in a functionally improved, lower cost circuit.

One object of the present invention is to provide an improved AC reactance measuring circuit responsive to a condition to be sensed in which the control parameter is the frequency of a nominally constant peak to peak voltage applied by an oscillator to the AC reactance and which circuit does not require inductive coupling, such as a transformer, from the oscillator to the AC reactance. Non-inductive coupling is facilitated by having the AC reactance electrically isolated (floating) with respect to ground potential. The circuit, according to one embodiment, provides charging pulses to and discharging pulses from an AC reactive sensor, which varies responsive to the parameter to be sensed. The sensor, preferably a cpacitor or a plurality of capacitors, is excited by the oscillator through a rectification means. In one preferred embodiment, when the rectification means comprises a plurality of diodes, the rectification means is improved by having low voltage diodes, proximately located to each other.

The oscillator provides to the combination of the sensor and the rectification means associated with the sensor a nominally constant peak amplitude, time varying oscillator signal, the frequency of which is controlled responsive to the changes in sensor capacitance. Frequency control results in improved functional and cost performance. The advantages of the application of the same peak to peak voltage to the combination of the sensor and the rectification means is readily apparent as unwanted effects, which are not representative of the measured parameter, may then be improved by circuit component selection and arrangement. When a plurality of sensors and rectifiers are desired, they are subjected to the same drive voltage. A further advantage is that the same reference voltage is applied to amplifiers where sensor currents are combined. Additional advantages are apparent from the descriptions of the preferred embodiments.

FIG. 1 is a schematic representation of a circuit according to the present invention.

FIG. 2 is a schematic representation of another embodiment of the present invention.

FIG. 3 is yet another schematic representation of a further embodiment according to the present invention.

FIG. 1 is a schematic diagram of a circuit embodiment of the present invention shown generally at 10, which preferably is used in conjunction with an AC reactance type differential pressure sensor cell, and, which preferably has a pair of variable capacitors C.sub.1 and C.sub.2. Stray cell capacitance is compensated for by an adjustable capacitor C.sub.s. While two variable capacitors C.sub.1 and C.sub.2 are shown in FIG. 1, it is to be understood that for certain applications of the circuit, the AC reactance means may, as desired, be one active capacitor; for other applications, additional active capacitors, or inductors or other AC reactance means can be used. In addition to being particularly useful as a circuit for a capacitance pressure sensor, this circuit embodiment shows conversion of the capacitance signal to control the direct current in a two wire current loop, having an external power supply and load, whereby such direct current is a function of the sensed parameter.

In one preferred embodiment, capacitors C.sub.1 and C.sub.2 are formed in a chamber having a common capacitor plate 12 which comprises a diaphragm which is at least partially electrically conductive disposed therein. At least portions of the chamber walls facing plate 12 are electrically conductive and these wall portions form second plates 14 and 16 for capacitors C.sub.1 and C.sub.2, respectively. Preferably plate 12 is electrically isolated (floating) from the transducer housing to eliminate the requirement of inductive couplings, such as a transformer, from a drive oscillator to plate 12. Second plates 14 and 16 preferably are also electrically isolated (floating) from the transducer housing. When the condition to be measured is differential pressure, a first pressure P.sub.1 is applied to one side of plate 12, and a second pressure P.sub.2 is applied to a second side of plate 12. Plate 12 is then urged towards second plate 14 or second plate 16 dependent on whether P.sub.2 is greater than, or less than, P.sub.1. Movement of plate 12 changes the spacing between plate 12 and second plates 14 and 16 which results in a change of the capacitance of C.sub.1 and C.sub.2. Such sensor configuration and operation is fully described in co-pending U.S. patent application entitled Capacitive Pressure Transducer with Isolated Sensing Diaphragm, Ser. No. 194,758, filed Oct. 6, 1980 held by the same assignee as the present invention.

A rectification means for rectifying signals to and from capacitors C.sub.1, C.sub.2 and C.sub.s is shown generally at 20, and includes diodes 22 and 24 for capacitor C.sub.s, detector diodes 26 and 28 for C.sub.1 and detector diodes 30 and 32 for C.sub.2 all of which diodes are serially connected in a forward conducting closed loop. Second plate 14 of C.sub.1 is connected between diodes 26 and 28; second plate 16 of C.sub.2 is connected between diodes 30 and 32; and capacitor (C.sub.s) is connected between diodes 22 and 24. Circuit performance is improved when rectification means 20 such as diodes 22, 24, 26, 28, 30 and 32 are at substantially the same temperature, which substantially eliminates thermal drift problems. Such thermal stability may be obtained by hybrid mounting of rectification means 20, or mounting rectification means 20 on a single substrate, or other proximate mounting technique, as desired. In FIG. 1 such proximate mounting is shown by the dotted lines 20A enclosing rectification means 20. Diodes 22, 24, 26, 28, 30 and 32 preferably have a low forward conducting voltage drop characteristic.

A voltage controlled oscillator 34 is coupled to plate 12 by a line 36 to supply a nominally constant peak to peak voltage at a controlled frequency to plate 12. Capacitors 40 and 42 are coupled to rectification means 20 to smooth current signals which are responsive to capacitors C.sub.1 and C.sub.2 as driven by oscillator 34. Resistors 44 and 46 form a voltage divider across power lines 79 and 76, which are powered by the output voltage of a voltage regulator 84, thus, the voltage divider provides a circuit reference signal at node S.sub.1. A line 48 couples the non-inverting inputs of operational amplifiers 50 and 60 to the voltage divider to receive such reference signal. One input of an output amplifier 80 is also coupled by line 48 to receive such reference signal from S.sub.1.

The inverting input of amplifier 50 is coupled to second plate 14 of C.sub.1 through line 52, a current summing node 52A, and diode 26, and is coupled to plate 12 (the other side of C.sub.1) and to C.sub.s through diode 22. Line 52 is also connected to capacitor 40 between diodes 26 and 22. The current representative of C.sub.1 (i.sub.C1) and current representative of C.sub.s (i.sub.Cs) combine at node 52A and the resultant current is i.sub.1. Similarly, the inverting input of amplifier 60 is coupled to second plate 16 of C.sub.2 by a line 62, a current summing node 62A, through diode 30 and is coupled to plate 12 (the other side of C.sub.2) and to C.sub.s through diode 24. Line 62 is connected to capacitor 42 between diodes 30 and 24. The current representative of C.sub.2 (i.sub.C2) and the current representative of C.sub.s (i.sub.Cs) combine at node 62A and the resultant current is i.sub.2. Resistors 54 and 64 provide feedback to the inverting inputs of amplifiers 50 and 60, respectively.

A first input 72 of an amplifier 70 is coupled to the output of amplifier 50 through a resistor 56 and a line 58, and a second input 73 of amplifier 70 is coupled to the output of amplifier 60 through resistor 66 and a line 68. First input 72 is also coupled through line 58 and a resistor 75 to power line 76. Second input 73 is coupled through line 68 and a resistor 78 to power line 79. Amplifier 70 functions as a differential amplifier, comparing the signals at its inputs (72 and 73) and providing an output representative of such comparison on a line 79A to control oscillator 34. Oscillator 34 is powered through lines 76 and 79.

A summing point S for circuit 10 is between diode 28 and diode 32 and is coupled to the inverting input of amplifier 80 by a line 80A. A capacitor 81 is coupled from line 80A to line 76 to filter the current signals. Amplifier 80 preferably is coupled to current control 82 but may be coupled directly to suitable implementation or readout means. Current control 82 is also connected to line 79 and to terminal 88. Amplifiers 50, 60, 70 and 80 are powered through lines 79 and 76. Circuit 10 is supplied a regulated voltage through voltage regulator 84. Regulator 84 is, for example, a zener diode 84A connected from lines 79 to 76 with a resistor 84B connected to line 76 and to terminal 88. Voltage controlled oscillator 34 is coupled to voltage regulator 84 by power lines 79 and 76 for supply of the substantially constant (regulated) voltage. Circuit 10 preferably is also coupled to a two wire current loop through a feedback resistor which may be a potentiometer as shown schematically at 85, coupled to the two terminals 86 and 88. In this embodiment, a wiper of potentiometer 85 couples a small but known feedback current (i.sub.FB +i.sub.s) which is a portion of the total two wire current (I.sub.T) through resistor 93 to sum point S. Resistor 94 sinks a constant portion of a feedback current (i.sub.FB). A variable portion of the feedback current (i.sub.s) is summed at sum point S with i.sub.C1 and i.sub.C2. The combination of currents (i.sub.C1, i.sub.C2 and i.sub.s) at S affects the inverting input of amplifier 80 through line 80A. Line 76 is coupled to the voltage regulator 84 to terminal 88. The two wire current loop is completed through an external supply 90 and series connected load 92 coupled to terminals 86 and 88.

The embodiment of FIG. 1 employs three capacitors C.sub.1, C.sub.2 and C.sub.s with a known diode detection scheme. While the concept of a controlled product oscillator is known, conventional oscillators for capacitance measurement vary the peak to peak voltage (V.sub.pp) and incidently frequency (f) to obtain the desired controlled product (P), so that P.varies.(fV.sub.pp).

In the circuit of the present invention, the amplitude of the voltage (V.sub.pp) is held to be substantially constant while the frequency (f) is varied to obtain the desired controlled product (P). This method of varying frequency to obtain the desired control is effective since the portion of rectification means 20 associated with C.sub.1 (diodes 26 and 28) is referenced to the same peak to peak voltage as the portion of rectification means 20 associated with C.sub.2 (diodes 30 and 32). (Line 36 applies the same voltage (V.sub.pp) to each of the capacitors C.sub.1, C.sub.2 and C.sub.s.) For example, when voltage on line 36 is positive with respect to line 48 (during a first portion of each cycle of oscillator 34), C.sub.1, C.sub.2 and C.sub.s are charged positively, and when the voltage on line 36 is negative with respect to line 48 (during a second portion of the cycle of oscillator 34) C.sub.1, C.sub.2 and C.sub.s are charged negatively. During a first portion of a cycle of oscillator 34, C.sub.1 charges positively through line 76, capacitor 81, diode 28 to second plate 14 which in conjunction with plate 12 forms C.sub.1 which is connected to oscillator 34 by line 36. During the same first portion of a cycle of oscillator 34, C.sub.2 charges positively through line 76, capacitor 42, diode 30 to third plate 16 which in conjunction with first plate 12 comprises C.sub. 2 which is connected to oscillator 34 by line 36. During a second portion of a cycle of oscillator 34, C.sub.1 charges negatively through line 76, Zener diode 84A, line 79, capacitor 40, diode 26 to second plate 14 of C.sub.1 and thence on plate 12 to oscillator 34 on line 36. During the same second portion of a cycle of oscillator 34, C.sub.2 charges negatively through line 76, capacitor 81, diode 32 to second plate 16 of C.sub.2 and thence on plate 12 to oscillator 34 on line 36. One terminal of C.sub.s, connected through plate 12, is connected directly to oscillator 34 by line 36. C.sub.s charges positively on a first portion of a cycle of oscillator 34 through line 76, Zener diode 84A, line 79, capacitor 40, and diode 22. C.sub.s charges negatively on a second portion of a cycle of oscillator 34 through line 76, capacitor 42, and diode 24. The magnitudes of currents i.sub.C1 and i.sub.c2 are functions of capacitance of C.sub.1 and C.sub.2. When a differential pressure sensor is used (as shown in FIG. 1) capacitances C.sub.1 and C.sub.2 are a function of the differential pressure (P.sub.1 -P.sub.2).

Currents i.sub.C1 and i.sub.C2 are smoothed by capacitors 40 and 42 and each combines with i.sub.Cs ; the resultant currents, i.sub.1 and i.sub.2 respectively, are also connected to the inverting inputs of amplifiers 50 and 60, which convert i.sub.1 and i.sub.2 to proportional voltage outputs V.sub.1 and V.sub.2 respectively. The voltage outputs V.sub.1 and V.sub.2 are coupled to the inputs 72 and 73 of amplifier 70. The output of amplifier 70, which therefore varies in proportion to the difference of i.sub.1 and i.sub.2, drives oscillator 34 to provide the voltage peak to peak (V.sub.pp) which has a frequency which satisfies the control equation such that:

Where:

V.sub.1 =output voltage of amplifier 50

V.sub.2 =output voltage of amplifier 60

f=frequency of oscillator 34

V.sub.pp =amplitude of the voltage peak to peak from oscillator 34

C.sub.1 =capacitance of C.sub.1

C.sub.2 =capacitance of C.sub.2

C.sub.s =capacitance of C.sub.s

R.sub.54 =R.sub.64

V.sub.D =voltage drop of the respective diode

Subtracting Equation (1) from Equation (2) and setting V.sub.1 -V.sub.2 =K, it is seen that amplifier 70 provides closed loop control of frequency responsive to a change in capacitance for oscillator 34 such that: ##EQU1## Where: P=the controlled product-f(V.sub.pp)

K=a constant, V.sub.1 -V.sub.2

It is noted that since oscillator 34 is inside of the control loop (between the circuit nodes 52A and 62A) the frequency of V.sub.pp therefrom need not be linear with respect to the output of amplifier 70.

Oscillator 34 in one embodiment is the voltage controlled oscillator of the phase locked loop circuit of a CMOS 4046 as manufactured by Radio Corporation of America (RCA), National Semiconductor or Motorola.

Amplifier 80 provides an output signal responsive to the currents i.sub.C1 and i.sub.C2 which flow to sum point S and summing the currents at S yields:

Since amplifier 80 amplifies i.sub.s via current control 82, loop current sensing resistor 85, and feedback resistor 93 to give a proportional current signal in load resistor 92 and by substituting Equation (3) into Equation (4) it is seen that the two wire current (I.sub.T) is a function of the linearized differential pressure signal; that is: ##EQU2##

The output signal from amplifier 80, as shown, preferably drives a current control 82 for a two wire circuit, having an external power supply 90 and a series coupled load 92 connected to terminals 86 and 88 by means of a conventional two wire circuit. The total DC current I.sub.T in the two wire circuit then is a function of the capacitances C.sub.1 and C.sub.2 and the measured parameter.

Currents i.sub.C1 and i.sub.C2 are a function of the peak to peak voltage (V.sub.pp) applied, the respective diode drops (V.sub.d26 and V.sub.d28) or (V.sub.d30 and V.sub.d32), the voltage drops (V.sub.a) between the diodes and the current summing nodes (52A, 62A and point S) which may be represented as fV.sub.pp CR, where C is the sensor capacitance and R is the circuit resistance, and the losses caused by referencing the current i.sub.C1 and i.sub.C2 to different reference voltages (.DELTA.V.sub.b).

From the foregoing:

Generally,

and,

From these equations, it is observed that for i.sub.C1 and i.sub.C2 to be representative of a condition to be measured, the terms within the parenthesis, i.e. (V.sub.pp -V.sub.d1 -V.sub.d2 -V.sub.a -.DELTA.V.sub.b) must be quite stable. Therefore maximizing the amplitude of V.sub.pp and controlling frequency not amplitude of V.sub.pp, provides maximum amplitude irrespective of the changes of C.sub.1 and C.sub.2. Controlling the changes in V.sub.d1 and V.sub.d2 to be substantially the same and minimizing the remaining terms V.sub.a and .DELTA.V.sub.b also enhances stability and results in improved current signals i.sub.C1 and i.sub.C2 by reducing unwanted errors. Thus, one important advantage of the present invention is providing a substantially constant peak to peak voltage (V.sub.pp) to fully charge the capacitors while varying the frequency of V.sub.pp responsive to the change in capacitance. It is observed that the frequency variation is controlled within limits so that the respective capacitors C.sub.1, C.sub.2 and C.sub.s may be fully charged and fully discharged during each cycle. Means for improving the uniformity of the diode drops by proximate mounting is hereinabove disclosed. The effect of voltage drops (V.sub.a) is improved as there is no voltage drop between rectification means 20 and the current summing nodes i.e. 52A, 62A, sum point S. Finally, circuit current summing nodes, such as nodes 52A, 62A and sum point S are referenced to the same reference voltage by amplifiers 50, 60 and 80 respectively, thus minimizing .DELTA.V.sub.b. In summation then, V.sub.pp is maximized and the other terms are optimized, thus resulting in an enhanced signal to amplifier 80 and an enhanced output signal to current control 82 which results in an improved two wire current (I.sub.T).

A circuit for measuring capacitance is shown generally at 100. In this embodiment, two variable capacitors C.sub.1 and C.sub.2 are shown, but again, a different quantity of capacitors may be used, as desired. A voltage controlled oscillator 110 is coupled to first plates 114 and 116 of C.sub.1 and C.sub.2 respectively through a line 112. The second plates 117 and 118 of C.sub.1 and C.sub.2 are coupled to rectification means 120 comprising diodes 122, 124, 126 and 128 (which preferably are proximately located together for thermal stability as indicated by line 120A) by lines 132, 134, 136 and 138, respectively. The anode of diode 128 is coupled to a current summing node 140 by a line 142. The output of a current inverting amplifier 144 is also coupled to node 140 through a resistor 146 and line 142. Amplifier 144 has a feedback resistor 148 coupled from its inverting input to its output and has its non-inverting input coupled to circuit common. The inverting input of amplifier 144 is coupled through a line 150 to the anode of diode 124 and in turn to second plate 117 of C.sub.1.

Diodes 122 and 126 are each coupled by a line 152 to the inverting input of a control amplifier 154 and to a current summing node 154A. A reference current is provided from a reference voltage -V.sub.REF through a resistor 156. A second input of amplifier 154 is completed to circuit common. The output of amplifier 154 provides the control signal for oscillator 110 through line 158.

An amplifier 160 has its inverting input coupled to node 140 and a feedback resistor 162 which is coupled from the inverting input to the output of amplifier 160. The non-inverting input of amplifier 160 is coupled to circuit common. Amplifier 160 provides an output signal (V.sub.o) from circuit 100 which is a function of C.sub.1 and C.sub.2, which output preferably is used in conjunction with a suitable implementation or readout means 161, a current control for a two wire transmitter, a current to pressure converter or the like. Linearization for C.sub.1 and C.sub.2 is provided by adjustable capacitor C.sub.3 coupled to line 112 and to circuit common through diode 164 and to line 152 through diode 166. Diodes 164 and 166 may be included in rectification means 120. Since, in this case, only diode 166 of the pair consisting of 164 and 166 are coupled to summing node 154A, the value of capacitor C.sub.3 must be doubled so that C.sub.3 =2C.sub.s, hence: ##EQU3## Filter capacitors 170, 172 and 174 from lines 142, 150 and 152 to circuit common provide for smoothing the current signals.

In operation, oscillator 110 provides a substantially constant amplitude peak to peak voltage at a controlled, varied frequency to each of the capacitors C.sub.1, C.sub.2 and C.sub.3. Second plates (117,118) of C.sub.1 and C.sub.2 are coupled through rectification means 120 to amplifiers 144, 154 and 160.

During a first portion of the cycle of oscillator 110, a first current i.sub.1 representative of the capacitance of capacitor C.sub.1, flows from the current summing node at the inverting input of amplifier 144 through line 150, and diode 124 and line 134 to charge C.sub.1. During a second portion of the cycle of oscillator 110, current i.sub.1 flows from C.sub.1, through line 132, diode 122 and line 152 to the current summing node 154A (which affects the input of amplifier 154) and through resistor 156 to -V.sub.REF. This first current path is completed by feedback resistor 148, which, in cooperation with inverter amplifier 144 and resistor 146, inverts first current i.sub.1, so that along line 142, a current (-i.sub.1) is present at node 140. During the first portion of the cycle of oscillator 110, a second current (i.sub.2), which is representative of the capacitance of C.sub.2, flows from node 140 through line 142 and diode 128 to line 138 to charge C.sub.2. During a second portion of the cycle of oscillator 110, i.sub.2 flows through line 136 and diode 126 to line 152 and to the summing node 154A (which affects the inverting input of amplifier 154) and through resistor 156 to -V.sub.REF. In control, amplifier 154 provides a voltage signal at its output which controls the frequency of oscillator 110 such that the sum of current i.sub.1 and current i.sub.2 is a function of the nominally constant voltage peak to peak (V.sub.pp), and diode drop (V.sub.D) and the frequency (f) of oscillator 110 and C.sub.1 and C.sub.2, that is:

Yet a further embodiment of the circuitry according to the present invention is shown at 200 in FIG. 3. In this embodiment, a current summing node 210 is fed a first current i.sub.1 responsive of the capacitance of capacitor C.sub.1, a second current i.sub.2 responsive of the capacitance of capacitor C.sub.2 from current inverting amplifier 212. In this embodiment, control amplifier 216 has its non-inverting input coupled to circuit common and its inverting input coupled to summing node 210 and produces an output signal to control the frequency of voltage controlled oscillator 218. The rectification means shown generally at 220 rectifies the currents i.sub.1 and i.sub.2, representative of C.sub.1 and C.sub.2 which result from the repetitive charging and discharging substantially constant amplitude, variable frequency voltage signals (V.sub.pp) from oscillator 218 which frequency is controlled responsive to the changes of the capacitance of C.sub.1 and C.sub.2. An output amplifier 230 is coupled at its inverting input to rectification means 220 and provides an output signal to a suitable implementation means 232, such as a two wire current control, readout device or the like. Linearization for C.sub.1 and C.sub.2 is provided for by adjustable capacitor C.sub.3 through diodes 242 and 244, which are coupled to summing node 210. Diodes 242 and 244 may be included in rectification means 220A. Since, in this case as in one embodiment of FIG. 2, only diode 244 is coupled to the summing node 210 the value of C.sub.3 must be doubled as explained in relation to Equation (6) above.

The embodiments of FIGS. 2 and 3 function using a substantially constant amplitude peak to peak voltage having a variable frequency to excite the reactance means without an inductive coupling means to couple the peak to peak voltage to such reactive means. These embodiments when used with a two wire circuit can use the inverting input to amplifiers 160 and 230 respectively as the summing node for the feedback current (i.sub.s), and currents i.sub.1 and i.sub.2. The current control, voltage regulator and other circuitry as shown in FIG. 1 or other such two wire circuitry may then be used. When the two wire circuitry of FIG. 1 is used and when other two wire circuitry is used, again the amplifiers may receive their power through the two wire terminals. The advantages of FIG. 1 are present in the embodiments of FIGS. 2 and 3.

Those skilled in the art understand that a variable impedance is comprised in a variable AC reactance means.

The instant invention has been described by reference to several preferred embodiments, those skilled in the art recognize that various changes in form and detail may be made without departing from the spirit or scope of the invention.