Injector Drive Circuit

The present invention relates to an injector drive circuit for a fuel injection system comprising a control circuit for calculating the amount of the fuel supplied to the engine as a time width of an electrical pulse and an injector with the valve thereof opened in accordance with the time width of the electrical pulse supplied from the control circuit, or more particularly to an injector drive circuit for the fuel injection system, in which the current supply to the injector is controlled optimally.

An example of the conventional drive circuits of this type is disclosed in Japanese Patent Laid-Open Publication No. 125932/77 corresponding to U.S. Pat. No. 4,180,026. FIG. 1 shows a schematic block diagram showing the same and FIG. 2 shows waveforms of operation of various parts thereof. This example will be explained with reference to FIGS. 1 and 2. When a comparator is supplied with a pulse signal .tau. from a control circuit ECU for calculating the amount of the fuel supplied to the engine as an injection time width as shown in FIG. 2(a), the output of the comparator 1 becomes low level as shown in FIG. 2(b). This signal is converted into high level at a voltage converter circuit 2 thereby to turn on a transistor Tr1. A current begins to flow in an injector 130, so that the emitter voltage of the transistor Tr1 begins to increase slowly as shown in FIG. 2(e) by the particular current and the resistor R1 connected between the emitter and the earth. When this voltage exceeds the first reference voltage V1 of the comparator 3, the comparator 3 reaches a high level as shown in FIG. 2(c). This high-level signal is applied to the voltage converter circuit 2 in a circuit configuration to turn off the transistor Tr1. Upon the turning off of the transistor Tr1, the current stops flowing in the injector 130, that is, the current more than the peak value corresponding to the first reference voltage V1 does not flow in the injector 130. Then the emitter voltage of the transistor Tr1 is reduced to low level, and the output of the comparator 3 is also reduced to low level again as shown in FIG. 2(c). In view of the fact that signal .tau. from the control circuit ECU is still at high level and that the output of the comparator 1 is at low level, however, the current begins to flow again in the injector 130 as soon as the output of the comparator 3 is reduced to low level. The circuit is so configured that at the time point when the emitter voltage of the transistor Tr1 exceeds the first reference voltage V1 of the comparator 3 and the comparator 3 becomes high in level, the output of the bistable multivibrator 4 is reduced to low level as shown in FIG. 2(d), whereby the reference voltage of the comparator 3 is changed to the second reference voltage V2 set lower than the voltage V1. For this reason, when the current begins to flow again in the injector 130 and the emitter voltage of the transistor Tr1 increases as shown in FIG. 2(e), the output of the comparator 3 reaches a high level as shown in FIG. 2(c) at the time point when the emitter voltage of the transistor Tr1 exceeds the second reference voltage V2 of the comparator 3, so that the transistor Tr1 is turned off and the emitter voltage of the transistor Tr1 is reduced to low level, thus reducing the output of the comparator 3 to low level again. In this way, the current flowing in the injector 130 is maintained at a holding current corresponding to the second reference voltage V2. This holding current is small as compared with the peak current and substantially constant. When the signal .tau. applied to the comparator 1 is reduced from high level to low level, the transistor Tr1 is turned off followed by the signal .tau. increasing from low level to high level, in preparation for the next cycle of similar operation. A delay circuit 5 is for delaying somewhat the timing of reduction of the bistable multivibrator 4 to low level, so that the timing of the turning on of the transistor Tr2 is delayed and thus the injector valve opening time is advanced by use of the reverse electromotive force generated by the turning off of the injector 130 when the peak current of the injector 130 is reached. The flyback control section 6 is for absorbing the reverse electromotive force generated by the turning on and off of the transistor Tr1 in the operation range of the holding current after the decrease of the output of the bistable multivibrator 4 to low level and the similar decrease of the output of the delay circuit 5 to low level, thus preventing the injector from being easily closed by the reverse electromotive force.

The conventional injector drive circuit of this type has the following disadvantages:

(1) The circuit is complicated.

(2) The peak current or the holding current (that is, the first and the second reference voltages V1 and V2 of the comparator 3) cannot be adjusted independently, and the adjustment takes a long time.

(3) If the frequency of setting the holding current by feedback is increased, the effect of the malfunction of other circuits cannot be ignored. If it is reduced, on the other hand, the variation in the holding current is enlarged, and when the system is mounted in a car, the injector is likely to open or close by the vibrations of the car.

The object of the present invention is to provide an injector drive circuit comprising a series circuit of a field effect transistor (FET) and an injector, a switching circuit for deciding whether or not the peak current is supplied to the injector at the time when the injector is open, means for maintaining the gate potential of the field effect transistor at a set potential during the period of the signal .tau. after supply of the peak current, and means for maintaining the current supply to the injector at a holding current corresponding to the set potential level, in which the holding current is regulated easily by a simple configuration and the holding current is set at the gate potential of the field effect transistor, thus liberating the system from the effect of car vibrations unlike in the conventional systems.

According to the present invention, the holding current for holding the valve opening after the opening operation of the injector valve is supplied from the field effect transistor, and the circuit function for setting this holding current is independent of the circuit function for determining the peak current value causing the valve opening operation of the injector. Thus it is possible to regulate each current easily independently. Further, the value of the holding current is regulated not by the feedback oscillation but by the resistance value between the drain and the source depending on the gate potential of the field effect transistor unlike in the conventional systems. As a result, the effect on the other circuits is completely eliminated on the one hand and there is no variation of the current value on the other hand.

According to another aspect of the present invention, the peak current may be supplied not only to the field effect transistor but also to a power transistor, thus making it possible to supply a sufficient amount of current to the injector.

FIG. 1 is a block diagram showing a conventional injector drive system.

FIG. 2 shows output waveforms generated at various parts of the conventional system of FIG. 1.

FIG. 3 is an electrical circuit diagram showing a first embodiment of the present invention.

FIG. 4 shows output waveforms produced at various parts of FIG. 3.

FIG. 5 is an electrical circuit diagram of the essential parts of a second embodiment of the present invention.

FIG. 6 shows characteristics of the field effect transistor shown in FIG. 3 .

The present invention will be described with reference to the embodiments shown in the drawings. A first embodiment is shown in FIG. 3. In this drawing, a terminal 10 is connected to a battery for supplying 12 volts to the injector and the circuits. A terminal 11 is impressed with a control signal .tau. from a control circuit ECU for controlling the operation of the valve of an injector 130, namely, for controlling the amount of the fuel injected. Terminals 12 and 13 are connected across the injector 130 to pass a current for operating the valve of the injector 130. Reference numeral 100 shows a constant-voltage source which, in this embodiment, supplies a constant voltage of 8 V to inverters 104 and 105, NAND gates 106 and 107, D-type flip-flops 108 and 109 and a PNP transistor 110. Numeral 115 shows a comparator, numeral 111 a PNP transistor, and numeral 112 a zener diode for providing a constant voltage of, say, 5.0 V in this embodiment. Numeral 113 shows an NPN power transistor, numeral 114 a MOS type N channel field effect transistor, numeral 101 a resistor of 100 K.OMEGA., numeral 102 a resistor of 10 K.OMEGA., numeral 103 a capacitor of 0.1 .mu.F, numeral 116 a resistor of 1 K.OMEGA., and numeral 118 a variable resistor which has a maximum resistance value of 5 K.OMEGA. in this embodiment. Numeral 117 shows a resistor of 22 K.OMEGA., numeral 119 a resistor of 22 K.OMEGA., numeral 120 a resistor of 22 K.OMEGA., numeral 121 a resistor of 180 .OMEGA., numeral 122 a resistor of 1 K.OMEGA., numeral 123 a resistor of 0.2 .OMEGA., numeral 124 a resistor of 10 K.OMEGA., and numeral 125 a variable resistor which has a maximum resistance value of 2.0 K.OMEGA. in this embodiment. Numeral 126 is a resistor of 10 K.OMEGA..

The operation of the circuit having the abovementioned configuration will be explained with reference to the operating waveforms shown in FIG. 4. In this diagram, the waveform 200 shown in (a) represents a control signal (injection pulse signal) .tau. from the control circuit ECU which is applied to the terminal 11, the waveform 201 shown in (b) represents a control signal reversed in polarity by the inverter 105, the waveform 202 shown in (c) represents the Q output of the D-type flip-flop 108, the waveform 203 shown in (d) represents the output of the NAND gate 106, the waveform 204 shown in (e) represents the output of the comparator 115, the waveform 205 shown in (f) represents the Q output of the D-type flip-flop 109, the waveform 206 shown in (g) represents the output of the NAND gate 107, and the waveform 207 shown in (h) represents the current flowing in the injector 130.

When the battery power is supplied to the terminal 10 at the time of engine start in response to the power throw in, a high level signal is generated at the output of the inverter 104 by a reset signal generator circuit including resistors 101 and 102, a capacitor 103 and an inverter 104, thus resetting the D-type flip-flops 108 and 109. The capacitor 103 is charged to the same voltage level as the source voltage by the resistor 101, thus reducing the output of the inverter 104 to low level. The Q output of the D-type flip-flop 108 and 109 is at low level and the Q output thereof is at high level when the flip-flops 108 and 109 are reset. When the control signal applied to the terminal 11 is raised from low level to high level, namely, when the injection pulse .tau. is supplied to the terminal 11, the Q output of the flip-flops 108 and 109 remains at high level since the D terminal of the D-type flip-flop 108 is grounded. Thus, both the inputs of the NAND gate 106 is raised to high level and therefore the output thereof is reduced to low level. The base current of the PNP transistor 110 flows through the resistor 117, and the collector current flows in the PNP transistor 110. This collector current forms the base current of the power transistor 113, and therefore the power transistor 113 becomes conductive so that current begins to flow in the injector 130. Let the internal resistance of the injector 140 be Ro, the supply voltage to the injector be E and the inductance thereof be L. Then, the current represented by the inclined part of the current waveform shown in 207 of FIG. 4(h) increases in the manner shown by the equation below. ##EQU1## With the increase in the current flowing in the injector 130, the voltage at the junction point of the emitter of the power transistor 113 and the resistor 123 increases. Since this voltage is connected to the plus input terminal of the comparator 115, the voltage at this plus input terminal also increases. When the voltage at this plus input terminal exceeds the set value at the minus input terminal of the comparator 115 which is set by the resistor 126 and the variable resistor 125 (when the current to the injector 130 reaches the peak value corresponding to this set value), the output of the comparator 115 is raised from low level to high level. This output is connected to the preset terminal of the D-type flip-flops 108 and 109, and therefore the Q output of the D-type flip-flop 108 is reduced to low level, while the Q output of the D-type flip-flop 109 is raised to high level. As a result, the output of the NAND gate 106 is raised to high level, so that the base current of the transistor 110 stops flowing and so does the base current of the power transistor 113. Thus the power transistor 113 is cut off, and the current stops flowing in the injector 130. In view of the fact that the output of the NAND gate 107 is reduced to low level, however, the base current of the transistor 111 flows and thus the transistor 111 begins to conduct. As a result, the gate of the MOS FET 114 is impressed with a set voltage substantially equal to a voltage of the zener diode 112 as divided by the variable resistor 118 and the resistor 119. This gate voltage is controlled by the variable resistor in such a manner that almost the minimum holding current required for keeping the valve of the injector 130 to be opened flows to the injector 130 through the field effect transistor 114. This holding current is kept at about 1.2 A for 12 V of the battery voltage according to this embodiment. This state continues to be kept until the control signal 200 is reduced from high to low level, namely, during the period when the injection pulse signal .tau. is applied. When the control signal 200 is reduced from high to low level, the clock input terminal of the D-type flip-flop 109 is raised from low level to high level. Therefore, the low-level state of the D input terminal of the D-type flip-flop is taken in, thus reducing the Q output to low level. The output of the NAND gate 107 is raised to high level, the base current of the transistor 111 stops flowing, the transistor 111 is cut off, the gate voltage of the MOS field effect transistor 114 is reduced to zero, and the MOS field effect transistor 114 is cut off, thus stopping the current flow in the injector. In this way, when the control signal 200 is raised from low level to high level, the above-mentioned operation is repeated.

A second embodiment shown in FIG. 5 will be explained. In the above-mentioned first embodiment of FIG. 3, the NPN power transistor 113 is used at the rise portion of the injector current where a large current is required, and the field effect transistor 114 is used when the current is small, removing the problem that since as shown in FIG. 6 the characteristics of the field effect transistor are such that when the drain-source voltage is decreased, the current capable of being supplied is reduced even if the gate voltage is the same, it then becomes impossible to supply a sufficient current required for driving the injector when the voltage across the battery mounted in the car drops to, say, lower than 10 volts. In the case where the current to the injector is sufficiently large at the time of a drop of the battery voltage or when the characteristics of the field effect transistor are improved, however, the power transistor 113 need not be used but the field effect transistor 114 may be used also therefor as shown by the second embodiment of FIG. 5. The other circuit configuration and the operation thereof are the same as those of the first embodiment and the description is omitted.