Current Mode Biquadratic Active Filter

This invention relates to the field of active filters and, more particularly, to filter design using current mode operation, a minimum of components and supply voltage, and which is particularly suited to IC implementation.

In the past, most biquadratic active RC filter designs have used voltage mode operation with a relatively large number of components. The use of these filters in integrated circuit form has been limited by filter frequency variations due to the large tolerances on IC resistor and capacitor values, and by Q-enhancement or oscillation at high frequencies. These tolerances necessitate filter tuning if filter frequency is critical. The performance of many existing filter circuits would be degraded in an IC implementation due to the need for ungrounded capacitors. As is known in IC design, any capacitor not connected to either real or AC ground will be accompanied by a parasitic capacitor. Some previous designs have also required differential inputs which usually require additional components.

It is, therefore, an object of the present invention to provide a current-mode, second order low-pass, band-pass or high-pass active filter requiring a minimum number of components.

It is a particular object to provide such a filter by simple integrated circuit implementation, with either fixed or variable tuning, and for operation with a low voltage supply.

It is a specific object to provide a filter which will realize one-port impedance functions with two-port voltage, current or impedance transfer functions.

These objects and others are obtained in a filter circuit requiring, as a basis, two transistors of similar type, coupled in series fashion between a source of bias current and ground. The dynamic resistances of the base-emitter junctions are used as resistive elements of the filter. A capacitor is coupled across the base-emitter junction of one transistor and another capacitor across the base-emitter junction of the second transistor. The choice of input and output points determines the mode of operation as well as the filter characteristic.

FIG. 1 is a block diagram of the basic circuit of the invention.

FIG. 2 is an I/O chart for FIG. 1.

FIG. 3 is a schematic diagram of a basic circuit design of the filter of the invention.

FIG. 4 is a schematic diagram of a variation of the circuit of FIG. 3.

FIG. 5 is a chart of types of inputs and outputs as related to the circuits of FIGS. 3 and 4.

FIG. 6 is a schematic diagram of a second variation of the circuit of FIG. 3.

FIG. 7 is a schematic diagram of a third variation of the circuit of FIG. 3.

FIG. 8 is a schematic diagram of an alternate design for the filter of the invention.

FIG. 9 is a schematic diagram of a variation of the circuit of FIG. 8.

The block diagram of FIG. 1 is a tunable current mode active filter which can realize second order low-pass and bandpass current transfer functions. The amplifiers in FIG. 1 are current gain amplifiers, each with a first order low-pass characteristic as follows: ##EQU1## where K.sub.A and K.sub.B are the DC current gains and .omega..sub.A and .omega..sub.B are the 3 db corner frequencies for the two amplifiers. Frequencies .omega..sub.A and .omega..sub.B are simultaneously controlled by a bias source C connected to both amplifiers. The amplifiers are connected in a negative current feedback configuration as shown in FIG. 1. To ensure negative current feedback, one amplifier must be non-inverting and the other inverting. An input current can be applied to either point D or point E. Output currents are simultaneously available at points F and G. To utilize the output current(s) a floating (ungrounded) load would be inserted in the line at the output of either or both amplifiers. The low-pass and bandpass current transfer functions available are tabulated in FIG. 2. In particular, the low-pass and bandpass current transfer functions available from points F and G with a small-signal current source input at point D are given by: ##EQU2## Filter frequency .omega..sub.n can be controlled by using bias source C.

In FIG. 3, the basic circuit of the filter design is given, with Q1 and Q2 both NPN transistors, and coupled in series between a source of bias current and ground with the collector of Q2 connected to the base of Q1. Across the base-emitter junction of Q1 is C1 and across the base-emitter junction of Q2 is C2, with a bias voltage coupled to the base of Q2. FIG. 3 could equally well show the capacitors C1, C2 coupled from the collectors of Q2, Q1, respectively, to actual ground since V.sub.BIAS is at AC ground potential. Referring to the chart of FIG. 5, it will be seen that if an input current I1A is coupled into the node designated V1, current output I1 may be taken from the collector of Q2, giving a low-pass characteristic. At the same time, from the collector of Q1, an output current I2 with a bandpass characteristic can be obtained, a voltage output is available at V1 with a bandpass characteristic, and a voltage output is available at V2 with a low-pass characteristic. If, instead, current source I1B is coupled into the node V2, the previously given characteristics will be reversed; i.e., I1 will have a bandpass characteristic, I2 will have a low-pass characteristic, at V2, a bandpass characteristic will be obtained, at V1, a low-pass characteristic. If, on the other hand, the available input is a voltage, it may be inserted at four different points and, again, a variety of output characteristics may be obtained, including a high-pass characteristic. If, for example, a voltage signal source VOA is coupled between the emitter of Q1 and ground, at node V1 a low-pass characteristic will be obtained and at V2 a bandpass characteristic, whereas if the input signal is applied at VOB, a high-pass characteristic will be obtained at V1 and a bandpass characteristic at V2. It is to be understood that while two current inputs and four voltage inputs are indicated, only one input would normally be utilized at any one time; i.e., any unused voltage source would be replaced by a short circuit, and any unused current source by an open circuit. The drawing is so drawn to avoid a multiplicity of drawing figures.

The filtering operation of the circuit is the result of the current feedback loop consisting of transistors Q1 and Q2 and the controlled phase shift around the loop. Phase shift is controlled by the two capacitors C1 and C2, and by the dynamic resistances r.sub.e 1 and r.sub.e 2 of the forward biased base-emitter junctions of the two transistors Q1 and Q2. For proper operation, the filter circuit requires two DC bias supplies, V bias and I bias. V bias is a DC voltage source which is selected to be approximately 1.5 times the average base-emitter voltage drop of transistors Q1 and Q2. The V bias supply limits the minimum DC operating voltage of the filter to approximately 0.8 volts. I bias is a DC current source which is needed to control the DC emitter currents of Q1 and Q2. For sufficiently large transistor .beta., the low-pass, bandpass and high-pass voltage transfer functions are given by: ##EQU3## From these expressions, filter frequency .omega..sub.n and Q can be derived: ##EQU4## where r.sub.e 1 is an inverse function of I.sub.e 1, the DC emitter current in Q1, and r.sub.e 2 is an inverse function of I.sub.e 2, the DC emitter current in Q2. For large transistor .beta., (.beta.>>1):

In this case, equation (5) reduces to ##EQU5## showing that filter Q is determined by the ratio C2/C1. From the above equations, it will be seen that filter frequency .omega..sub.n is directly proportional to the DC bias current I.sub.BIAS. Therefore, the filter frequency is tunable, independently of filter Q, by varying the DC bias current. The frequency of several cascaded active filter sections can be controlled simultaneously by applying the same bias current to each section. This is easily accomplished by using the tracking current sources available on integrated circuits.

In FIG. 4 a third transistor, Q3, has been added to permit the utilization of output current I2 in a nonfloating load. All filter responses in column I2 of FIG. 5 are available except for that requiring input voltage VOA.

In FIG. 6, it will be seen that a second biasing current source I.sub.BIAS 2 has been added at node V2 to allow separate control of the DC emitter currents of transistors Q1 and Q2. From equation (5), given above, it will be seen that filter Q can also be controlled by adjusting the ratio of the two biasing current sources. A given filter Q can, therefore, be realized by using less circuit capacitance (C1+C2) than is possible for the basic filter circuit of FIG. 3. This is especially important in integrated circuit applications. The filter frequency is tunable over a wide frequency range, independent of Q, by using two tracking current sources to control the two bias currents.

In FIG. 7, another modification of the basic circuit is given, wherein two resistive elements R1 and R2 have been added in series with the emitters of Q1 and Q2 in order to improve dynamic range. The large-signal performance and dynamic range of the basic circuit are limited by the non-linear voltage-current characteristic of the transistor forward-biased base-emitter junction. Therefore, an improvement in these characteristics can be achieved if a portion of the non-linear resistance is replaced by a discrete linear resistance. One disadvantage of this modification is that the frequency range over which the filter can be tuned by adjusting the bias current is now reduced, and the filter frequency becomes a non-linear function of the bias current. Obviously, however, if the advantages of this circuit outweigh the disadvantages for a particular application, including the need for two discrete resistive elements, this circuit would be chosen.

In FIG. 8, another version of the filter circuit is given which is not merely a modification of that shown in FIG. 1. It will be seen that the transistors Q1 and Q2 are no longer of the same type, and that an additional biasing current source (I.sub.BIAS 1) has been added at node V2. An advantage of this alternate circuit is that the range of V.sub.BIAS is now limited only by the B+ supply voltage. In the circuit of FIG. 3, V.sub.BIAS was constrained to a narrow range of voltage values; i.e., between one and two base-emitter voltage drops.

In FIG. 9, a p-n junction diode D1 has been added to the circuit shown in FIG. 8 to improve the dynamic range. An added advantage provided by this modification is that, where I.sub.BIAS 1=2I.sub.BIAS 2, the DC offset voltage between the base of Q2 and node V2 is zero. This condition allows low-pass filter sections using input voltage source VOC and output node V2 to be cascaded, and to operate at power supply voltages lower than one volt.

It will be understood by those skilled in the art that, of the various modifications given hereinabove, many combinations thereof may be made; e.g., the circuit modification of FIGS. 4 and 7 are applicable to the alternate circuit of FIG. 8. It is, of course, understood that the actual transistor types given herein are exemplary only and are not to be construed as limiting.

Thus, there has been shown and described an improved active filter for implementation on an integrated circuit chip, in which the dynamic resistance of the base-emitter junctions of two transistors are utilized in conjunction with two relatively small capacitors to provide a multiplicity of operational modes and filter characteristics. Since the capacitors are connected either to real ground, AC ground, or a zero impedance small-signal voltage source, parasitic capacitors are either eliminated or their effect made negligible and implementation in integrated circuit form becomes possible without performance degradation. It will be apparent that other modifications and variations of the examples given hereinabove are possible within the spirit and scope of the appended claims.