Error Logging for Automatic Apparatus

U.S. Pat. No. 4,170,414 (assigned to the same assignee as the present case) is incorporated by reference and hereinafter referred to as Reference '414.

This invention relates to error logging particularly to logging errors of a transient nature.

The proper analysis of machine errors provides an early indication of machine malfunctions. For example, when a part wears beyond its tolerance, it begins to cause malfunctions which increase in frequency until there is a complete breakdown. Some machine errors occur, however, which are not caused by machine failures but rather by improper input material or operator error. These errors are of a transient nature and tend to disappear over a period of time. Logging of such errors can provide a misleading indication which increases maintenance cost because of the unnecessary replacement of parts and the use of the maintenance personnel time.

An example of such errors is paper handling errors that occur in copier systems. A special error logging for paper handling errors is desirable for several reasons. Paper handling errors are more prevalent than others and have a wider variety of causes. One cause is the sensitivity of paper handling systems which must be designed to handle a wide range of paper types and sizes. Another cause is the variance of paper quality and changes in characteristics caused by varying humidity. Another cause is the operator's failing to observe certain precautions or not following instructions. Paper handling errors have an erratic occurrence with long periods of no errors and many errors in a short period.

Errors can be integrated over a period of time determined by the number of attempts to perform an event. In the paper handling case, for example, the errors might be integrated over every one thousand paper commands. If paper handling errors are being caused by a faulty ream of paper, it would be characteristic that a number of errors would occur over a short period of time followed by a period of no errors after a ream of good paper was loaded in the machine.

It is undesirable for such transient errors to accumulate over a period of time because they provide misleading indications of machine performance. It is, therefore, desirable to have an error logging scheme which integrates errors over a period of time and which has a long memory and short recovery period.

A defect monitor is shown in U.S. Pat. No. 3,408,486 which utilizes a reversible counter for counting up when counting rejects and for counting down when counting nondefectives. For the purposes discussed above, the system according to the patent recovers too slowly and provides only a short history of defective items.

An error log system for electrostatographic machines is shown in U.S. Pat. No. 4,062,061. A fault flag array is scanned, having a flag associated with each operating component so that in case of failure, a cumulative error count related to each flag is incremented. Such an error logging system merely counts the number of errors and does not provide for integration or recovery.

In accordance with the invention, a control system, supplying command signals to initiate system functions and having means for producing error signals that indicate malfunctions of the system, provides a control signal after a given number of command signals have been supplied. An error counter responds to error signals to provide a count value representing the total number of error signals which have occurred. There is also provided a sensing means that produces a value signal when the error count exceeds a given value. An exception counter is incremented by the control signal whenever the value count signal is present and resets the exception counter when the value signal is not present.

FIG. 1 is a block diagram illustrating an embodiment of the invention.

FIG. 2 is a flowchart outlining the operation according to the invention.

FIGS. 3, 4 and 5 are flowcharts showing the details of a program for implementing the invention.

FIGS. 6, 7 and 8 are flowcharts showing a second routine for implementing the invention.

Two types of machine failures can be considered--hard failures and soft failures. A hard failure is considered to be of the type which requires an immediate stop of the machine and the intervention of an operator or service personnel to correct the cause before the machine can be restarted. In a copier system, for example, a hard error would be a paper jam which leaves papers in the paper transport path. A soft failure is one which does not require the machine to stop but which allows the machine to continue by retrying the failed event. An example of a soft error is a failure to feed a copy sheet in a copier system, a failure which can be ignored and retried a given number of times. Such an error can be caused by improper paper, improper paper handling such as failure of the operator to align the paper, and so on, and not a malfunction of the machine per se.

The logging scheme to be disclosed counts exceptions. The exception count is the number of consecutive times that the error count, accumulated over a given number of operations, exceeds a given criterion. The number of operations is called an accumulation interval and may be different for each error.

An error count is provided, of course, for each type of error expected to be encountered or of interest. The errors are not accumulated during maintenance activities unless specifically activated. In one embodiment, it will be seen that when the exception count reaches fifteen, it is frozen.

In FIG. 1, a limit register 10 contains the given number of operations over which the errors are to be accumulated. A counter 11 is incremented by each command signal and its count is compared with that of the limit register 10 in a comparator 12.

A criterion register 15 holds the criterion value and an error counter 14 accumulates the number of errors associated with the command signal. A second comparator 16 compares the value of the error counter 14 with that of the criterion register 15 and produces an output signal when the error count is not less than the value in the criterion register and another signal when it is.

The output signal from the comparator 12 is generated when the command counter value is equal to the value in the limit register 10. The equality signal (control signal) from the comparator 12 primes two AND gates 17 and 18 which have as their other input the two signals from the comparator 16, respectively.

If the error count value is not less than the criterion value, the AND gate 18 is activated, incrementing an exception counter 19. If the error counter value is less than the criterion value, the AND gate 17 is activated, clearing the exception counter 19.

A delay device 13 provides a reset signal for the command counter 17, and the error counter 14 after each accumulation interval.

An exception counter according to the invention has been described in connection with FIG. 1. The logic devices represented by the blocks are commercially available and well known to those of ordinary skill in the art.

In a computer controlled environment, however, it is desirable to practice the invention using a general purpose programmed computer or microprocessor. For example, where the machine control is accomplished by a programmed processor, the above-described logging routine according to the invention is preferably practiced using the same processor.

FIG. 2 is a flowchart depicting the sequence of steps of the invention.

At the step 20, two counters M and N are reset to zero. The counter M represents the command counter and the counter N represents the error counter. At the step 21, a check is made to determine whether a command has issued. If not, the check step is repeated. When a command has been issued, the step 22 is performed which increments the command counter M by a value of one. At the step 23, a determination is made whether an error occurred. If so, at the step 24 the error counter N is also incremented by one. If no error occurred or after the error counter has been incremented, at the step 25, a determination is made whether the command counter value M is equal to a limit value. If not, the program returns to the step 21. If the limit of the command counter M has been reached at the step 25, then at the step 28, a determination is made whether the value of N, the error count, is less than the criterion. If so, then at the step 26, the exception counter is cleared to zero. On the other hand, at the step 28 if the value of the error count N is not less than the criteria, then at the step 27, the exception counter is incremented by a value of one. After the steps 26 and 27, the program returns to the step 20, clearing the command and error counts and repeating the process described above. The program of FIG. 2 is suitable for a single error counter. An actual machine, however, usually requires the logging of several different types of errors. This requires interaction and also requires that the error logging be arranged so that the machine can continue to control the machine. Therefore, the program is divided into two separate routines called CELOG and CEXCHK, the former for logging the errors and the second for maintaining the counts and checking the errors. The first routine, CELOG, is flowcharted in FIGS. 6, 7 and 8 and shown in detail in the following program Table I.

Reference '414 shows the details of a microprocessor suitable for incorporating the invention in the form to be described. The reference and the Appendix A provide the necessary detail to enable a person of ordinary skill in the art to practice the invention as disclosed.

The CELOG routine logs all the identified machine error conditions into the memory for use by the second routine. The CELOG routine is called with the error number to be logged in the low byte of the accumulator. If logging is active, this number is used to construct the address of the status log control table entry associated with the error number. As noted above, logging is inactive in the CE or maintenance mode unless specifically activated.

If the error is a paper handling error, and therefore among the first entries in the table, a counter associated with this error is incremented once for each occurrence of that error in the accumulation period until fifteen occurrences have been logged at which point the counter is frozen. Separate counters are maintained by this program for hard and soft error conditions.

If the error is a history error (or in another embodiment, a nonpaper handling error), it is logged in a six-deep history stack, that is, a last-in/first-out register with a maximum of six locations which implies that only the last six errors are available in the stack. The history stack is over-log protected. An error will not be logged two or more times in a row unless there have been fifteen intervening attempts to log that error. The over-log protection is reset when the current error is different from the previous error number. All errors are logged in another six-deep error stack having no over-log protection. The last attempted log error number is always saved even when logging is inactive or if the error number is invalid.

If an interrupt occurs during an error log and, during the interrupt another call to the program is made, the first error number is saved and the logging of the original error continues after the interrupt. When the first log is completed, the interrupt error is processed. This interrupt protection is valid only from certain modules which are not essential to an understanding of the invention.

The status log control table used with the program to be explained below have entries as follows. In the first byte, the bits zero and one identify counters associated with the error to be logged. Bit two is not used. Bit three is used, when set, to indicate that an alternate criterion byte is available in the memory. That is, more than one criterion can be used, the table entry indicating when the alternate criterion is active. The fourth bit, when set, indicates that an error message associated with the error to be logged is in the special message table. The fifth bit indicates, when set, that the error is a paper handling error; bit six, a soft error; and bit seven, a hard error.

The second byte gives the relative address of the error message associated with the error.

The third byte is the relative address of the log counter associated with the error. This byte forms the lower byte of the complete address of the counter, the other address portion being supplied by bits zero and one of the first byte as noted above.

The fourth byte is divided into two hexadecimal characters, the low order indicating the number of 256 copy attempts between exception updates. The high order hexadecimal digit is the criterion to be used in exception updating, unless an alternate criterion has been specified. If an error can be either hard or soft, the soft error limit and criteria are defined in this byte which apply only to the first (hard) error type.

The fifth byte operates the same as the fourth byte except it pertains to the second type of error.

The counters in the memory for logging the error occurrences and count exception are organized as follows. The first byte is divided into two hexadecimal digits, the low digit being the exception counter for a soft error and the higher digit being the error occurrence counter for a hard error. Bit three of this byte is set if alternate criterion have been established for the associated error.

The second byte is organized the same as the first byte but related to the hard error type. The third byte contains the alternate criterion, the lower hexadecimal digit being the altered criterion for the first error type and the high order digit, for the second error type.

The abbreviations used are identified in Appendix B.

The reference numerals of the steps in the following flowcharts relate to corresponding line labels in the program tables. The reference numerals in FIGS. 6, 7 and 8 are independent from those in FIGS. 3, 4 and 5.

In FIG. 6, the first step 353 of the routine saves the current error number and sets the inhibit interrupt flag. Next, the step 365 tests to determine whether the maintenance mode is active. If so, the step 371 determines whether the error log is to be active. If not, the routine is exited; otherwise, the program resumes at the step 403 where the current error number is transferred to the pending error byte.

Next, by the step 411 it is determined whether a log is in progress by checking the pending error register for a nonzero value. If another log is in process, the new error number is saved and the routine is exited; otherwise, the program continues at the step 418 where the inhibit flag is reset and the error number is stored.

At the step 456, it is determined whether the error is a paper handling error. If not, then at the step 488, the index is set up for a nonpaper handling error; otherwise, at the step 466, the index is set up for a paper handling error. Next, the step 499 sets the pointer and fetches the flag byte.

The connector indicates that the program continues on FIG. 7 where at the step 539 a branch is taken depending on whether the error was a paper handling error. In the case of a paper handling error, the pointer to the error log which was set at the previous step 499, is incremented by the step 548. If this is a hard error and a soft error exists, as determined by the steps 574, the soft error count is decremented and the pointer is advanced to the hard error counter. If the steps tested in the step 574 are not true, the step 590 is skipped and the step 613 is performed to increment the error count.

The step 627 determines whether the error count is not greater than fifteen. If so, then at the step 636, the error counter is stored. Thus, if the error count has reached fifteen, the count is frozen.

After the error count has been taken care of, the program continues with the step 652 and the previous steps would have been skipped if not a paper handling error as determined by the step 539. The step 652 determines whether the error should be stored in the history file. If not, the program continues at the location indicated in FIG. 8. Otherwise, the history entry is checked by the step 691 to see whether it is the same entry. If not, then by the step 716 the over-log count is cleared to zero; otherwise, at the step 704 the over-log count is decremented. Next, the step 718 clears the upper byte and stores the over-log count. Then the error is pushed onto the stack by the step 732 if the error log count is equal to zero as determined by the step 726. Otherwise, the step is skipped and the program continues as indicated in FIG. 8.

If FIG. 8, the step 772 determines whether the present hard error was the same as the preceding soft error. If not, then the step 809 pushes the error on the "last six" stack; otherwise, the step 798 changes the last stack error to a hard error. Next, the step 847 determines whether there is a pending error. If not, the pending error is cleared and the routine is exited. If there is a pending error, then at the step 874 the last call is logged and the routine is exited.

In the second routine, the CEXCHK program updates the error criterion exception counters. After every 256 copy attempts, an update of the error log is requested. When a standby state is subsequently entered, this module begins the update procedure. Each zero crossing of the power supply initiates a loop in which a single error log is updated until all the paper handling errors having a criterion have been processed.

In an update, the high byte of the copy attempt counter is compared with the update limit which is the number of 256 copy attempts between updates. The counter is divided by the limit and a zero remainder indicates the programmed number of blocks have elapsed and an update is indicated.

If an update is indicated, the criterion is fetched, normally from the status log table but it is possible to substitute an alternate criterion which is field programmable into the memory. The presence of the alternate criterion bit in the counter byte causes the alternate criterion to be loaded.

The number of errors since the last update is compared to the criterion. If the error count equals or exceeds the criterion, the exception count is incremented by one (up to a limit of fifteen). Otherwise, the exception counter is cleared. In both cases, the current error counter is cleared. If a zero criterion is encountered, then both the exception and error counts are cleared to zero. If the error being updated is of the dual type, both hard and soft, the hard error log is updated immediately after the soft error log. When the second update is completed or if there is only one error type, the module is exited.

When all error logs have been updated, the last exception counter is updated and the update request flag, set by the copy attempts counter, is reset. This routine is then bypassed for approximately 256 copy attempts. A copy attempt corresponds to the command described above.

The exceptions updating is inhibited when the machine is in the service mode and the service mode is inhibited while exceptions updating is active.

The memory counters used to log the errors and count exceptions are organized as follows. The low hexadecimal digit of the first byte is the exception counter for the first type of error and the high digit are the occurrence counters for the first type of error. If bit three is set, then an alternate criterion has been established for this error. The second byte is organized the same as the first byte for a second or hard type error.

Byte number three is the alternate criterion for the first error type.

The routine is shown in FIGS. 3, 4 and 5 and described in detail in the following program Table II. In FIG. 3, at the step 681, the routine is exited if in the service mode. Next, the step 698 determines whether the routine is in the first pass and, if so, inhibits the service mode by the step 706.

If the copies are a multiple of 2.sup.10, the pointer is initialized to the top of the log table by the step 731 and the step 742 causes the pointer to be advanced until a nonzero entry is found or until the last entry has been found. Then the step 781 clears the entry to zero and initializes the pointer to the status log. Next, the step 812 is performed, the previous steps being skipped if not in the first pass of the program. The step 812 advances the pointer and saves the flag byte. Next, the step 853 determines whether it is a dual type error. If so, it sets a flag indicating the first of two passes by the step 867 and otherwise continues on FIG. 4 as indicated.

In FIG. 4, the step 873 sets a first time flag and initializes the pointer to the error log. Next, at the step 915 the pointer is advanced to the criteria, the last exception count is fetched from memory, and the decision flag is cleared. In the step 935, the last update time count is incremented by one and the criterion is fetched. In the step 003, the last update is divided by the update count of the last update and, if the remainder is zero, then the update flag is set by the step 017. Otherwise, the program continues at the step 930 where a comparison is made to determine whether the last update time is equal to the current update count. If not, the program returns to the step 935 described above. If so, the update flag is checked by the step 042. If the update flag is set, then at the step 053, the error count and exception count are fetched from memory and the current error is stored. If the update flag was not set, the program continues at the step 249 which will be described below.

Next, at the step 071, it is determined whether an alternate criteria is to be used. If so, the first out of two pass flags is checked by the step 076 to determine whether the hard alternate criteria is to be fetched by the step 111. If the flag is set, the soft alternate criteria is fetched by the step 095. If the flag is reset, the hard alternate criteria is fetched by the step 111. Next, the step 122 determines whether the first time flag is set and if not, justifies the criteria by the step 142. If the alternate criteria is not to be used, then at the step 159, the standard criteria is fetched and the program continues at the decision step 178 which determines whether the criteria is not zero and the error count is not less than the criterion. If so, the exception count is checked to determine whether it is less than fifteen by the step 191. If so, then the exception count is incremented by the step 212.

If the criterion is zero or if the error count is less than the criteria, the exception count and the current error count are reset by the step 223.

Next, the step 236 is performed which clears the current error count and stores the updated count. Then the step 249 advances the error log pointer and resets the first time flag. Next, the step 270 determines whether all errors have been handled and if not, returns to the step 915 and the process described above is repeated. Otherwise, the program continues as indicated at FIG. 5.

In FIG. 5, the step 275 tests whether it is the last entry in the table. If so, then at the step 295 the check exception, the maintenance inhibit and the first pass flags are reset. Then the last exception count is updated and the program is exited at the step 332, the above steps being skipped if the last entry has not been processed as determined by the step 275.

Various modifications to the systems and procedures described and illustrated to explain the concepts and modes of practicing the invention can be made by those of ordinary skill in the art while remaining within the principles and scope of the invention as expressed in the appended claims.