US 4,331,941 AGrant
Digital Phase Domain Amplitude Modulation Method and Apparatus
Issue Date:1982-05-25
•24 Claims
•6 Drawing Sheets
Abstract
A modulating signal is applied to an analog-to-digital converter which addresses a read-only memory phase look-up table. The read-only memory phase look-up table output is applied to a polarity generator. The polarity generator output and output from a phase accumulator are input to a phase adder. The phase adder output is applied to the input of a sine look-up read-only memory whose output is applied to a digital-to-analog converter and low-pass filtered to produce an amplitude-modulated carrier signal. The invention thereby digitally amplitude modulates a carrier signal in the phase domain without any multiplication being required.
Metadata
Assignee
- Hewlett-Packard Company
Inventors
- Al Kovalick
- Rolly Hassun
Application Information
Application Number:US 1260839
Filing Date:1980-02-29
Priority Date:1980-02-29
Art Unit:252
Classifications
IPC:
H03C 150
Field of Search:
3323754553289 R;9 T;16 R;16 T;17;31 R;31 T;44;4523;41;42;43;44;52;67116168
Patent Drawings (6 sheets)
Description
Background of the Invention
A known method for synthesizing sine waves is to generate harmonic frequencies from a reference clock and filter a selected harmonic frequency to obtain a desired frequency output. Another known method is to use a phase-locked loop having a digital divider in its feedback loop. Neither of these methods allows for phase continuous switching of the carrier, and both methods require extensive analog components which are subject to drift and malfunction through aging, temperature effects and the like.
A digital signal generator synthesizer is useful to avoid the above problems. A block diagram of a typical digital synthesizer known to the art is shown in FIG. 1. The defining relationship for frequency is F=(.DELTA..phi./.DELTA.T)(1/2.pi.). If .DELTA.T is the period of the digital clock, then .DELTA.T uniquely defines a frequency. It is known that frequency and phase modulation are simply obtainable from this synthesizer. Amplitude modulation, AM hereafter, is more difficult and is typically provided by a multiplier either before or after the digital-to-analog converter. If the multiplier is after the digital-to-analog converter, the structure takes the form of a common AM analog modulator. If the multiplier is inserted before the digital-to-analog converter, a complex digital multiplier is required.
Amplitude modulating after the digital-to-analog conversion is disadvantageous in that it prevents the entire generator from being in digital form. Also, the modulation index is not digitally controllable in a simple manner, and the analog multiplier degrades the carrier in terms of harmonics and spurious signal generation.
A digital multiplier approach eliminates these problems. Referring to FIG. 2, a typical arrangement for sine wave carrier amplitude modulation is shown. The modulating source may be any random wave with higher frequencies filtered to prevent aliasing. The carrier term sin (WcT) is typically derived from a ROM look-up phase-to-amplitude converter. The modulation term is 1+MRm(T), where M is the modulation index and Rm(T) is the modulating wave. This approach, although digital, presents several additional problems. The maximum carrier frequency is limited by the speed of the multiplier.
To reduce the spurious signals that result from too coarse an amplitude resolution at least 10 bits are typically needed thereby requiring a 10.times.10 type multiplier. State-of-the-art multipliers of this size are very complex. Maximum speed is about 90 nsec. per multiplication, and the addition of the multiplier and the 1+MRm(T) generator approximately doubles the complexity of a synthesizer.
Summary of the Invention
A modulating signal is applied to an analog-to-digital converter which addresses a read-only memory phase look-up table. The read-only memory phase look-up table output is applied to a polarity generator. The polarity generator output and output from a phase accumulator are input to a phase adder. The phase adder output is applied to the input of a sine look-up read-only memory whose output is applied to digital-to-analog converter and low-pass filtered to produce an amplitude-modulated carrier signal. The invention thereby digitally amplitude modulates a carrier signal in the phase domain without any multiplication being required.
Description of the Drawing
FIG. 1 is a block diagram of a prior art digital synthesizer.
FIG. 2 is a block diagram of a prior art digital synthesizer with amplitude modulation.
FIG. 3 is a block diagram of a preferred digital amplitude modulator built in accordance with the invention.
FIG. 4 is a vector diagram illustrating the amplitude modulation method.
FIGS. 5A, 5B and 5C show simplified spectra of a phase-modulated signal and a pure amplitude-modulated signal.
FIGS. 6A and 6B show frequency spectra of an amplitude modulation spectrum and a phase modulation spectrum present in the operation of the preferred embodiment.
FIG. 7 is a graph showing resolution versus attenuation for a preferred precision attenuator made in accordance with the invention.
FIG. 8 is a block diagram of another preferred embodiment which provides precise carrier attenuation with exceptional resolution.
FIG. 9 is a block diagram of a preferred double sideband suppressed carrier generator built in accordance with the invention.
FIG. 10 is a graph showing a two-tone lower single sideband spectrum.
Description of the Preferred Embodiment
The present invention permits amplitude modulation to be made in the phase domain with no multiplication required. This eliminates the need for a large multiplier as required in the prior art. Referring to FIG. 3, a block diagram of a digital synthesizer with amplitude modulation is shown. The operation of the present invention is as follows:
Amplitude modulation can be understood to be a special case of phase modulation. It is possible to phase modulate a carrier in such a way that both amplitude and phase modulation are a result. If the phase modulation terms are eliminated, then only AM results.
To understand how this is achieved, consider the function,
where Wc is the carrier radial frequency and X is a constant phase offset. Let the phase offset be a continuous function of time represented by X(T),
where Rm(T) is the modulating source and M is the modulation index. Now, using X(T), generate two phase-modulated waves G1(T) and G2(T). Using trigonometric identities, the right sides can be shown to equal the left sides respectively. Referring to the drawings, FIG. 5A shows components spectra of equation (3) and FIG. 5B shows components spectra of equation (4) below. For clarity, the spectrum of COS (WcT) SIN [X(T)] has been shifted to the origin in FIGS. 5A and 5B. The COS (WcT) SIN [X(T)] term actually falls around the carrier, Wc. To clarify the picture only the base term SIN [X(T)] is shown. The COS (WcT) term UP translates the SIN [X(T)] term around the carrier. ##EQU1##
Referring to FIG. 5C, the sum of these two phase-modulated waves reveals an interesting property,
The result is the traditional form for pure amplitude modulation. Note that if all phase modulation is cancelled, only AM results. The above is true for continuous analog signals.
Using digital techniques, equation (5) is generated with the addition of terms, G3(T), around the frequency Fclock/2. These terms are easily filtered by an output low-pass filter.
thus, (6) reduces to equation (5) after filtering by a low-pass filter.
To generate (6) consider the function S(T) defined as a square wave with positive amplitude=+1 and negative amplitude=-1. The repetition rate is Fclock/2. Using S(T) equations (3) and (4) can be represented in a combined form by using trigonometric identities and equation (7) results:
The right-most term, COS (WcT)S(T) SIN [X(T)], has a very complex frequency spectrum. This is the same undesired term as appears in equations (3) and (4) with one exception. The S(T) square wave causes the PM term to be translated up in frequency. Thus, the first undesired spectral lines occur around Fclock/2. If the output low-pass filter LPF is designed to reject these components and all those higher in frequency, then equation (7) reduces to:
Indeed as Fclock approaches infinity the COS (WcT)S(T) SIN [X(T)] term does also and the only remaining signal is the AM spectrum. See FIGS. 6A and 6B for spectral information of equations (7) and (8). Notice that equation (8) is equivalent to the continuous result equation (5). Equation (7) can be visualized by reference to FIG. 4. The carrier is represented by a rotation vector V2. Each cycle of the digital clock causes either X(T) or -X(T) to phase modulate the carrier. The results are V1 and V3 respectively. This causes both AM and PM. As already mentioned, the PM is filtered by the output LPF. The AM results due to the resultant vector (V2=V1+V3) being projected onto the X axis with vector V2 rotating at the carrier rate. As the modulating wave Rm(T) varies, the X(T) term is of the correct magnitude so that the V2 carrier amplitude changes proportionally to Rm(T).
Referring to FIG. 3 and the block diagram, it is seen that the only speed-critical part that has been added to perform AM is an adder 30. This addition effectively replaces the multiplier as used in the prior art as depicted in FIG. 2 thereby providing a method for generating AM which allows a faster clock and thus higher carrier rates. The hardware is also considerably reduced as compared to the prior art multiplier approach.
Referring to FIG. 3, a phase accumulator 20 comprised of an adder 10 and a latch 20 accumulates a linearly increasing phase. A differential phase .DELTA..phi. value 4 determines the output carrier rate. An external controller provides the .DELTA..phi. and .DELTA.T clock inputs. Another input to the adder 30 is derived from the AM phase generator. This function is comprised of a polarity generator 50, an amplitude-to-phase generator ROM phase look-up table 60, and an analog-to-digital converter 70. The contents of the ROM 60 for AM with a 100% modulation index is given in Table 1 below. The ROM 60 is 256 words by 11 bits, and the given values are in octal and .phi.=.phi. radians, 2777=.pi. radians:
A random modulating wave, Rm(T) with a maximum frequency of Fclock/4, is first digitized by the digital converter 70. This digital value addresses the ROM phase look-up table 60. A ROM is fast enough to accomplish this function. The ROM output is then fed to the polarity generator 50.
The purpose of the polarity generator 50 is to supply an output that is X(T) on clock pulse N and -X(T) on clock pulse N+1 and so on. The sequence of X(T), -X(T), X(T) . . . is the input to phase adder 30. This is where the phase modulates the carrier. The output of the phase adder 30 is then converted into an amplitude by a sine look-up ROM 100, a digital-to-analog converter 110 and a low-pass filter 120. The output 130 of the low-pass filter 120 is the desired AM carrier.
If the modulation index, M, is to be variable, then the ROM phase look-up 60 is a RAM instead of ROM. The RAM contents are updated each time a new modulation index is requested. Since the synthesizer has a controller, which provides the .DELTA..phi. and clock inputs, this same controller is used to calculate the RAM contents. If M is a constant, the ROM contents are fixed.
Precision Amplitude Attenuation
Referring to FIG. 7, another area where this method excels over others is in obtaining precision carrier attentuation with exceptional resolution. Assume an output at a selected frequency is defined as a reference 0 dB. With the invention the carrier is attenuated to any value within a selected range, such as a 10 dB range with a resolution as shown by FIG. 7. The resolution has limits based on the number bits of X(T). In this case X(T) is a constant for any value of time. The result is DC AM. Referring to FIGS. 3 and 8, the block diagram of FIG. 3 reduces to the simpler FIG. 8. This system requires no multiplication and minimal hardware. Equation (9) defines X(T)=X for the attenuator function.
where Rm sets the attenuation as defined in equation (10)
where 0.ltoreq.Rm<1024 for a 10 bit system.
If Rm and X(T) are described by 10 bits, then the resolution is found from equation (11). This precision is useful in testing critical analog circuits or in use as a calibrator.
where A is the attenuation below 0 dB of the carrier.
Referring to FIG. 8, a phase accumulator 2 generates the carrier rate. The adder 30 adds in the phase sequence X, -X, X, . . . etc. Because X(T) is a constant for a given value of attenuation a ROM is not needed to generate the phase. It can be conveniently calculated using the synthesizer controller. In this case the Rm variable represents the value of a constant DC input that would cause the identical attenuation. As before, the output of adder 30 is converted into the desired analog output.
Double Sideband Suppressed Carrier
It is often required to generate double sideband suppressed carrier, DSBSC hereafter. DSBSC can be generated by using a traditional double "balanced" mixer. All so-called "balanced" modulators have a degree of unbalance due to component limitations. This unbalance causes the carrier to appear, although reduced in level, at the output port. By modifying equation (2), DSBSC is generated.
To eliminate the carrier term, the constant 0.5 is removed. Referring to FIG. 9, a block diagram for a preferred embodiment wherein X(T) is based on equation (12) is shown. Under this condition the carrier term is zero. The contents of the ROM 60 for DSBSC is given in Table 2 below. The ROM 60 is 256 words by 11 bits and the given values are in octal.
100% Amplitude Modulation
Yet another application of the present invention is in obtaining a modulation index of exactly 100% with no limiting. Using analog components it is difficult to obtain exactly 100% AM because of limiting problems. 100% AM is useful as a calibration signal when testing receivers or modulation analyzers.
Single Sideband
Generating single sideband, SSB hereafter, usually requires either special sideband suppression filters or 90.degree. phase shifters. Both methods have tradeoffs that degrade the resulting spectrum. For simple two tone signals, as usually required in testing, the present invention generates the signals without a 90.degree. phase shift or sideband filters.
Referring to FIG. 10, a two tone LSSB spectrum is shown. This is generated by using the DSBSC scheme described above. In this case a user enters the two frequencies F.sub.1, F.sub.2 into a synthesizer controller which applies an appropriate .DELTA..phi., clock and Rm(T). The controller then generates a DSBSC wave around a pseudo carrier of Fc-(F.sub.1 +F.sub.2)/2. The two tone SSB system is equivalent to a DSBSC signal. An USSB signal is likewise generated around a psuedo carrier of Fc+(F.sub.1 +F.sub.2)/2.
Claims
We claim:
1. Digital apparatus comprising: phase accumulation means for accumulating a linearly increasing phase count and producing a digital phase signal corresponding to the phase count in response to receiving a differential phase input; adding means having a first input coupled to receive the digital phase signal, a second input and an output for adding signals applied to the first and second inputs and producing a summation signal corresponding to the addition at the output; sine look-up means coupled to receive the adding means output for producing a digital sine value signal in response to the summation signal; digital-to-analog conversion means coupled to receive the digital sine value signal for producing an analog signal output in response to the digital sine value signal; filtering means coupled to receive the analog signal output for producing a selected spectrum of the analog signal as an output; analog-to-digital conversion means coupled to receive an applied input signal for producing a digital modulation signal in response to the applied input signal; phase conversion means coupled to receive the digital modulation signal for producing a digital modulation phase signal in response to the digital modulation signal; and polarity generation means coupled to the adding means second input and to the phase conversion means to receive the digital modulation signal for producing an alternately polarized digital modulation signal and applying the alternately polarized digital modulation signal to the adding means.
2. Apparatus as in claim 1 wherein phase accumulation means comprise: an adder having a first input coupled to receive the differential phase input, a second input and an output; and a latch coupled to receive the adder output and an applied clock signal and an output coupled to the adder second input.
3. Apparatus as in claim 1 wherein sine look-up means comprises a read-only memory.
4. Apparatus as in claim 1 wherein sine look-up means comprises a random-access memory.
5. Apparatus as in claim 1 wherein filtering means comprises a low-pass filter.
6. Apparatus as in claim 1 wherein phase conversion means comprises a read-only memory.
7. Apparatus as in claim 1 wherein phase conversion means comprises a random-access memory.
8. Apparatus as in claim 1 wherein polarity generation means comprise: a plurality of exclusive OR gates, each having a first input, a second input and an output; dividing means coupled to receive an applied clock signal for producing a divided clock signal as an intput; means for coupling the first input of each of the plurality of exclusive OR gates to receive the divided clock signal; and means for coupling the second input of each of the plurality of exclusive OR gates to receive the digital modulation signal.
9. Digital apparatus comprising: phase accumulation means for accumulating a linearly increasing phase count and producing a digital phase signal corresponding to the phase count in response to receiving a differential phase input; adding means having a first input coupled to receive the digital phase signal, a second input and an output for adding signals applied to the first and second inputs and producing a summation signal corresponding to the addition at the output; sine look-up means coupled to receive the adding means output for producing a digital sine value signal in response to the summation signal; digital-to-analog conversion means coupled to receive the digital sine value signal for producing an analog signal output in response to the digital sine value signal; filtering means coupled to receive the analog signal output for producing a selected spectrum of the analog signal as an output; phase conversion means coupled to receive an applied digital modulation signal for producing a digital modulation phase signal in response to the digital modulation signal; and polarity generation means coupled to the adding means second input and to receive the digital modulation signal for producing an alternately polarized digital modulation signal and applying the alternately polarized digital modulation signal to the adding means.
10. Apparatus as in claim 9 comprising analog-to-digital conversion means coupled to receive an applied input signal for producing the digital modulation signal in response to the applied input signal.
11. Apparatus as in claim 9 wherein phase accumulation means comprise: an adder having a first input coupled to receive the differential phase input, a second input and an output; and a latch coupled to receive the adder output and an applied clock signal and an output coupled to the adder second input.
12. Apparatus as in claim 9 wherein sine look-up means comprises a read-only memory.
13. Apparatus as in claim 9 wherein sine look-up means comprises a random-access memory.
14. Apparatus as in claim 9 wherein filtering means comprises a low-pass filter.
15. Apparatus as in claim 9 wherein phase conversion means comprises a read-only memory.
16. Apparatus as in claim 9 wherein phase conversion means comprises a random-access memory.
17. Apparatus as in claim 9 wherein polarity generation means comprise: a plurality of exclusive OR gates, each having a first input, a second input and an output; dividing means coupled to receive an applied clock signal for producing a divided clock signal as an output; means for coupling the first input of each of the plurality of exclusive OR gates to receive the divided clock signal; and means for coupling the second input of each of the plurality of exclusive OR gates to receive the digital modulation signal.
18. Digital precision carrier attenuation apparatus comprising: phase accumulation means for accumulating a linearly increasing phase count and producing a digital phase signal corresponding to the phase count in response to receiving a differential phase input; adding means having a first input coupled to receive the digital phase signal, a second input and an output for adding signals applied to the first and second inputs and producing a summation signal corresponding to the addition at the output; sine look-up means coupled to receive the adding means output for producing a digital sine value signal in response to the summation signal; digital-to-analog conversion means coupled to receive the digital sine value signal for producing an analog signal output in response to the digital sine value signal; filtering means coupled to receive the analog signal output for producing a selected spectrum of the analog signal as an output; and polarity generation means coupled to the adding means second input and a digital input signal for producing an alternately polarized digital signal and applying the alternately polarized digital signal to the adding means.
19. Apparatus as in claim 18 comprising an analog-to-digital conversion means coupled to receive an applied input signal for producing the digital signal in response to the applied input signal.
20. Apparatus as in claim 18 wherein phase accumulation means comprise: an adder having a first input coupled to receive the differential phase input, a second input and an output; and a latch coupled to receive the adder output and an applied clock signal and an output coupled to the adder second input.
21. Apparatus as in claim 18 wherein sine look-up means comprises a read-only memory.
22. Apparatus as in claim 18 wherein sine look-up means comprises a random-access memory.
23. Apparatus as in claim 18 wherein filtering means comprises a low-pass filter.
24. A method for digitally amplitude-modulating an applied carrier signal in the phase domain comprising the steps of: phase-converting a modulating signal; alternating the polarity of the phase-converted modulating signal; accumulating a linearly-increasing phase count; adding the polarity alternating phase-converted modulating signal and the accumulated phase count; converting the sum of the addition to phase values of a sine wave; digitally converting the phase values to an analog signal; and filtering the analog signal.