Predictor Stage for a Digit Rate Reduction System

The present invention relates to the digital transmission of PCM coded information and more particularly to the digital processing for reducing the digit rate on the transmission line.

Signals capable of being processed by the system may be telephone signals such as speech, data, sound, telegraphy, multifrequency signals, etc . . . , image signals and, generally, all digital coded information presenting a redundancy.

Systems for reducing digit rates are already known. They achieve a compression of the digit rate by exploiting, for the transmission of a signal sample the knowledge acquired upon the transmission of the preceding samples. They usually consist in a cascaded arrangement of three stages; the first stage, called predictor stage, makes it possible to replace the input PCM signal by a signal d.sub.n representing the difference between the input PCM signal and the predicted value of this sample calculated from the preceding samples. In a second stage, called automatic gain compression stage, the amplitude of the difference signal d.sub.n derived from the first stage is divided by an estimator of the mean power. A third stage, called quantizer, effects coding of the samples derived from the second stage and furnishes, at the output, a digital signal of reduced redundancy formed by words of fixed length or of variable length. An equivalent device at reception enables the PCM signal to be recovered.

It is an object of the invention to provide a digital processing device which is stable even in the presence of transmission errors.

The invention consists in providing a digital processing system comprising a predictor stage with recursive structure at transmission and a predictor stage with transverse structure at reception. The reception predictor in this case having a finite memory, the trailing of the error is limited and does not affect the convergence of the system.

The invention is applied to all systems with linear prediction, for example with matchable prediction or fixed prediction.

The invention will be more readily understood on reading the following description with reference to the accompanying drawings, in which:

FIG. 1 is a schematic representation of the digit rate reducing devices of the prior art.

FIGS. 2a and 2b schematically show the structure of the stages, the influence of the quantizer.

FIGS. 3a and 3b are schematic representations of the digital processing device according to the invention, disregarding the influence of the quantizer.

FIG. 4 is a detailed representation of the transmission predictor stage of FIG. 3, including the quantizer in the negative feedback loop.

FIG. 5 is a variant embodiment of the transmission part of FIG. 3.

FIG. 6 is a detailed diagram of a predictor stage of the transmission part, variant embodiment of FIG. 3a.

FIG. 7 is a variant embodiment of FIG. 6.

FIG. 8 is a detailed view of the reception device of FIGS. 6 and 7.

With reference to FIG. 1, the predictor stage of the transmission part of the known digit rate reduction devices is usually composed of an adder-subtractor circuit 1 which receives the samples x.sub.n of the input PCM signal S and furnishes at the output a signal d.sub.n representing the difference between the value of the incoming sample x.sub.n and the predicted sample x.sub.pn. This predicted sample x.sub.pn is furnished by a predictor 2 from a sample x.sub.n furnished by an addition circuit 3. The predictor 2 is usually a fixed predictor, or an adaptative predictor as in the case of Applicant's earlier French Patent Application No. 79 20 445.

The addition circuit 3 receives the sample x.sub.pn predicted by the predictor 2 and adds it to the estimated sample d.sub.n furnished by a reverse quantizer 4. The difference sample d.sub.n furnished by the addition circuit 1 is applied to the input of a quantizer 5 which furnishes, at the output, samples y.sub.n with reduced rate.

At reception, the signal y.sub.n is received by the quantizer 5' which furnishes a difference signal d.sub.n at the input of a predictor stage. This predictor stage is essentially composed of an addition circuit which adds the difference signal d.sub.n derived from the reverse quantizer 5', to the sample x.sub.pn furnished by the predictor 2.

A recovered signal x.sub.n is available at the output of the addition circuit 1'. This signal x.sub.n is, on the one hand, applied to the input of the predictor 2', on the other hand is available at the output of the rate reducing device.

FIG. 2a schematically shows the predictor stage of the prior art thus described when the noise ascribable to the quantizer is disregarded. The predictor stage is usually in the form of a transverse filter at transmission making a prediction from the incoming signal x.sub.n and furnishing samples x.sub.pn predicted from the preceding samples; to this end, a predictor 11 furnishes coefficients a.sub.i, fixed or optimized according to the systems, such that ##EQU1## where N is the number of coefficients of the predictor.

When the coefficients are reactualized by means of any algorithm, for example the gradient algorithm or the Kalman algorithm, the rate reducing device is better adapted to the different statistics of the signals, but is unstable at reception in the presence of transmission errors.

In fact, the reception predictor stage of the known systems as shown in FIG. 2b recalculates the signal x.sub.n from the erroneous signal, for example d.sub.n, received. The reactualized coefficients used by the predictor 2' are then erroneous and the new sample x.sub.n+1 is also erroneous. The error is propagated in the system, the algorithm reactualizing the coefficients at reception diverges from that of the transmission device (FIG. 2a), and may cause instabilities. Such a phenomenon is explained mathematically by observing that the structure of the predictor stage (FIG. 2b) is recursive at reception and that the transfer function of the reception device presents poles.

Such a design of the predictor stages at transmission and at reception requires heavy protection in the case of using the system on a noise channel.

The transmission and reception predictor stages according to the invention are shown schematically in FIGS. 3a and 3b respectively. With reference to FIG. 3a, the incoming signal S is a signal sampled and coded in digital code. From each incoming sample x.sub.n is subtracted a predicted sample x.sub.pn furnished by a predictor 11 by means of a subtracter circuit 10 which furnishes difference samples d.sub.n at the output representative of the difference between the value of the incoming sample x.sub.n and of the predicted sample x.sub.pn furnished by the predictor 11. The predictor 11 receives, according to the invention, at its input, the difference signal d.sub.n transmitted in line and furnishes the signal x.sub.pn to the subtraction circuit 10. The difference signals d.sub.n are thus formed from the preceding sample d.sub.n-1 according to the recurrent form of the type: ##EQU2## where a.sub.i are the N coefficients furnished by the predictor 11.

The predictor 11 may be of the type with fixed coefficients (a.sub.i) or of the type with optimized coefficients (a.sub.i).sub.i=1,N. In this latter case, the coefficients are reactualized, for example at each sampling period according to the gradient algorithm, according to the Kalman algorithm or by any algorithm well known in the art.

Such a predictor stage presents a recursive structure at transmission. The transfer function of the transmission device is of the type: ##EQU3## where the (a.sub.i).sub.i=1,N are the coefficients of the predictor 11.

FIG. 3b shows the predictor stage of the reception device. It consists essentially in a predictor 11', identical to that of the transmission device, furnishing from the difference signal d.sub.n received a predicted signal x.sub.pn, which is added to the signal d.sub.n by means of an adder circuit 10', to form the reconstructed signal x.sub.n. Such a predictor stage is, at reception, of transverse structure. It makes at reception the prediction from the difference signal d.sub.n. However, the transfer function is of the type ##EQU4## at reception and does not present any pole. Therefore, whatever the values of the coefficient a.sub.i of the predictor 11' at reception, this digit rate reducing device according to the invention will be stable as it will have at reception a predictor stage of transverse structure. Therefore, even in the presence of transmission errors, the device of the invention will be stable.

FIG. 4 is a more complete representation of the transmission and reception devices for the digital processing of the coded signals according to the invention. The PCM incoming signals S received by the addition circuit 10 is converted into a difference signal d.sub.n by subtraction of the signal x.sub.pn predicted by the predictor 11. The difference signal d.sub.n from the addition circuit d.sub.n is converted into a reduced rate signal y.sub.n by means of a quantizer 12 well known in the art. Such a quantizer has already been described in Applicant's French Patent Application No. 79 20445. It essentially converts the high rate samples d.sub.n into a series of low rate samples y.sub.n as a function of the conditional probability distribution of the signal d.sub.n to be quantized.

The choice of the quantizing curve adopted, according to whether the signal to be processed is a data signal or a speech signal, may, in the same way as in the above-mentioned Application, be determined by the knowledge of the vector of the coefficients (a.sub.j).sub.i.ltoreq.j.ltoreq.N of the predictor 11.

A reverse quantizer 13 mounted on a negative feedback loop receives at its input the signal y.sub.n transmitted in line and furnishes a signal d.sub.n identical to the one which would be received at reception in the absence of transmission errors. This magnitude d.sub.n is applied to the input of the predictor 11.

At reception, the low rate signal y.sub.n is received by the reverse quantizer 13' which furnishes at the output a difference signal d.sub.n. This difference signal d.sub.n is applied on the one hand to the input of the predictor 11', and on the other hand to the input of the adder circuit 10'.

This adder circuit 10' adds the signal d.sub.n from the inverse quantizer 13' to the predicted signal x.sub.pn furnished by the predictor 11', and furnishes at the output a reconstructed signal x.sub.n whose rate is equal to that of the input signal S.

The predictor 11 and 11' of the transmission and reception devices may for example be able adaptative predictors applying the gradient algorithm. There is then a recurrent equation connecting the N coefficients A(n), enabling them to be reactualized

where A(n)=[a.sub.1 (n) - - - a.sub.N (n)] is the vector of the coefficients, and where K(n) represents the correction vector at instant n,K(n) may be calculated by any algorithm used in prediction techniques, for example the gradient algorithm, Kalman algorithm or the like.

However, in order to avoid any instability at transmission and to ensure convergence of the transmission and reception devices, in particular of the transmission and reception predictor stages, a leakage term (1-.beta.) is added to the coefficient reactualization algorithm, .beta. being a constant of the order of 10.sup.-3. The equation of reactualization of the coefficients reads then:

FIG. 5 shows a modified embodiment of the invention, in which the prediction for the speech signals is improved. A filter 14 is disposed at the input of the transmission predictor stage which makes a prefiltering promoting the prediction of the system according to the invention.

This filter 14 receives the incoming signal S composed of the samples x.sub.n and introduces a delay T amounting to a sampling period, said delay being equivalent to that of a conventional fixed predictor of the first order optimized for speech. The signal x.sub.pn furnished by the filter 14 is subtracted from the signal x.sub.n by means of the subtraction circuit 15. The signal S' furnished at the output of this subtraction circuit 15 is a signal having the same rate as S, but presenting a minimisation in energy for the low speech frequencies.

This signal S' is then processed in the same way as in the devices of the invention described with reference to FIGS. 3a and 4. In fact, a predictor 11 of a type known per se, for example an adaptative predictor functioning according to the gradient algorithm as described in Applicant's French Patent Application Ser. No. 79 20445, furnishes a prediction from the difference signals d.sub.n furnished by the preceding samples at the output of the addition circuit 10.

The predictor 11 furnishes at its output a predicted signal x.sub.p2n which is added to the sample x'.sub.n contained in the signal S'.

The difference samples d.sub.n furnished at the output of the transmission predictor stage of FIG. 5 enable properties of the data signals to be substantially unaltered and, for speech signals, and a gain to be obtained comparable to that obtained at the output of an adaptative predictor with the same number of coefficients.

The transmission digital processing device of the invention, and particularly its predictor stage, is illustrated in detail in FIG. 6. The subtracter circuit 10 furnishes, from the incoming samples x.sub.n and the predicted samples x.sub.pn, differences samples d.sub.n representing the difference between the value of the incoming sample x.sub.n and predicted sample x.sub.pn. This outcoming sample d.sub.n is converted into a low rate signal y.sub.n by means of a quantizer 12 well known in the art. A reverse quantizer 13 mounted on a negative feedback loop receives at its input the signal y.sub.n transmitted in line and furnishes, at the output, a signal d.sub.n identical to the one which would be received at reception in the absence of transmission errors. This signal d.sub.n is applied, on the one hand, to the input of the predictor 11, on the other hand, to the input of the calculating device 16 reactualizing the coefficients (a.sub.i).sub.1.ltoreq.i.ltoreq.4 of the predictor 11. This device 16 is well known in the art. It applies the gradient algorithm, the Kalman algorithm or any algorithm known per se. This device 16 furnishes the 4 coefficients a.sub.1, a.sub.2, a.sub.3, a.sub.4 in the embodiment of FIG. 6 to the predictor 11 at the input of the four multiplier circuits 110, 111, 112, 113; each of these multiplier circuits 110, 111, 112, 113 receives the signal d.sub.n furnished by the reverse quantizer 13 respectively delayed by a time T, 2T, 3T, and 4T by means of four shift registers 114, 115, 116, 117 respectively. The two signals obtained at the output of the multiplier circuits 110, 111 are applied to the input of an adder circuit 118. The result obtained at the output of this adder circuit 118 is added to the result of the multiplier circuit 112 by means of the adder circuit 119. The result obtained at the output of the adder circuit 119 is applied to the input of the adder circuit 120 by means of which it is added to the result obtained at the output of the multiplier circuit 113. The result obtained at the output of the adder circuit 120 is predicted signal x.sub.p2n. This prediction is improved according to the invention by inserting a transverse filter 14 constituted by a shift register 140 followed by a multiplier circuit 141. To this end, an adder circuit 17 adds the predicted sample x.sub.pn, furnished at the input of the adder circuit 10, to the sample d.sub.n obtained at the output of the reverse quantizer 13 to form the reconstructed sample x.sub.n. It is this sample x.sub.n which is successively delayed by a time T by means of the shift register 140 then multiplied by a fixed coefficient b.sub.o by means of a multiplier circuit 141. The sample x.sub.p1n furnished at the output of the transverse filter 14 is added to the predicted sample x.sub.p2n furnished by the predictor 11 by means of the adder circuit 15. At the output of the adder circuit 15, a predicted sample x.sub.pn is obtained which is used at the input of the adder circuit 10.

The samples d.sub.n furnished at the output of the adder circuit 10 are converted into a signal y.sub.n with low sample rate by means of the quantizer 12.

In this case, if the quantizing levels are sufficiently fine (the bit number of the words of signal y.sub.n is greater than or equal to 3 bits), and if the quantizer does not clip the signal, the induced quantizing noise is white.

Referring now to FIG. 7, another mode of insertion of the transverse filter 14 is provided according to the invention. The pre-filtering operation is effected directly at the input of the transmission predictor stage, from the incoming samples x.sub.n. The filter 14 furnishes samples, at the output, which are added to the predicted samples, derived from the predictor 11, by means of an adder circuit 15. The sample from the circuit 15 is applied to the input of the subtracter circuit 10 to be subtracted from the incoming sample x.sub.n. The sample d.sub.n from the subtracter circuit 10 is applied to the input of the quantizer 12. On the negative feedback loop, from the samples y.sub.n, the reverse quantizer 13 furnishes reconstructed samples d.sub.n at the input of the predictor 11. The predictor 11 associated with its coefficient reactualization device (not shown) furnishes predicted samples at each instant at the input of the adder circuit 15. Such a mode of insertion of the transverse filter 14 outside the negative feedback loop on which the inverse quantizer is inserted, procures a more coloured transfer function noise reading 1/1- B.sub.o (z) (white noise filtered by the fixed predictor), which may be interesting subjectively in the case of speech processing.

FIG. 8 schematically shows the reception device corresponding to the transmission device of FIGS. 6 and 7. The incoming signal y.sub.n is applied to the input of the reverse quantizer 13' which furnishes, at the output, samples at the input of the adder circuit 10' and at the input of the predictor 11'. This predictor 11' associated with its coefficient reactualization device (not shown), furnishes at the input of the adder circuit 15' predicted samples, which are added to the samples furnished by the transverse filter 14'. The prefiltering operation carried out by this filter 14' is effected from the reconstructed sample x.sub.n furnished at the output of the addition circuit 10'. The adder circuit 15' furnishes at the output samples which are added to those derived from the reverse quantizer 13' by means of the adder circuit 10'.