Snap Acceleration Test for an Internal Combustion Engine

1. Technical Field

This invention relates to the extra-vehicular hot-testing of internal combustion (IC) engines, and more particularly to diagnosing hot-test engine performance electronically.

2. Background Art

Hot-testing of IC engines outside of a vehicle (extra-vehicular) is known generally, being used mainly in the testing of newly manufactured, production line engines and in the testing of overhauled or repaired engines. The term hot-test refers to testing the engine with ignition to determine basic dynamic engine performance. At present, the actual tests performed during the engine hot-test involve the most basic test criteria and rely almost entirely on the hot-test operator for diagnosing base-line engine performance. Although the tests may involve measurement of basic engine timing, in general the pass/fail acceptance standards are based on what the operator perceives of the engine running characteristics, such as the inability to start or to maintain engine speed, or the sound of the engine while running. These tests do provide suitable pass/fail criteria for gross engine malfunctions, however, it is impossible, except to the most experienced operator, to provide even simple diagnosis of the cause of the engine poor performance.

In the first instance, the inability to provide quantitative measurements of engine performance and acceptance, results in the acceptance of marginal engines in which the actual failure occurs sometime later as an infant mortality, perhaps after installation in the vehicle. Conversely, the rejection of an engine based on the present qualitative standards may be unwarranted in many instances, resulting in the unnecessary recycling of the engine through some type of repair facility, where with more extensive testing the apparent fault may be corrected with a minor engine adjustment. Therefore, it is desirable to establish an accurate quantitative analysis testing procedure which with measurement of selected engine parameters may provide for accurate pass/fail determination.

Some of the subject matter disclosed and claimed herein is also disclosed in one or more of the following commonly owned, copending U.S. patent applications filed on even date herewith by: Full et al, Ser. No. 105,803, entitled RELATIVE MANIFOLD VACUUM OF AN INTERNAL COMBUSTION ENGINE; Full et al, Ser. No. 105,446, entitled RELATIVE EXHAUST BACK-PRESSURE OF AN INTERNAL COMBUSTION ENGINE; Tedeschi et al, Ser. No. 105,680, entitled SPARK PLUG LOAD TESTING FOR AN INTERNAL COMBUSTION ENGINE; and Full et al, Ser. No. 105,447, entitled RELATIVE POWER CONTRIBUTION OF AN INTERNAL COMBUSTION ENGINE.

The object of the present invention is to provide for the detection of an inoperative accelerator pump for an IC engine.

According to one aspect of the present invention the exhaust gas carbon monoxide (CO) constituent from an IC engine which is running under load is measured both before and after the engine throttle is snapped from a steady state, or idle position to a full throttle position and back to steady state, the increase in the magnitude of the CO following the snap acceleration being compared to the prior quiescent CO value to provide an indication of the performance of the accelerator pump. According to another aspect of the present invention the hydrocarbon (HC) constituent of the exhaust gas is also measured both before and after snap acceleration, and the increase in HC following the throttle snap is compared with the prior quiescent value of HC to provide an indication of the performance of the accelerator pump. In further accord with both aspects of the present invention the total time interval associated with the throttle snap from the steady state position to the full throttle position and back is less than the response time of the engine power valve (enrichment valve) to the change in throttle position. In still further accord with the first aspect of the present invention, the engine is first adjusted to provide an air to fuel ratio (A/F) which is less than sixteen-to-one.

The present invention provides for the detection of an inoperative accelerator pump by measuring the dynamic operation of the pump while installed on an operating IC engine, thereby determining final assembly operability of the pump. These and other objects, features and advantages of the present invention will become more apparent in light of the following detailed description of a best mode embodiment thereof, as illustrated in the accompanying drawing.

FIG. 1 is a schematic block diagram illustration of the instrumentation in a typical engine hot-test installation in which the present invention may be used;

FIG. 2 is a system block diagram of a hot-test control system which may incorporate the present invention;

FIG. 3 is a system block diagram illustration of one subsystem as may be used in the control system embodiment of FIG. 2;

FIG. 4 is a system block diagram illustration of another subsystem as may be used in the control system embodiment of FIG. 2;

FIG. 5 is a system block diagram illustration of still another subsystem as may be used in the control system embodiment of FIG. 2;

FIG. 6 is a simplified logic flowchart diagram illustrating one functional aspect of the control system of FIG. 2;

FIG. 7 A B is a simplified logic flowchart diagram illustrating one function of the present invention as performed by the control system of FIG. 2;

FIG. 8 is a schematic illustration of one element of the hot-test installation of FIG. 1, as may be used with the present invention;

FIG. 9 is a simplified logic flowchart diagram illustrating another function of the present invention as performed in the control system of FIG. 2; and

FIG. 10 is an illustration of an operating set of waveforms which is used in the description of the present invention.

Referring to FIG. 1, in a simplified illustration of an engine hot-test installation in which the present invention may be used, a test control system 30 receives sensed engine data from the test engine 31 which is mounted in a test stand (not shown) and loaded by connection of the engine crankshaft 32 through a coupling assembly 34 to an engine load, such as a brake mechanism or, as illustrated, a dynamometer (dyne) load 36. The dyne is known type, such as the Go-Power Systems model D357 water dynamometer, equipped with an air starter 37. The air starter is used to crank the test engine (through the dyne) in the absence of an engine mounted starter. A dyne flywheel 38, connected to the dyne shaft 40, includes a ring-gear (not shown) having a selected number of precision machined gear teeth equally spaced around the circumference of the ring-gear so that the tooth-to-tooth intervals define substantially equal increments of dyne shaft angle. Dyne control circuitry 42 controls the dyne load torque (Ft-Lb) to a set point torque reference signal provided on lines 43 from the analog interconnect 44 of the control system 30, by controlling the amount of water in the dyne drum (not illustrated in FIG. 1). The dyne control circuitry also provides a sensed, actual dyne torque signal on a line 45 to the analog interconnect of the control system.

The test engine is provided with the engine services 46 necessary for engine operation, such as fuel, oil, and water, etc. through service connections 48. The engine exhaust manifolds are connected through exhaust line 50 to an exhaust evacuating pump 52. Following engine start-up in response to a "start engine" discrete signal presented on lines 53 to the starter 37 (or engine starter if available) from the control system digital interconnect 54, an engine throttle control 55 and associated throttle control actuator 56 control the engine speed (RPM) to an engine RPM reference set point signal provided to the control on lines 57 from the analog interconnect. In addition, the actuator receives a discrete signal from the digital interconnect 54 on a line 58, which is used to provide snap acceleration of the engine as described hereinafter. In summary, the test engine under hot-test is operated under controlled load at selected engine speed profiles to permit the dynamic analysis of the engine base-line parameters and the engine diagnostic routines described hereinafter.

The hot-test sequence examines engine base-line parameters related to speed, exhaust emissions, ignition cycle timing, and spark duration to determine engine health, i.e., output power and combustion efficiency. The speed measurements include engine crankshaft speed (RPM) and dyne shaft speed. The indication of engine crankshaft speed may be provided by any type of rotational speed sensing device, such as a shaft encoder, or preferably a magnetic pick-up sensor 60, such as Electro Corp. RGT model 3010-AN Magnetic Proximity Sensor, which senses the passage of the teeth of the engine ring-gear mounted on the engine flywheel 62 and provides an engine series tooth pulse signal on the line 64 to the analog interconnect. The actual number of ring-gear teeth depends on the particular engine model with 128 teeth being average. The teeth are uniformly spaced around the circumference of the ring gear, such that 128 teeth provide tooth-to-tooth spacing corresponding to a crankshaft angle interval of 2.813 degrees. This is adequate for marking subcyclic cylinder events within the ignition cycle, but due to the variation of total tooth count with different engine models it may be preferred to provide the crankshaft angle resolution required by the control system from the load speed indication. The load speed may also be sensed with a shaft encoder or by sensing the teeth of the dyne ring-gear which has a tooth count typically twice that of the engine ring-gear, or 256 teeth for the 128-tooth engine ring-gear. This is provided by a proximity sensor 66, similar to the sensor 60, which senses the passage of the dyne ring-gear teeth to provide a dyne series tooth pulse signal on line 68 to the analog interconnect. The precision edging of the dyne teeth allows for exact resolution on the leading and trailing edges of each of the tooth pulse signals which permits (as described in detail hereinafter) edge detection of each to provide an equivalent 512 dyne tooth intervals per crankshaft revolution.

Engine exhaust measurements include both exhaust gas analysis and exhaust back-pressure measurements. The emissions analysis measures the hydrocarbon (HC) and carbon monoxide (CO) constituents of the exhaust with an emissions analyzer 70, of a type known in the art such as the Beckman model 864 infrared analyzer. The analyzer is connected to the exhaust pipe 50 through an emissions probe 72. The HC and CO concentration is determined by the differential measurement of the absorption of infrared energy in the exhaust gas sample. Specifically, within the analyzer two equal energy infrared beams are directed through two optical calls; a flow through exhaust gas sample cell and a sealed reference cell. The analyzer measures the difference between the amounts of infrared energy absorbed in the two cells and provides, through lines 74 to the control system analog interconnect, HC and CO concentrations as DC signals with full scale corresponding typically to: (1) a full-scale HC reading of 1000 PPM, and (2) a full-scale CO of 10%. The analyzer operating modes are controlled by control signal discretes provided on lines 75 from the digital interconnect. The exhaust back-pressure instrumentation includes a back-pressure sensor 76, such as a Viatran model 21815 with a range of .+-.5 PSIG, and a back-pressure valve 78, such as a Pacific Valve Co. model 8-8552. The pressure sensor is connected to the exhaust line 50 with a tap joint 80 and provides a signal indicative of exhaust back-pressure on line 82 to the analog interconnect. The back-pressure valve simulates the exhaust system load normally provided by the engine muffler and is typically a manually adjustable 2" gate valve with a range of 15 turns between full open and full closed.

The engine ignition timing information is derived from the crankshaft angle information provided by the dyne and engine ring-gear teeth and by sensing a crankshaft index (CI), such as the timing marker on the engine damper 88. The CI is sensed with a magnetic pick-up sensor 90, such as the Electro Corp. Model 4947 proximity switch, which preferably is mounted through a hole provided on the damper housing and measures the passage of the timing marker notch on the damper. The sensor mounting hole is at a known crankshaft angle value from the top dead center (TDC) position of the #1 cylinder, and is determined from the engine specifications. The notch triggers a signal pulse by passing near the CI sensor every crankshaft revolution and the CI pulses are provided on lines 92 to the control system digital interconnect. In addition, the ignition cycle information includes measurement of the #1 cylinder sparkplug firing which in combination with the CI sensor indication provides a crankshaft synchronization point corresponding to the TDC of the #1 cylinder power stroke. The spark firing is sensed by a clamp-on Hall effect sensor 94 which provides a voltage signal pulse coincident with the sparkplug firing on a line 96 to the digital interconnect.

The sparkplug signal duration measurements are provided by measuring the primary (Lo Coil) and secondary (Hi Coil) voltage signals of the engine ignition coil 100. The Lo Coil voltage is sensed by a connection 102 to the primary of the coil and the Hi Coil voltage is measured with a sensor 103, such as a Tektronix Model P6015 high-voltage probe with a range of 0 to 50 KV. The signals are provided on lines 104, 106 to both interconnects of the control system.

In addition to sensing engine speed, exhaust, ignition timing and spark duration parameters, the intake manifold vacuum pressure is also sensed. Two vacuum measurements are made; a DC manifold vacuum which provides the average vacuum level, and an AC manifold vacuum which provides instantaneous values of vacuum. The AC measurements are made by inserting a pressure sensor 108, such as a VIATRAN Model 218 with a range of .+-.1 PSIG, in the engine vacuum line connected to the PCV valve. The DC manifold vacuum sensor 110 may be a VIATRAN Model 218 with a range of .+-.15 PSIG inserted in the same vacuum line. Each sensor provides a voltage signal indicative of the sensed pressure on lines 112, 114 to the control system. Additional engine sensors 115, such as pressure and temperature of the engine oil, fuel, water, etc. are provided to the control system through lines 116. The sensors provide the information on the necessary prerequisite engine ambient conditions which must be established prior to test, as discussed in detail hereinafter.

With the test engine connected to the load dyne 36 and instrumented as shown in FIG. 1, the hot-test control system automatically programs the start-up (cranking), ignition, and running of the engine at prescribed engine speed (RPM) and engine load conditions. Referring now to FIG. 2, a hot-test control system 30 which may incorporate the present invention includes a central processing unit (CPU) 130 which preferably is a known, proprietary model general purpose computer, such as the Digital Equipment Corporation (DEC) Model PDP-11/34 minicomputer which may be used with a software data system based on the DEC RSX11-M multi-task real time software package. The size of the CPU depends on the data processing tasks of the system, so that depending on the hot-test system requirements, a smaller microcomputer, such as the DEC LSI-11, may be used for the CPU. Similarly, a number of smaller CPUs may be used, each dedicated to a particular aspect or function of the system. The selection of the particular type of CPU to be used is one which may be made by those skilled in the art, based on system through-put requirements. It should be understood, however, that selection of the particular type of CPU is dependent on overall hot-test requirements alone, and forms no part of the present invention. If it is considered necessary, or practical, any one of a number of known processing systems and softward packages may be used as may be obvious or readily apparent to those skilled in the art.

As known, the CPU includes general purpose registers that perform a variety of functions and serve as accumulators, index registers, etc. with two dedicated for use as a stack pointer (the locations, or address of the last entry in the stack or memory) and a program counter which is used for addressing purposes and which always contains the address of the next instruction to be executed by the CPU. The register operations are internal to the CPU and do not require bus cycles. The CPU also includes: an arithmetic logic unit (ALU), a control logic unit, a processor status register, and a read only memory (ROM) that holds the CPU source code, diagnostic routines for verifying CPU operation, and bootstrap loader programs for starting up the system. The CPU is connected through input/output (I/O) lines 132 to a processor data bus 134 which includes both control lines and data/address lines and functions as the interface between the CPU, the associated memory 136 which is connected through I/O lines 138 to the data bus, and the peripheral devices including user equipment.

The memory 136 is typically nonvolatile, and may be either a core memory, or preferably a metallic oxide semiconductor (MOS) memory with battery backup to maintain MOS memory contents during power interruption. The MOS memory may comprise one or more basic MOS memory units, such as the DEC MOS memory unit MS11-JP each having 16K words of memory location, as determined by system requirements. The memory is partitioned into several areas by the system application software, as described hereinafter, to provide both read only, and read/write capability.

The peripheral devices used with the CPU and memory, other than the user interface devices, may include: (1) a disk memory loader 140, such as a DEC Pac Disk Control unit with two disk drives, connected through I/O lines 142 to the bus, (2) a CRT/keyboard terminal 144, such as DEC ADDS model 980, connected through I/O lines 146 to the bus, and (3) a printer 148, such as the DEC LA 35 printer, connected through I/O lines 150. The printer and disk loader are options, the disk memory loader being used to store bulk engine data or specific test routine instructions on floppy disks, which may then be fetched by the CPU. Alternatively, the specific test routines may be stored in the memory 136 such that the disk memory loader is used to store only bulk data.

The CRT/keyboard unit provides man-machine interface with the control system which allows an operator to input information into, or retrieve information from the system. These man-machine programs may include general command functions used to start, stop, hold, or clear various test routines, or to alter engine speed or dyne torque set point values for the engine throttle and dyne control circuitry. In addition, a specific "log-on" procedure allows the operator to alter the engine specification data stored in a data common portion of the memory 136.

The user interfaces include first and second digital interfaces 152, 154, and analog interface 156, connected through I/O lines 157-159 to the processor bus. Each digital interface receives the sensed engine data from the digital I/O interconnect 54 on lines 160. The digital interface 154 provides the required control system output discrete signals to the test engine instrumentation through lines 162 to the digital I/O interconnect. The sensed engine data presented to the analog I/O interconnect 44 is presented through lines 164 to the analog interface which provides the control system set point reference signals for the engine throttle and dyne control circuitry on lines 170 back to the analog interconnect.

In the operation of the CPU 130 and memory 136 under the application software for the system, the memory is partitioned into a number of different areas, each related to a different functional aspect of the application software. As used here, the term application software refers to the general structure and collection of a coordinated set of software routines whose primary purpose is the management of system resources for control of, and assistance to, the independently executable test programs described individually hereinafter. The three major areas of the memory include: (1) a library area for storing a collection of commonly used subroutines, (2) a data common area which functions as a scratch pad and which is accessible by other programs in memory which require scratchpad storage, and (3) a general data acquisition program area which includes routines for: collecting raw data from the user interfaces and storing the raw data in data common, deriving scaled, floating point data from the raw data, and a safety monitor subroutine which monitors some of the incoming data for abnormal engine conditions such as engine overspeed, low oil pressure, and excessive engine block temperature. In addition to the three main program areas, a further partition may be provided for a test sequencer program which functions as a supervisory control of the engine hot-test sequence of operations.

The data common area is partitioned into subregions for: (1) storing the sensed raw data from the user interfaces, (2) storing scaled data derived from the stored sensed data by use of selected conversion coefficients, (3) storing engine model specifications such as number of cylinders, firing order, CI sensor mounting hole angle, number of ring-gear teeth, etc., and (4) storing a description of the desired test plan (a list of test numbers).

The areas in memory dedicated to the various test plans stored in data common (4) include a test module partition in which the engine tests requested by the test sequencer program are stored during execution of the test. The tests stored represent separately built program test routines executed during hot-test, that have a name format "TSTXXX" where XXX is a three-digit number. The test routines themselves are stored either in a further partition of the memory 136 or, if optioned, stored on floppy disks and read into the test module partition from the disk driver.

Each CPU instruction involves one or more bus cycles in which the CPU fetches an instruction or data from the memory 136 at the location addressed by the program counter. The arithmetic operations performed by the ALU can be performed from: one general register to another which involves operations internal to the CPU and do not require bus cycles (except for instruction fetch), or from one memory location or peripheral device to another, or between memory locations of a peripheral device register and a CPU general register; all of which require some number of bus cycles.

In the control system embodiment of FIG. 2, a combination interrupt/noninterrupt mode of operation is selected, although if desired, total noninterrupt may be used with further dedicated programming. The digital interfaces 152, 154 establish the processor interrupt mode of operation in which the CPU reads particular sensed engine data from the analog interface in response to specific events occurring within each engine cycle. The interrupt mode includes several submodes in which the CPU is directed to read specific input parameters, or combinations of parameters, depending upon the selected test. Each of the interrupts have an associated vectored address which directs the CPU to the particular input channels, or the locations in memory associated with the particular analog channel. These vectored interrupts are used to cause the CPU to read at the particular selected interrupt time: (a) engine cam angle alone, (b) cam angle and one or more analog channels, (c) one or more analog channels without cam angle, and (d) the spark duration counter (described hereinafter with respect to FIG. 4). In the absence of interrupts, i.e., the noninterrupt mode of operation, the CPU reads the data provided at the analog interface continuously as a stand alone device. In this noninterrupt mode, the sample sequence and sample time interval, typically one second, is ordered by the general data acquisition routine which stores the raw data in the memory data common location.

The interface 152 provides the interrupts required to synchronize the CPU data acquisition to specific, selected events within the engine cycle. This is provided by synchronizing the CPU interrupts to crankshaft angle position by: (1) sensing instantaneous crankshaft angle position from the dyne tooth signal information, and (2) detecting the crankshaft synchronization point (the TDC of the #1 cylinder power stroke) by sensing the CI signal from the CI sensor (90, FIG. 1) together with the number one cylinder firing as provided by the spark sensor (94, FIG. 1), as described hereinafter. With the crankshaft index marking the beginning of each engine cycle, the dyne tooth signal provides information on the instantaneous crankshaft angle position from this crankshaft synchronization point, such that the entire ignition cycle may be mapped. As a result, cam cycle and subcyclic information related to specific cylinder events within the ignition cycle may be accurately tagged as corresponding to known crankshaft angle displacement from the synchronization point. The interface 152 then interrupts the processor at predetermined locations within the engine cycle, each identified by a particular crankshaft angle value stored in the memory 136 and associated with with a particular engine cycle event. In addition, the interface 152 also provides CPU interrupt for: (1) the presence of number one cylinder spark ignition pulse, (2) the rising edge of the Lo coil voltage signal (which indicates the availability of the KV voltage to fire the sparkplug), (3) the CI signal, and (4) a discrete SPARK DURATION DATA READY signal provided from the digital interface 154 (described hereinafter with respect to FIG. 4).

Referring now to FIG. 3, the interface 152 includes a general purpose, parallel in/out bus interface 180, such as the DEC DR11-C, which interfaces the processor bus 134 to the signal conditioning circuitry illustrated. As known, the DR11-C includes a control status register, and input and output buffer registers, and provides three functions including: (1) address selection logic for detecting interface selection by the CPU, the register to be used, and whether an input or output transfer is to be performed, and (2) control logic which permits the interface to gain bus control (issue a bus requests) and perform program interrupts to specific vector addresses. The interrupts are serviced at two inputs of the bus interface; REQ A input 182, and REQ B input 184. Each input responds to a discrete presented to the input and, in the presence of such a discrete, generates the bus request and interrupt to the CPU over the bus I/O line 157. The interface also includes 16 pin user input and output connections 186, 188 for data transfer between the signal conditioning circuitry and the processor.

The interface 152 receives: the engine CI, the Lo-Coil signal, the number one cylinder spark ignition signal, and the dyne raw tooth signal on lines 160 from the digital interconnect 54, and the SPARK DATA READY signal on a line 190 from the interface 154. The dyne tooth signal is presented to an edge detection circuitry 192 which detects the rising and falling edges of each raw dyne tooth pulse and provides a signal pulse for each, resulting in a doubling of the frequency, i.e., X 2 pulse count for each camshaft cycle (engine cycle). The conditioned dyne tooth signal is presented on an output line 194 as a series pulse signal at a frequency twice that of the raw tooth signal. For a dyne tooth count of 256 teeth the conditioned tooth signal provides 512 pulses per crankshaft revolution; each pulse-to-pulse interval defines a crankshaft angle increment equal to 360.degree./512, or 0.703.degree.. Since each camshaft cycle is equal to two crankshaft revolutions, or 720.degree., the camshaft angle measurement revolution provided by the conditioned tooth signal is better than 0.1%.

The conditioned dyne tooth signal on the line 194 is presented to a ten bit counter 196 which counts the conditioned tooth signal pulses and provides a 10 bit binary count on lines 200 to the input 186 of the digital interface 180. The counter 196 provides a continuous count of the tooth pulses, continuously overflowing and starting a new 10-bit count. The count output from the counter 196 is also presented to one input (A) of a comparator 202 which receives at a second input (B) a 10-bit signal from the user output 188. The comparator provides a signal discrete on an output line 204 in response to the condition A=B.

The CI signal, the SPARK DATA READY signal, and the output of the comparator 202 on the line 204, are presented to the input of a multiplexer (MPX) 206, the output of which is presented to a buffer register 208. The Lo-coil voltage signal and the number one cylinder spark signal are each presented to a second MPX 210, the output of which is connected to a second buffer register 212. The outputs of the registers 208, 212 are connected to the interrupt inputs 182, 184 of the bus interface. The signal select function provided by the MPX's 206, 210 is controlled by address signals from the CPU on the bus interface output lines 214, 216. The address signals select the inputs called for by the CPU depending on the particular test routine or engine condition to be monitored at the particular time. The interface 180 also provides reset discretes for the registers 208, 212 on lines 218, 220 following the receipt of the buffered discrete at the interrupt inputs.

In operation, the control system acquires camshaft synchronization by having the CPU provide a SELECT CI address signal on lines 214 to the MPX 206. The next appearing CI signal is steered into the register 208 and read at the input 182. The interface generates a bus request and an interrupt back through the data bus to the CPU, which when ready, responds to the interrupt by reading the counter output on the lines 200. The count value is stored in data common. The CPU processes a number of CI interrupts, each time reading the counter output. The ten bit counter provides alternating high and low counts on successive CI interrupts, corresponding to TDC of the power stroke and intake stroke of each engine cycle. Typically, the count samples at alternate interrupts are averaged to provide two average count signals corresponding to the two interrupts in each cycle. The CPU next requests the number one cylinder spark discrete by outputting a READ NO. 1 SPARK address signal on the line 216 to the MPX 210. In response to each spark signal interrupt, the CPU reads the output of the counter 196. Since the spark discrete signal appears only once in each engine cycle, as opposed to the twice appearing CI signal, the count corresponding to the spark discrete is compared to the two averaged count signals for the CI interrupt. The CI count closest to that of the spark count is selected as the CI corresponding to the number one cylinder power stroke. The CI sensor crankshaft angle displacement from true TDC is read from memory and the equivalent angle count is added to the selected CI count (CI.sub.p) to provide the crankshaft synch point count which is stored in memory. The difference count between the spark count and synch point count represents the engine timing angle value, which is also stored in memory. The subroutines for camshaft synchronization are described hereinafter with respect to FIG. 7.

With the engine cam cycle defined by the stored count in memory the CPU may specify particular camshaft angles at which it desires to read some of the engine sensed parameters. This is provided by reading the desired cam angle value from the memory 136 to the output 188 of the interface 180, i.e., the B input of the comparator 202. In response to the count on the lines 200 from the counter 196 being equal to the referenced count, the comparator provides a discrete to the MPX 206, which is addressed to the comparator output by the appropriate "SELECT COMPARATOR" address on the lines 214. This interrupt is serviced in the same way providing a vectored address to the CPU and steering it to the particular one of the analog input channels.

Referring now to FIG. 4, the digital interface 154 also includes a digital bus interface 230, such as a DR11-C. The interface 154 receives the sensed engine discrete signals including the Hi-coil and Lo-coil voltage signals on lines 160. The Lo-coil signal is presented to signal conditioning circuitry 232 which squares up the leading edge of the signal and provides the conditioned signal on a line 234 to the reset (RST) input of a twelve bit counter 236 and to the enable (ENBL) input of a one-shot monostable 238. The Hi-coil signal is presented to a zero crossover circuit 240 which when enabled provides the SPARK DATA READY signal on the line 190 in response to the presence of a zero amplitude, i.e., crossover of the Hi-coil signal.

As described hereinafter with respect to the sparkplug load tests, each Hi-coil voltage signal which is representative of successive sparkplug voltage signals includes an initial KV peak voltage followed by a plateau representative of the actual plug firing interval. The peak KV portion is followed by a ringing of the waveform which, in some instances, may be detected by the zero crossover circuit as a true crossover, therefore, the crossover circuit is enabled only after a selected time interval following the leading edge of the Lo-coil signal. The enable is provided by a decode circuit 242 which senses the output of the counter 236 and in response to a count greater than that corresponding to a selected time interval, typically 512 microseconds, provides an enable gate to the zero crossover circuit. The SPARK DATA READY discrete from the zero crossover circuit is provided both to the input of the digital interface 152 and to a stop (STP) input of the counter 236. A one megahertz signal from a clock 244 is presented to the count input of the counter 236 and to the input of the monostable 238, the output of which is presented to the start (STRT) input of the counter.

The counter functions as an interval timer and provides an indication of the time interval between the Lo-coil leading edge and the Hi-coil zero crossover which corresponds to the time duration of the sparkplug voltage signal. In operation, the leading edge of the conditioned Lo-coil signal resets the counter and triggers the monostable which, following a prescribed delay (typically one clock period) starts the counter which then counts the one megahertz clock pulses. In response to a lines 246 count greater than 512, the decode 242 provides the enable to the zero crossover circuit. At the Hi-coil crossover, the crossover circuit provides the SPARK DATA READY discrete on the line 190, which stops the counter and if selected by the CPU, interrupts the CPU via the digital interface 152. The interrupt causes the CPU to read the count at input 248 of the bus interface as an indication of the time duration of the sparkplug firing voltage. Typically, this sparkplug duration count is read continuously by the CPU, which with the synchronization to the camshaft angle identifies each sparkplug signal with its associated cylinder.

The bus interface 230 also provides at a user output 250 the digital discrete signals corresponding to the START ENGINE signal, and the discrete signals associated with the throttle actuator (56, FIG. 1) and with control of the emissions analyzer (70 FIG. 1). These discrete enable signals to the analyzer include flush, sample, drain, and sample intake commands which cause the analyzer to function in a program, all of which is known in the art. All of the discretes are presented through output lines 252 to line drivers 254, the output of which is presented through the lines 162 to the digital interconnect 54.

Referring now to FIG. 5, the analog interface 166 includes an analog bus interface 260, such as the DEC model ADAC600-11, having input/output sections 262, 264. The input section includes a series of data acquisition channels connected to a user input 266, and an analog-to-digital (A/D) converter for providing the digital binary equivalent of each sensed analog parameter through the bus output 268 and lines 159a to the processor bus. The output section includes a digital-to-analog (D/A) converter which receives the CPU output signals to the engine on lines 159b and provides the analog signal equivalent of each at a user output 270. The CPU output signals include: the setpoint reference signals for the engine throttle control and the torque setpoint reference signal for the dyne control all included within the lines 170 to the analog interconnect.

The sensed engine signals presented to the analog interface are signal conditioned prior to input to the bus interface. The Hi-coil voltage signal on line 164.sub.a is presented to a peak detector 272 which samples and holds the peak KV value of the signal, and this sampled peak value is presented to the bus interface. The peak detector is resetable by an engine event discrete, such as the trailing edge of low coil from the Lo-coil signal conditioner 273 in the interface 156. The AC manifold signal is presented through a band pass filter 274 to the bus interface. The limits of the band pass filter are selected in dependence on the number of engine cylinders and the range of engine test speeds. The DC manifold vacuum signal, the dyne torque signal, the miscellaneous sensed signals including engine oil, water and fuel temperatures and pressures, and the emissions data (lines 164.sub.d-g) are coupled to the bus interface through low pass filters 276 which reject any spurious noise interference on the signal lines. The exhaust back-pressure sense signal on a line 164.sub.j is presented to a band pass filter 278 prior to presentation to the bus interface, with the limits selected based on the particular engine and speed range.

The engine raw tooth signal and the dyne raw tooth signal on the lines 164.sub.h'i' are presented to associated frequency to DC converters 280, 282. The output signals from the converters, which include DC and AC components of the tooth signals, are provided on lines 284, 286 to associated band-pass and low-pass filters. The converted engine tooth signal is presented to low pass filter 288 and band-pass filter 290, and the converted dyne tooth signal is presented to low-pas filter 292 and band-pass filter 294. The DC signals from the low-pass filters 288, 292 provide the DC, or average engine speed (N.sub.av) for the engine and load, and are presented directly to the bus interface. The AC signal outputs from the band-pass filters, whose limits are selected based on the same considerations given for filters 274, 278, are presented through AC amplifiers 296, 298 to the associated channels of the input interface 262 as the indications of the instantaneous, or AC speed (N) of engine and load.

As described hereinbefore, the general data acquisition routine collects the data from the analog bus interface 260 at a prescribed sample cycle, typically once per second. The raw data is stored in one section of the data common partition of the memory 136 and a data acquisition subroutine generates a set of scaled data from the raw data using linear conversion coefficients stored in a coefficient table in memory. This second set of data is a properly scaled set of floating point numbers and is used primarily by the dynamic data display programs (for display on the CRT, FIG. 2) and for particular test subroutines which require slow speed data). In addition, the general data acquisition routine may also execute a safety monitor subroutine which checks for overtemperature of the engine block and also low engine pressure limits. Referring now to FIG. 6, in a simplified flow chart illustration of the general data acquisition routine the CPU enters the flow chart following terminal interrupt 300 and executes the subroutine 302 which requires the sampling of all A/D data channels (i=N) from the analog bus interface (260, FIG. 5). The raw data read from the A/D is stored in data common. Following the raw data acquistion subroutine 304 calls for providing a scaled set of data from that sampled in 302. This begins with process 306 which requests the CPU to fetch the linear coefficients (M,B) associated with the particular data channel (i=N) from a coefficient table in data common. Process 308 request the linear conversion of the raw data to the scaled result, after which instructions 310 call for storage of the scaled data in data common at an address C=i. Decision 312 determines if the last conversion was also the last channel (i=N) and if NO then instructions 314 requests an increment of the CPU address counter to the next address and the conversion subroutine is again repeated for each of the raw data values. Following the completion of the linear conversion subroutines (YES to decision 312) the safety monitor subroutine 316 is executed.

All of the engine test routines acquire initial value data relating to load speed and torque as well as engine timing and crankshaft synchronization prior to taking the particular test routine engine data. The analog values relating to load speed and torque are obtained under the general acquistion routine. The engine timing and crankshaft synchronization is obtained under a separate subroutine. Referring now to FIG. 7, which is simplified flowchart illustration of a preferred engine timing and synchronization subroutine, the CPU enters the subroutine at 350 (FIG. 7A) and instructions 352 request the CPU to set the crankshaft index (CI) interrupt counter at zero. Instructions 354 request a max. CI interrupt count of N which is equal to twice the number of desired cam cycles of data (M) since the crankshaft index sensor (90, FIG. 1) provides two pulses in each cam cycle. Instructions 356 next request the read of average engine RPM from data common. Decision 358 determines if the actual engine speed is above a minimum speed required to insure valid data. If NO, instructions 360 display an error on the CRT, (144, FIG. 2) followed by decision 362 which determines if an operator entered CLEAR has been made. If there is a CLEAR of the test then the CPU exits the subroutine at 364. In the absence of an operator CLEAR the CPU waits in a loop for the minimum speed condition to be established. This is provided by decision 366 which determines if the latest RPM is greater than minimum, and if NO then continues to display the error and look for a CLEAR in 360, 362. Once the minimum RPM has been exceeded, instructions 368 request the CPU to select CI INTRPT which results in the address select to the MPX 206 of the digital interface 152 (FIG. 3) which monitors the CI pulse signal provided on a line 160.sub.a.

Decision 370 monitors the CI interrupt and in the absence of an interrupt displays an error in instructions 372, and looks for an operator CLEAR in instructions 374. If a CLEAR is entered the CPU exits at 364, and if no CLEAR then decision 376 monitors the presence of a CI interrupt. Following a CI interrupt instruction 378 requests a read of the dyne tooth signal count provided by the counter 196 (FIG. 3). The CPU increments the interrupt counter in instructions 380 to mark the dyne tooth count and decision 382 determines if the present interrupt is odd or even. If odd the count is stored at location A and if even it is stored at location B (instructions 384, 386). Decision 388 next determines if the interrupt is at the max count N and if not then branches back to instructions 368 to set up the next CI interrupt data acquisition. If the maximum number of interrupts have been serviced instructions 390 and 392 request the averaging of all the stored count data in each of the locations A, B to provide an average A count and an average B count.

The CPU must identify which of the two interrupts occurring within the cam cycle is associated with the TDC of the #1 cylinder power stroke. This is provided by an acquiring the cam angle data associated with #1 cylinder spark ignition. In FIG. 7B, instructions 394 set the #1 spark interrupt to zero and instructions 396 define the max spark interrupt count as M equal to the number of cam cycles of data to be acquired. The CPU then executes the subroutine to determine the cam angle position corresponding to the #1 spark ignition. This begins with instructions 398 to select a NO 1 SPARK INTRPT. The decision 400 looks for the presence of a spark interrupt and if no interrupt appears within a predetermined time interval the CPU again goes into a waiting loop which begins with the display of an error in 402 and the monitoring of an operator entered CLEAR in decision 404. If an operator clears entered the CPU exits the subroutine at 364. If no CLEAR, then the presence of a spark interrupt is continuously monitored in instructions 406.

Following a spark interrupt, instructions 408 read the dyne tooth signal count. Instructions 410 increment the spark interrupt counter by one and instructions 412 call for the storage of the spark count value at location C. Decision 414 determines if this is the last spark interrupt to be serviced, and if not the CPU branches back to instructions 398 to set up for the next interrupt data read. Following the requested number of interrupts, instructions 416 request the averaging of all the count stored at location C to provide a C average count value.

With this information available, the CI interrupt associated with TDC of the power stroke can be determined by comparing the two CI counts (odd/even) to the spark interrupt count. This is provided in instructions 418 et seq which first calls for calculating the difference (X) between the average A and the average C counts. Instructions 420 request the determination of the count difference (Y) between the B average and the C average counts. Decision 422 compares the X and Y counts to determine which is the largest. If the X count is larger, than instructions 424 store the Y difference count as that respresentative of the engine timing angle value. Similarly, instructions 426 call for storing the X count as the engine timing angle if it is the smaller of the two count differences. Instructions 428, 430 request the CPU store of the crankshaft index power (CI.sub.p) as being equal to the count of the B average, or the A average, respectively. In other words, the particular one of the two counts received in the CI interrupt closest to the count corresponding to the spark interrupt is then considered to be the CI.sub.p of #1 cylinder. Instructions 432 request the CPU to read the angle (.phi.) defined by the engine manufacturer for the particular engine which represents the angular displacement between the mounting hole for the CI sensor in the damper housing and the instantaneous position of the damper notch at true TDC of #1 cylinder. Instructions 433 next request the equivalent count value associated with the displacement angle, and instructions 434 request the calculation of the cam cycle synchronization point, or true TDC of #1 cylinder power stroke, as the sum of the crankshaft index of the power stroke plus the count increment associated with the displacement angle. Following instructions 434, the CPU exits the program at 364.

With the CPU synchronization to the engine crankshaft, the sensed engine data at the analog interface 158 (FIG. 2) may be sensed at any selected crankshaft angle increment, down to the 0.7 degree resolution provided by the conditioned dyne tooth signal to the interface 152. The particular selection of angle increment depends on the resolution accuracy required of the measured data, or the frequency of data change with crankshaft angle. Typically, the selected angle increments may be three or four times greater than the achievable angle resolution, the limitation due primarily to the processor overhead time, i.e., the inability of the processor to gain access to and process the data within the equivalent real time interval associated with the 0.7 degree crank angle interval. In general, each test routine includes its own, dedicated data acquistion subroutine for the particular parameter of interest. The various tests read out the slower engine speed data from data common, as provided by the general data acquisition routine. This slower data includes, among others, the sensed miscellaneous sensors (115, FIG. 1) data relating to oil and water temperatures, the choke position, and the average speed and load torque values, as may be necessary to determine if the engine prequisite conditions have been established prior to test.

The description thus far has been of a hot-test installation and control system which is capable of providing a number of different automated tests for determining the performance of the test engine. The instrumentation described with respect to FIG. 1, and the control system of FIGS. 2-5 together with the description of the application software including the general data acquisition, are illustrative of that required for a hot-test system capable of providing such a number of different performance tests. The present invention may be incorporated in such a system; its use and implementation in such a system, as described in detail hereinafter, represents the best mode for carrying out the invention. It should be understood, however, that the invention may be implemented in a simpler system which includes the engine load, but which includes only that sensing, signal conditioning, and signal processing apparatus required for direct support of the invention.

The present invention provides for the detection of a specific engine fault, namely an inoperative accelerator pump. This is provided by measuring the carbon monoxide (CO) and hydrocarbon (HC) concentrations in the engine exhaust gas following rapid acceleration/deceleration (snap accel) of the engine, and comparing the post snap accel values of each to quiescent values of each measured prior to snap accel. The present invention may be used to detect accelerator pump operation on any type of IC engine, and may be used alone or together with other test procedures in a hot-test system such as that described with respect to FIGS. 1 through 5.

As may be known, the accelerator pump of an IC engine is responsive to a rapid rate of change in the engine's throttle position to provide the initial enrichment of the fuel supply to the engine cylinders under an acceleration demand, thereby preventing loss of manifold vacuum and an engine "lean-out" or stall condition. The enriched fuel decreases the air/fuel (A/F) ratio resulting in an increase in both the CO and HC constituents in the engine exhaust. The accelerator pump itself, however, provides only the initial or leading enrichment under the accleration demand such that continued throttle demand results in a decrease in manifold vacuum. To prevent loss of vacuum the engine's power valve (enrichment valve) opens and provides the additional fuel required by the engine to maintain vacuum and prevent stalling. The power valve is spring loaded closed and opens in response to a decrease in the engine manifold vacuum during acceleration; this results in a still greater increase in the CO and HC emissions which obscures the increase in emissions resulting from the actuation of the accelerator pump alone. Since the accelerator pump responds directly to the throttle change of position whereas the power valve is functioned off of the engine manifold vacuum, rapidly accelerating the throttle to activate the accelerator pump followed by immediate deceleration within the response time of the intake manifold vacuum allows the function of the accelerator pump itself to be isolated and detected.

The present invention provides for the snap accel of the engine in less time than that required for response by the engine power valve. In providing the snap accel the engine throttle is snapped from the steady state, or idle position, to full throttle by an impulse force provided to the throttle linkage by the throttle actuator 56, (FIG. 1). The impulse is removed following a time interval sufficient to achieve full throttle position, allowing deceleration of the engine at the spring rate of the throttle assembly itself. The total throttle displacement time interval (t.sub.p) from steady state to full throttle and back to steady state is dependent on the mechanical response time of the throttle assembly itself, and as such varies between engine model types. In the present invention the snap accel is provided within the minimum time interval permitted by the mechanical response time of the particular engine throttle assembly.

In the present embodiment the actuator 56 is used to provide the impulse force for snapping the throttle, however, the throttle control (55, FIG. 1) itself, if capable, may be used to provide the snap accel. Referring now to FIG. 8, the engine throttle 820 is connected through the throttle linkage 822 to a movable arm 824 of the throttle control 55, and also through a control cable 826 to a pneumatic linear actuator 828 included within the actuator assembly 56. The throttle control 55 is any one of a number of known types available in the art, and the actuator 828 is similarly of a known type, such as the Allenaire model SP-1-1/8X3-SR-R. The actuator has a stroke displacement sufficient to snap the throttle 820 from the steady state position to its full throttle position via the control cable 826. The actuator piston is activated in response to the presence of pressurized air typically 125 PSIG provided from a pneumatic source 830 through a solenoid valve 832 and pneumatic lines 834 to one input of the actuator. The pneumatic source may be any type of pressurized air source capable of providing the required pressure levels, and may be that generally available to the hot-test installation. The solenoid valve is a two-position device which provides the pressurized air from the source to the line 834 when energized by AC power provided through a relay 836 from an AC voltage source 838. The relay provides the VAC to the solenoid in response to the presence of a SNAP ACCEL discrete signal provided on the lines 58 from the control system (30, FIG. 2) through the digital interconnect 54 (FIG. 1). When de-energized the solenoid provides the pressurized air through pneumatic lines 840 to a second input of the actuator 828 causing the actuator to be re-positioned in its quiescent state, i.e. that state corresponding to the throttle idle, or steady state position. The actuator stroke is, therefore, controlled by the selective presentation of the pressurized air through either one of the two pneumatic lines 834, 840. The pressurized air on the line 834 causes the actuator to retract over its stroke distance, thereby displacing the throttle to the full throttle position, and redirection of the pressurized air through the lines 840 causes the immediate extension of the actuator back to its quiescent position. In this manner the return of the throttle 820 to its steady state position is determined solely by the spring rate of the throttle assembly itself and is not hampered or slowed by the test apparatus.

Referring now to FIG. 9, in a simplified flowchart illustration of the snap accel test of the present invention, as used in the control system of FIG. 2, the CPU enters the flowchart at 850 and first executes subroutine 852 to determine if the prerequisite engine test conditions have been established. The prerequisite conditions relate to verifying that the actual values of load torque and engine speed are at their setpoint values, and to ensuring that the engine has achieved thermostat control. These checks themselves are required only to ensure that the conditions have been established which for a normal engine would result in smooth running of the engine. The actual engine speed established for the test depends on the particular engine model type and in general may be the normal idle or a selected off-idle speed. The essential criteria being that there is allowance for a sufficient throttle travel, or displacement from the selected steady state position to the full throttle position, and also that the selected steady state engine speed provide for a substantially constant, quiescent CO and HC emission values. Similarly, the verification that the engine has achieved thermostat control is intended to assure a relatively smooth running engine. Thermostat control is verified by sensing the engine coolant and oil temperatures from the miscellaneous engine sensors (115, FIG. 1). For an assumed 8-cylinder engine, a typical steady state speed may be on the order of 1200 RPM with a typical load torque of 75 Ft-Lbs, although the actual values are dependent on the engine model type. The steady state speed is regulated by the throttle control 55 in response to the setpoint value provided on the lines 57 from the control system. Similarly, the dyne control (42, FIG. 1) controls the load to the setpoint torque value provided on the lines 43 from the control system. Both the steady state speed and load torque values are read out of the test plan in memory and provided through the analog interconnect to the engine throttle and dyne controls. Failure to achieve the prerequisite conditions results in instructions 854 displaying an error on the CRT (144, FIG. 2), and decision 856 determines whether or not an operator entered CLEAR has been made. If YES the CPU exits the routine at 858 and if NO then branches back to instructions 852.

Following the verification of the prerequisite conditions, the CPU establishes the set-up for the snap accel test. Instructions 860 request the reset of a CPU interval timer, and instructions 862 request a SAMPLE MODE discrete be provided to the analyzer. This is provided through the digital interface 154 (FIG. 4) which provides the discrete through lines 162 (FIG. 2) and digital interconnect 54 to the emissions analyzer 70 (FIG. 1). This enables the SAMPLE MODE of the analyzer which then provides the signals representative of the sampled CO and HC concentrations through the line 74 and analog interconnect 54 to the analog interface 156 (FIG. 5) where they are received at two input channels of the bus interface 260. Instructions 864 next request a reading of the CO and HC sensed data at selected .DELTA.T intervals. This provides a quiescent (Q) value for both constituents prior to the snap acceleration, which are used as the reference in determining the actual increase in concentration as a result of the snap accel. With the samples provided in instructions 864 the CPU establishes a CO(Q) and a HC(Q) value. Instructions 866 next provide the SNAP ACCEL discrete to the actuator circuit 56, energizing the relay 836 which in turn energizes the solenoid 832. The solenoid directs the pressurized air through the pneumatic line 834 and the actuator 828 responds by displacing the throttle assembly 820 from the steady state to the full throttle position. The SNAP ACCEL discrete has a pulse width (T.sub.p) which is dependent on the time required by the air actuator 828 to respond and displace the throttle to full position. For the air actuator of the present embodiment the discrete pulse width is on the order of 0.1 seconds. At the end of the discrete pulse the solenoid is de-energized, providing pressurized air through the pneumatic line 840 which drives the actuator back to its quiescent position allowing the engine to decelerate at the spring rate of the throttle itself.

Referring to FIG. 10, the signal pulse 868 of illustration (a) represents the SNAP ACCEL discrete provided by the control system to the air actuator. The pulse 870 of illustration (b) represents the response of the throttle assembly 820 to the discrete. As illustrated the throttle is displaced from the steady state position 872 to a point equal to, or greater than the 100% throttle position 874. At the end of the T.sub.P interval of the discrete the actuator is forced to its quiescent position and the throttel returns to the steady state position 872 at the spring rate 876. The waveform 878 of illustration (c) is intended to represent simultaneously, the instantaneous values of both the CO and HC concentrations (the CO and HC values both increasing under the snap accel from a quiescent value to some peak value in response to an operating accelerator pump). The sample 880 represents the last quiescent sampling of the CO and HC values prior to the throttle snap and the samples 882a-f represent the sampling of both CO and HC emissions following the throttle snap accel. Instructions 866 also provide the enable of the interval timer within the CPU, which functions as a watch-dog timer to clock the total sample time interval of the emissions following the snap accel. This provides for a maximum time limit for sampling of the emissions since a faulty accelerator pump will not provide the change in emissions and the sampling time must be limited to a nominal time interval in which there should be a response in the presence of a functioning accelerator pump. Instructions 884 next request the continuous sample of the CO and HC emissions following the SNAP ACCEL for some number of M time intervals (.DELTA.t). While there is some finite propagation delay associated with the exhaust gas through the exhaust manifold and exhaust pipe, the analyzer (70, FIG. 1) itself provides the predominant delay in detecting the change in emissions. Typically for the Beckman analyzer the sensed response for the emissions data occurs somewhere in the range of 5 to 15 seconds following the throttle displacement. The sample time intervals are selectable and may typically be on the order of one second intervals. Therefore, instructions 884 establish a maximum interval of t.sub.max =M.multidot..DELTA.t. Each sampled value is stored in memory.

Following termination of the sample time interval instructions 886 request the determination of the maximum sensed values of CO and HC following the SNAP ACCEL. In FIG. 10 the maximum sample value is illustrated as being sample 882.sub.e and instructions 888 request the ratio of the maximum sample values obtained in the sample time interval to the quiescent values established prior to the snap acceleration, i.e. in FIG. 10 the ratio of the sample at 882.sub.e to the sample 880. Instructions 890 then compare the ratios provided in instructions 888 to selected test limits. The test limits are determined based on the particular engine model type, such that a nominal or minimum increase may be predicted for a functioning accelerator pump and this value is then compared with the actual increase provided from the samples to determine the acceptable or non-acceptable (pass/fail) performance of the accelerator pump. Following the comparison of the actual increases to the selected limits instructions 892 request the display and/or storage of the test results, and the CPU exits the program at 858.

The snap accel produced increases in CO and HC concentrations above the pre-snap quiescent values are again dependent on the particular type engine. Typically for the assumed 8-cylinder engine the increase in each concentration for a functioning accelerator pump is on the order of two-to-one or greater, whereas in the presense of a defective pump the increase is significantly less, such that the measurement of each emission constituent provides a reliable indicator of the functioning or non-functioning of the accelerator pump with repeatable accuracy. Although both the CO and HC concentrations respond to the accelerator pump operations, the CO demonstrates a more responsive and repeatable characteristic increase to the accelerator pump operation. This is due to the fact that the HC concentration, while responsive to, and indicative of accelerator pump operation, is similarly responsive to cylinder misfires which may occur in the engine even on a sub-cyclic basis. As such, the more sensitive characteristic of the HC emission results in it being less reliable for the detection of the accelerator pump failure. Therefore, the use of the CO emission is preferred and the results of the comparison of the CO increase above the quiescent value may be used in the presence of a conflicting HC measured change.

Similarly, the quiescent A/F ratio which is dependent on the particular engine type, affects the CO response to the accelerator pump operation. In general the lower the A/F ratio the higher the concentration of CO in the exhaust emissions, such that a maximum A/F ratio may be established to ensure a sufficient percentage concentration of CO in the engine exhaust. The preferred maximum A/F ratio for the test engin when the CO emission alone is used, is a ratio less than 16.

The snap acceleration test of the present invention provides for an accurate measurement of the performance of an IC engine accelerator pump, allowing for the detection of a defective pump during dynamic operation of the engine. The test allows for an accurate determination of an accelerator pump function by ensuring tht the change in CO and HC concentrations are the direct result of the accelerator pump operation, and not that of the power valve, by snap accelerating and decelerating the engine within a time interval less than that required for response of the engine power valve. In this manner the response in the exhaust constituents may be identified as resulting directly from the operation of the accelerator pump. The test provides for an accurately repeatable response in the exhaust emission such that a nominal response characteristic in the emissions may be predicted for a normal accelerator pump. Both the CO and HC constituents may be used as an indication, however, the CO may provide the more repeatable and more accurate indication due to the sensitivity of the HC to other engine conditions. The use of CO alone is preferred for engines having a maximum A/F ratio less than 16. Similarly, although the invention has been shown and described with respect to a best mode embodiment thereof, it should be understood by those skilled in the art that the foregoing and various other changes, omissions and additions in the form and detail thereof may be made therein without departing from the spirit and the scope of this invention.