Amplifier Arrangement With Variable Gain Factor

The invention relates to an amplifier arrangement with variable gain comprising a first and a second transistor with interconnected emitters, a third and a fourth transistor with interconnected emitters, an output which is coupled to the collectors of the first and the third transistors, means for applying a control voltage between the base electrodes of the first and the second transistors, the base electrode of the third transistor being connected to the base electrode of the second transistor and the base electrode of the fourth transistor being connected to the base electrode of the first transistor, quiescent current means for the application of quiescent currents to the interconnected emitters of the first and the second transistors and to the interconnected emitters of the third and the fourth transistor and signal current means for the application of signal current to at least the interconnected emitters of the first and the second transistors.

Such amplifier arrangements are generally known as automatic gain control circuits, electronic potentiometers etc. and may be employed in, inter alia, volume and tone control circuits in audio equipment. If, moreover, an a.c. signal is applied to the control signal input such circuit arrangements may be employed as multipliers, modulators or demodulators.

Such circuit arrangements, for example those in accordance with U.S. Pat. No. 3,684,974, generally comprise a single-ended or differentially driven differential pair with a current distribution circuit in each of the collector circuits of the two transistors of said differential pair. These current distribution circuits each comprise two transistors whose emitters are connected to the collector of that transistor in whose collector circuit they are included. The base of one of the two transistors of the one current distribution circuit is then connected to the base of one of the transistors of the other current distribution circuit and the bases of the two other transistors are also interconnected. By the application of a voltage between the two pairs of interconnected base electrodes the current distribution factors of the two current distribution circuits can be controlled. An output signal with a d.c. component which is independent of a current distribution is obtained by connecting the collector of the one transistor of the one current distribution circuit to the collector of the other transistor of the other current distribution circuit. If the gain factor of the input differential pair is A and the current distribution factor is K ( 0.ltoreq.K.ltoreq.1), the gain will be AK. If a second output is formed by connecting the collector of the other transistor of the one current distribution circuit to the collector of the one transistor of the other current distribution circuit, the gain at said second output will be (1-K)A. Such an amplifier arrangement may then be regarded as two amplifiers with gain factors AK and (1-K)A and common input(s).

In such an amplifier the gain factor is also determined by the term A, which depends on the components which are used, so that it is inter alia temperature-dependent. Also, the inequality of the components and the non-linearity of the input differential pair give rise to drift and signal distortion.

It is known to eliminate said dependence to a large extent by the use of negative feedback. The negative-feedback factor then determines the gain factor. However, negative feedback between the output and input of such an amplifier arrangement would also eliminate the effect of the current distribution circuit, i.e. the factor K, so that the amplifier arrangement would no longer be controllable.

From U.S. Pat. No. 3,891,937 it is known to use the signal which has been amplified by a factor AK as the output signal and the signal which has been amplified by the factor A(1-K) as the negative-feedback signal. If in such a case the negative feedback is a maximum and the input signal is V.sub.i, the following expression is valid for the output signal V.sub.u : ##EQU1##

If K is substantially unity the following approximation is valid:

In this case the negative feedback has substantially no effect.

If K is substantially equal to O and the factor A is very great, the following approximation is valid:

In this case the negative feedback is optimal.

The drawback of this method of negative feedback is that the degree of negative feedback depends on the variable factor K, but for some uses this is more favourable than no negative feedback.

From U.S. Pat. No. 3,875,522 an amplifier arrangement with controllable gain and k-independent negative feedback is known. This amplifier arrangement comprises a first and a second pair of emitter-coupled transistors, the collectors of first transistors of both pairs together constituting the output, while the base electrodes of said first transistors constitute two independent inputs. The negative feedback is obtained in that the output is connected to the base electrodes of second transistors of both pairs. The gain factor can then be controlled by controlling the quiescent currents applied to the interconnected emitters of both pairs relative to each other. In this amplifier the negative feedback is optimal. However, since the mutual conductance is controlled the non-linearity of the transistors of both pairs still gives rise to distortion, in particular at the limits of the control range where one of the two pairs always receives a comparatively small quiescent current.

It is an object of the invention to provide an amplifier arrangement of the type mentioned in the preamble, i.e. without mutual-conductance control, with k-independent negative feedback. For this the invention is characterized in that said signal current means comprise a first voltage-current converter having a first input which is inverting relative to the output of the amplifier arrangement and a second input, which constitutes the first signal voltage input of the amplifier arrangement, and a second voltage-current converter having at least a first input which is inverting relative to the output of the amplifier arrangement, the first inputs of the first and the second voltage-current converters being connected to the output of the amplifier arrangement.

If the signal on the signal input of the first voltage-current converter is V.sub.i1 and if the second voltage-current converter has a signal input with a signal V.sub.i2, the output signal V.sub.S will be:

If this signal is completely applied to the two voltage-current converters in a degenerative sense, the following is valid for A>>1 when V.sub.i1 and V.sub.i2 are respectively substituted by (V.sub.i1 -V.sub.S) and (V.sub.i2 -V.sub.S) in the preceding expression:

In this respect it is to be noted that the signal input of the second voltage-current converter need not necessarily be present. In that case:

It is to be noted that the amplifier arrangement in accordance with the invention is not limited to arrangements using bipolar transistors. If for example field-effect transistors are used, base, emitter and collector electrode should respectively be read as gate, source and drain electrode.

The invention will now be described in more detail with reference to the FIGURE which shows a preferred embodiment of an amplifier arrangement in accordance with the invention.

This arrangement comprises a first voltage-current converter including a transistor T.sub.1 whose base is connected to the output 16 of an amplifier V.sub.1. The non-inverting input of amplifier V.sub.1 constitutes the signal input 2 and the inverting input 5 is connected to the emitter of transistor T.sub.1. The emitter of transistor T.sub.1 is connected to a quiescent-current source comprising a transistor T.sub.7 and a resistor R.sub.5 and to a negative-feedback input 1 via a resistor R.sub.1.

A second voltage-current converter comprises a transistor T.sub.2 whose base is connected to output 17 of amplifier V.sub.2. The non-inverting input of amplifier V.sub.2 constitutes the signal input 3 and the inverting input 6 is connected to the emitter of transistor T.sub.2. The emitter of transistor T.sub.2 is connected to the quiescent-current source comprising a transistor T.sub.9 and resistor R.sub.7 and to the negative feedback input 1 via a resistor R.sub.2.

The collector electrode of transistor T.sub.1 is connected to the common emitter electrodes of transistors T.sub.3 and T.sub.4, which constitute a current distribution circuit. The base electrodes of said transistors T.sub.3 and T.sub.4 are connected to control-signal inputs 10 and 9 respectively. Similarly, the collector of transistor T.sub.2 is connected to the common emitter electrodes of transistors T.sub.5 and T.sub.6, which constitute a second current distribution circuit. The base electrodes of transistors T.sub.5 and T.sub.6 are connected to control signal inputs 9 and 10 respectively. The collector electrodes of transistors T.sub.4 and T.sub.6 are connected to power supply terminal +V.sub.B and the collector electrodes of transistors T.sub.3 and T.sub.5 to the input 11 of a current-mirror circuit comprising transistors T.sub.11, T.sub.12 and T.sub.13 and resistors R.sub.3 and R.sub.4. The output 12 of the current mirror circuit is connected to a quiescent-current source comprising a transistor T.sub.8 and a resistor R.sub.6 and to the non-inverting input 13 of a differential amplifier V.sub.3 , whose output 15 is connected to the negative-feedback input 1. Said differential amplifier V.sub.3 is connected as a voltage-follower arrangement in that the inverting input 14 is connected to the output 15. The output terminal 1 is coupled to the collectors of transistors T.sub.3 and T.sub.5 via amplifier V.sub.3 and the current mirror circuit.

The current source transistors T.sub.7, T.sub.8 and T.sub.9 have a specific d.c. setting in that a series connection of the resistor R.sub.9, the transistor T.sub.10 which is connected as a diode, and the resistor R.sub.8 is included between the power supply terminals +V.sub.B and -V.sub.B. The voltage across diode T.sub.10 and resistor R.sub.8 is applied to the base electrodes of transistors T.sub.7, T.sub.8 and T.sub.9.

An input signal voltage V.sub.i1 at input 2 appears at the emitter 7 of the transistor T.sub.1 because amplifier V.sub.1 receives negative feedback via the base-emitter junction of transistor T.sub.1. Similarly, a signal input voltage V.sub.i2 on input 3 appears on the emitter 8 of transistor T.sub.2. Thus, a signal voltage V.sub.i1 -V.sub.u appears across resistor R.sub.1 and a signal voltage V.sub.i2 -V.sub.u across resistor R.sub.2. If resistors R.sub.1 and R.sub.2 have a resistance value equal to R.sub.o the collector signal current of transistor T.sub.1 equals (V.sub.i1 -V.sub.u)/R.sub.o and the collector signal current of transistor T.sub.2 equals (V.sub.i2 -V.sub.u)/R.sub.o.

The arrangement of transistor T.sub.1, differential amplifier V.sub.1 and resistor R.sub.1, as well as that of transistor T.sub.2, differential amplifier V.sub.2 and resistor R.sub.2 may each be described as a voltage-current converter. The voltage V.sub.i1 -V.sub.S is converted into a current (V.sub.i1 -V.sub.S)/R.sub.o across resistor R.sub.1. This conversion can also be achieved with other types of converters.

The collector currents of transistors T.sub.3 and T.sub.4 as well as those of transistors T.sub.6 and T.sub.5 are in a ratio of K:1-K, K being determined by the voltage across the inputs 9 and 10. The input signal current at input 11 of the current mirror and, in the case that the current mirror has a gain factor of unity, also at output 12 of said current mirror, is then ##EQU2##

If the signal impedance constituted by the collector impedance of transistor T.sub.8 in parallel with the input impedance of amplifier V.sub.3 has a value R.sub.t, the voltage V.sub.u at output 12 will be: ##EQU3## where n represents the current mirror gain and the base current losses of transistors T.sub.1, T.sub.2, T.sub.3 and T.sub.5.

If the factor R.sub.t /R.sub.o. n is substantially greater than unity, the following is found for V.sub.u :

If the collector currents of transistors T.sub.7, T.sub.8 and T.sub.9 are equal, the quiescent current at output 12 of the current mirror is equal to the collector current of transistor T.sub.8 when the base current losses are neglected.