Constant Voltage Output Circuit

This invention relates to a constant voltage output circuit and more particularly to a constant voltage output circuit for obtaining a constant voltage using a voltage level of an input power source given to a reference potential as its reference.

In an electronic circuit, a constant voltage output circuit is sometimes required in order to obtain a certain constant voltage, which is stabilized with respect to voltage fluctuation of a power source, using, as its reference potential, a power source potential (power source voltage level) given to a reference potential (ground potential) of the electronic circuit. Such a constant voltage output circuit must, first of all, have excellent electrical characteristics. At the same time, it must have a circuit arrangement which does not impose limitation on production techniques of semiconductor integrated circuitry since it may be formed in a semi-conductor substrate such as a silicon substrate together with other necessary electronic circuits.

A constant voltage output circuit such as shown in FIG. 1 would readily be devised as a simple circuit for obtaining a constant voltage by use of a potential at a power source terminal, which feeds a power source voltage to a reference potential of the circuit, as its reference potential, on the contrary. In this circuit the output of a series circuit consisting of a zener diode Z.sub.10 and a resistor R.sub.10 is received by an emitter follower circuit consisting of a transistor Q.sub.10 and a resistor R.sub.11 to obtain a constant voltage V.sub.out from the emitter. As the zener diode Z.sub.10 is connected on the side of the power source in this circuit, the constant voltage V.sub.out is obtained across the collector and emitter of the transistor Q.sub.10 using a power source voltage level V.sub.cc as its reference potential. The circuit of this type uses an npn transistor as an output transistor (Q.sub.10) for which a large current capacity is required. From the aspect of integrated circuit techniques, the use of the npn transistor is more advantageous than the use of a pnp transistor of a lateral construction calling for a relatively greater occupying area because it minimizes a space requirement in the semiconductor substrate. From the aspect of electric characteristics, however, this constant voltage output circuit is not free from a drawback in that it is not easy to obtain a low output impedance because the output impedance of the constant voltage output circuit relies upon the emitter resistor R.sub.11 that determines the operating current of the emitter follower circuit.

It is therefore an object of the present invention to provide a constant voltage output circuit which has a low output impedance and is suited for integration of a semiconductor circuit by use of a power source voltage level as its reference level.

The constant voltage output circuit in accordance with the present invention comprises a series circuit of a pnp transistor and an npn transistor whose emitters are connected with each other; a circuit for feeding a constant voltage between the base of the pnp transistor and a power source line; and an emitter follower output circuit including an npn transistor coupled so as to give negative feed-back to the abovementioned npn transistor. In accordance with the present invention, an npn transistor suited for integration of the circuit is used as an output transistor requiring a large current capacity. Further, the output impedance can be made remarkably small because the npn transistor of the series circuit and the npn transistor of the emitter follower circuit together form the negative feed-back circuit.

The present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

FIG. 1 is a circuit diagram of a constant voltage output circuit constructed by the inventors of the present invention by modifying prior art technique;

FIGS. 2 and 3 are circuit diagrams of the constant voltage output circuits in accordance with the present invention; and

FIG. 4 is a diagram showing current density-v-temperature coefficient curves of a zener diode and a transistor, respectively.

FIG. 2 is a circuit diagram showing an embodiment of the present invention.

This circuit is a constant voltage output circuit for obtaining a constant output voltage V.sub.out with respect to a power source voltage level V.sub.cc, as a reference level, applied to a power source terminal P.sub.6 with a ground terminal P.sub.4 being a reference potential (ground potential). In other words, the output voltage V.sub.out is obtained between the power source terminal P.sub.6 and an output terminal P.sub.5. A series circuit consisting of a zener diode Z.sub.1 and a resistor R.sub.4 is a constant voltage producing circuit.

A constant voltage output of the zener diode Z.sub.1 is applied to the base of a pnp transistor Q.sub.1 and the emitter of an npn transistor Q.sub.2 is connected to the emitter of the pnp transistor Q.sub.1 so that these transistors Q.sub.1 and Q.sub.2 together form a modified differential amplification circuit. The abovementioned constant voltage signal is level-shifted in a magnitude corresponding to the base-to-emitter voltages (V.sub.BEQ1 and V.sub.BEQ2) of these transistors Q.sub.1, Q.sub.2 thereby to provide the constant output voltage V.sub.out.

Resistors R.sub.1 and R.sub.2 are connected to the collectors of the transistors Q.sub.1 and Q.sub.2, respectively, and they are bias resistors for determining the operating current of the transistors.

An output npn transistor Q.sub.3 having its emitter connected to the base of the transistor Q.sub.2 on the output side of the deformed differential amplification circuit and having its base connected to the transistor Q.sub.2 constitutes a negative feed-back circuit. A constant current circuit I.sub.o connected to the emitter of this transistor Q.sub.3 is to set a bias current to the transistor Q.sub.3 in consideration of a load interposed between the terminals P.sub.5 and P.sub.6.

In the circuit of this embodiment, the transistors Q.sub.2 and Q.sub.3 form the negative feed-back circuit to obtain the constant output voltage V.sub.out as described above. Accordingly, it is possible to drastically reduce the output impedance in comparison with a circuit configuration which merely uses an emitter follower circuit. In other words, the output voltage becomes an extremely small value because it is a value obtained by dividing an output impedance at the time of open loop without negative feed-back by a feed-back quantity. It is therefore possible to make this value smaller than 1/1,000 of the load resistor R.sub.2, for example.

In the present invention, a series circuit consisting of the base-emitter paths of the transistors Q.sub.1, Q.sub.2 and Q.sub.3 is wired in parallel to the zener diode Z.sub.1. Accordingly, it is possible to restrict fluctuation of the emitter current flowing through the transistors Q.sub.1 and Q.sub.2 with respect to fluctuation of the power source voltage V.sub.cc. As a result, it is possible to make the fluctuation of the consumed current relatively small with respect to the power source fluctuation.

In the present invention, further, the output transistor Q.sub.3 is formed by an npn transistor. In forming a semiconductor integrated circuit, the output transistor having a large current capacity can be formed with a relatively limited space requirement in a semiconductor chip that forms the semiconductor integrated circuit.

The base-to-emitter voltages V.sub.BEQ1 and V.sub.BEQ2 of the transistors Q.sub.1 and Q.sub.2 and the zener voltage V.sub.Z1 of the zener diode Z.sub.1 fluctuate in accordance with the operating currents flowing through them, respectively. In order to obtain a constant voltage having still higher stability, it is desired to render their bias currents constant.

In accordance with the present invention, it is further possible to obtain a constant voltage output circuit having high stability that is temperature-compensated. FIG. 3 is a circuit diagram of another embodiment of the temperature-compensated constant voltage output circuit in accordance with the present invention.

In the circuit shown in FIG. 3, a constant voltage signal to be applied to the base of the pnp transistor Q.sub.1 on the input side is obtained from a level shift circuit consisting of a diode-connected pnp transistor Q.sub.7 for making temperature compensation of the transistor Q.sub.1 on the input side, a diode-connected npn transistor Q.sub.6 for making temperature compensation of the npn transistor Q.sub.2 on the output side and a diode-connected npn transistor Q.sub.5 for making temperature compensation of the zener diode Z.sub.1 that forms a constant voltage signal (zener potential; V.sub.Z1).

An npn transistor Q.sub.8 and a resistor R.sub.4 connected in series with this level shift circuit constitute a constant current circuit for forming a bias current to the level shift circuit. A resistor R.sub.7, a diode-connected pnp transistor Q.sub.9 and a resistor R.sub.6 are connected at both ends, or at the constant voltage output, of a zener diode Z.sub.2, which forms a constant voltage circuit together with a resistor R.sub.8, so as to produce a constant current, and the bases of the transistors Q.sub.9 and Q.sub.8 are mutually connected thereby to constitute a current mirror circuit and to supply the collector of the transistor Q.sub.8 with a constant bias current.

On the other hand, a diode-connected npn transistor Q.sub.10 is disposed on the collector side of the transistor Q.sub.2 which forms the modified differential amplification circuit together with the transistor Q.sub.1.

A constant current circuit consisting of a transistor Q.sub.4 and a resistor R.sub.5 is connected to the emitter of the output npn transistor Q.sub.3 forming the negative feed-back circuit, said transistor Q.sub.4 being driven by the transistor Q.sub.9 biased by the constant current.

The output voltage V.sub.out produced across the terminals P.sub.8 and P.sub.9 of this circuit can be obtained by the equation (1) below;

where V.sub.BEQ1, V.sub.BEQ2, V.sub.BEQ5, V.sub.BEQ6 and V.sub.BEQ7 are base-to-emitter voltages of the transistors Q.sub.1, Q.sub.2, Q.sub.5, Q.sub.6 and Q.sub.7, respectively, and V.sub.Z1 is a zener voltage of the zener diode Z.sub.1. p It is hereby assumed that the zener voltage V.sub.Z1 has a positive temperature coefficient or the zener diode Z.sub.1 used has a zener voltage such as 5.6 V, for example. On the other hand, since the base-to-emitter voltage V.sub.BE of the transistor has a negative temperature coefficient, temperature compensation in the circuit of this embodiment is carried out by providing the zener diode Z.sub.1 with the transistor Q.sub.5 so as to mutually offset their temperature coefficients. As can also be seen clearly from the equation (1), the fluctuation of the base-to-emitter voltage of the transistor Q.sub.6 is compensated by the transistor Q.sub.2 and that of the transistor Q.sub.7, by the transistor Q.sub.1. As a result, it is possible to make the temperature compensation of the output voltage V.sub.out.

The absolute values of the temperature coefficients of the zener diode Z and the transistors Q vary depending on the current density as shown in FIG. 4.

In this embodiment, therefore, a current value is so set in consideration of element sizes as to obtain a current density at the point of intersection of the curves Z and Q at which the absolute values of the temperature coefficients of the zener diode D.sub.1 and the transistor Q.sub.5 become equal to each other. The density of the current flowing through the transistor Q.sub.7 is made equal to the density of the current flowing through the transistor Q.sub.1 while the current density of the transistor Q.sub.6 is made equal to that of the transistor Q.sub.2.

It is of course possible to let the current densities of the transistors Q.sub.6 and Q.sub.7 relatively coincide with those of the transistors Q.sub.1 and Q.sub.2.

Assuming now that the element size of the transistor Q.sub.6 is made coincide with that of the transistor Q.sub.2 and the size of the transistor Q.sub.7, with that of the transistor Q.sub.1, so as to make their current values coincide with each other, respectively, and thus make their current densities coincide with each other. In this case, the current I.sub.1 flowing through the level shift circuit can be obtained by the equation (2) below: ##EQU1## where V.sub.Z2 is a zener voltage of the zener diode Z.sub.2 and V.sub.BEQ9 is a base-to-emitter voltage of the transistor Q.sub.9.

Since the transistors Q.sub.9 and Q.sub.8 together constitute the current mirror circuit, the current flowing through the transistor Q.sub.9 can be made equal to the current I.sub.1 flowing through the transistor Q.sub.8 by making the resistor R.sub.4 equal to the resistor R.sub.6. In other words, the current I.sub.1 of the abovementioned level shift circuit can be obtained from the equation (2).

The base currents of the transistors Q.sub.8, Q.sub.9 and Q.sub.4 in the current mirror circuit are neglected in the formula (2) because they are insignificant. If necessary, however, a transistor may be added in order to correct these base currents.

On the other hand, a current I.sub.2 flowing through the differential transistor circuit consisting of the pnp transistor Q.sub.1 and npn transistor Q.sub.2 can be obtained from the equation (3) below: ##EQU2## where V.sub.BEQ10 is a base-to-emitter voltage of the transistor Q.sub.10.

As can be seen clearly from the equation (3), the voltage level-shifted by the transistors Q.sub.5 -Q.sub.7 is compensated by the transistors Q.sub.1 -Q.sub.3 so that the voltage produced at the transistor Q.sub.10 and the resistor R.sub.2 becomes equal to the abovementioned zener voltage V.sub.Z1, thereby providing the current I.sub.2 from the equation (3).

In the abovementioned equations (2) and (3), the current I.sub.1 becomes substantially equal to the current I.sub.2 if the zener diodes Z.sub.1 and Z.sub.2 have the same characteristics so as to satisfy the equation V.sub.Z1 =V.sub.Z2 and if R.sub.6 +R.sub.7 is R.sub.2. When the current I.sub.1 is equal to the current I.sub.2, the base-to-emitter voltage V.sub.BEQ9 of the transistor Q.sub.9 is equal to the base-to-emitter voltage V.sub.BEQ10 of the transistor Q.sub.10. For this reason, the current I.sub.1 is perfectly equal to the current I.sub.2 as can be seen clearly from the equations (2) and (3).

The constant of each element determining these current values changes similarly depending on the temperature change and no relative change occurs between both current values so that it is possible to satisfy the relation ##EQU3## Accordingly, the relations -V.sub.BEQ6 +V.sub.BEQ2 =0 and -V.sub.BEQ7 +V.sub.BEQ1 =0 can be satisfied from the equation (1) over the entire temperature range to be compensated for and a stable output voltage V.sub.out can be obtained.

Especially, by forming the circuit of this embodiment in a monolithic semiconductor integrated circuit, it is easy to obtain matching of the temperature characteristics between the transistor and the zener diode and a predetermined ratio of resistance between the resistors and also to make their changes with respect to the temperature change equal to each other. Hence, it is possible to obtain an extremely stable output voltage V.sub.out.

The circuit of this embodiment makes it possible to obtain a stable output which is stable not only with respect to the temperature change but also to the fluctuation of the power source voltage V.sub.cc.

In the circuit of this embodiment, further, it is necessary to make the current flowing through the transistor Q.sub.3 equal to the abovementioned current I.sub.1. This is because the equation (3) is formulated on the premise that the base-to-emitter voltage V.sub.BEQ3 of the transistor Q.sub.3 is equal to the base-to-emitter voltage V.sub.BEQ5 or V.sub.BEQ6 of the transistor Q.sub.5 or Q.sub.6.

For the reason described above, the bias current of this transistor Q.sub.3 is formed by the transistor Q.sub.9 and the transistor Q.sub.4, the latter driving the current mirror circuit together with the resistor R.sub.5, as shown in the drawing.

As illustrated in the above-described embodiments, the constant voltage output circuit in accordance with the present invention obtains an output voltage using the differential transistors Q.sub.1 and Q.sub.2 to make a level shift. Hence, it is possible to provide a level shift circuit for temperature compensation in a circuit which is to produce a reference voltage, and also to optionally set a current to the level shift circuit and the differential circuit. Accordingly, coincidence of the current densities can be made freely in consideration of the element sizes and the temperature compensation can be made easily.

As noted in the foregoing paragraph, the present invention is especially effective as a constant voltage circuit for obtaining a constant voltage using a potential of the power source voltage applied to a reference potential of the circuit, as its reference potential, on the contrary. Hence, the present invention is effective for such a circuit as a drive control circuit of a d.c. motor, for example, where a positive power source voltage is applied with respect to the reference potential source of the circuit, and a given constant voltage using the power source voltage level as a reference level is required.

It is to be noted that various modifications and changes may be apparent to those skilled in the art without departing from the spirit and the scope of the invention.