Fuel Injection Systems

This invention relates to an electronic fuel injection control for an internal combustional engine.

An electronic fuel injection control in accordance with the invention comprises a main fuel control circuit for applying to at least one fuel injection valve pulses of duration determined by at least one engine operating parameter controlling said main fuel control circuit, an auxiliary pulse source sensitive to opening movement of the engine throttle for applying at least one additional pulse to said fuel injection valve when the throttle is opening, and muting means sensitive to closing movement of the throttle and arranged to prevent the auxiliary pulse source from producing a pulse for a predetermined time following closing movement of the throttle.

The auxiliary pulse source may be responsive to the rate of change of the position of the throttle so as to produce a pulse whenever the rate of change exceeds a predetermined positive value. In that case the muting means may be arranged to be brought into operation when the rate of change is less than a predetermined negative value.

Alternatively the auxiliary pulse source may be arranged to be actuated during throttle opening movement at specific throttle positions, muting occurring following throttle closing movement through associated specific throttle positions.

In the accompanying drawings

FIG. 1 is a schematic diagram illustrating one example of an electronic fuel injection control in accordance with the invention;

FIG. 2 is a circuit diagram of a part of the control shown in FIG. 1;

FIG. 3 is the circuit diagram of a temperature transducer circuit and a temperature "window" circuit forming part of the control of FIG. 1;

FIG. 4 is the circuit diagram of a clock pulse generator forming part of the control of FIG. 1;

FIGS. 5, 6, 7 and 8 are fragmentary circuit diagrams illustrating four possible modifications to the circuit shown in FIG. 2;

FIG. 9 is a graph illustrating the relationship between the clock pulse generator output frequency and the engine water temperature achieved in the example of the invention shown in FIGS. 1 to 4; and

FIG. 10 is a circuit diagram illustrating another example of an electronic fuel injection control in accordance with the invention.

Referring firstly to FIG. 1 the overall system comprises a main digital fuel control 10 of known type utilizing digital computation techniques to produce a digital fuel demand signal in accordance with the value or values of one or more engine operating parameters selected from air intake mass flow, engine speed, air intake manifold pressure, air intake throttle position. Such parameter or parameters is or are measured by one or more transducers 11. The digital fuel demand signal is generated by means of a read only memory matrix incorporated in the control 10 which produces a multi-bit digital output signal in accordance with the value or values of digital signals addressing the matrix and derived from the transducer or transducers. The multi-bit digital signal may be used in either of two equivalent ways. Firstly, it may be transferred to a presettable counter which is then clocked to zero or it may be applied, if need be via a latch, to one input of a digital comparator whilst the output of a counter being clocked up from zero is applied to the other input of the comparator. In either case the digital signal is transformed to a pulse duration directly proportional to the digital signal and inversely proportional to the clock frequency. FIG. 1 shows a clock pulse-generator 12 which provides the clock pulses and a fuel injector control 13 which receives the pulse duration modulated signals from the main fuel control 10.

The control 13 has two output terminals to which the pulse modulated signals from the control 10 are alternately steered, each output stage of the control 13 including an open collector power transistor (not shown). These output stages are connected to two groups of solenoids 16 forming part of a bank of fuel injection valves.

FIG. 1 illustrates a number of arrangements by means of which the clock pulse frequency is varied, both as a function of engine water temperature and as a function of the rate of movement of an accelerator pedal 17. The pedal 17 is linked to the slider of a potentiometer 18, which slider is connected by a buffer input stage 19 to an operational amplifier differentiating circuit 20, via a capacitor C.sub.2 (which forms a part of the differentiating circuit). The circuit has clamping feedback circuits 21 and 22 which operate respectively in acceleration and deceleration. A water temperature "window" circuit 23 which controls a sensitivity switch 24 through the intermediary of which the output of the differentiating circuit 20 is applied to the clock 12 and also controls a time law circuit 29 at the input to the differentiating circuit 20. The "window" circuit 23 receives an input from a temperature transducer circuit 25, which also provides an input to the clock 12.

FIG. 1 also shows an "extra pulse" circuit 26 which is triggered by the acceleration clamping circuit 21, but which is muted for a predetermined time after a deceleration has been demanded by an input from the deceleration clamping circuit 22. The circuit 26 has an open collector output stage connected by parallel diodes 27, 28 to the solenoids 16 as will be explained in more detail hereinafter.

Turning now to FIG. 2 the potentiometer 18 is connected in series with a diode D.sub.1 between a regulated voltage supply rail 30 and an earth rail 31. The slider of the potentiometer 18 is connected via a resistor R.sub.1 and a capacitor C.sub.1 in series to the rail 31. The common point of the resistor R.sub.1 and capacitor C.sub.1 at which there appears a filtered d.c. signal corresponding to the position of the slider of the potentiometer 18 is connected both to a terminal E (see also FIG. 4) and to the base of a pnp transistor Q.sub.1 connected as an emitter follower buffer with its collector grounded to rail 31 and its emitter connected by a resistor R.sub.2 to the rail 30.

The emitter of the transistor is connected by a time-law switch circuit to one side of a capacitor C.sub.2 which forms the input of the differentiating circuit 20. The time law switching circuit comprises two resistors R.sub.3, R.sub.4 is series between the emitter of the transistor Q.sub.1 and the capacitor C.sub.2 with the resistor R.sub.3 of larger ohmic value bridged by the collector-emitter of an npn transistor Q.sub.2 which has its base connected by a resistor R.sub.5 to a terminal D, (see also FIG. 3). A diode D.sub.2 has its anode connected to the common point of the resistor R.sub.4 and the capacitor C.sub.2 and its cathode connected to the emitter of the transistor Q.sub.1.

The other side of the capacitor C.sub.2 is connected by a resistor R.sub.6 to the inverting input terminal of an operational amplifier A.sub.1, the non-inverting input terminal of which is connected to the common point of two resistors R.sub.7, R.sub.8 connected in series between the rails 30, 31. Feedback around the amplifier A.sub.1 is provided by the parallel combination of a resistor R.sub.9 and a capacitor C.sub.3. The main differentiating action of the amplifier is provided the capacitor C.sub.2 and the resistor R.sub.9 which dominate the transfer function of the amplifier for low frequency signals. The resistors R.sub.6 and capacitor C.sub.3 provide an integral action at high frequency to overcome the differential action so that the transfer function at high frequencies is integral rather than differential. This eliminates or at least substantially reduces the effect of high frequency noise and interference on the differentiating circuit.

The acceleration and deceleration clamping circuits share a common biasing chain R.sub.10, R.sub.11 and R.sub.12 connected in series between the rails 30, 31. The common point of the resistors R.sub.11 and R.sub.12 is connected to the cathode of a diode D.sub.3 with its anode connected to the base of an npn transistor Q.sub.3 which has its collector connected to said other side of the capacitor C.sub.2 and its emitter connected by a resistor R.sub.13 to the emitter of pnp transistor Q.sub.4 having its collector connected to the rail 31 by a resistor R.sub.14. The base of the transistor Q.sub.4 is connected by a resistor R.sub.15 to the rail 31 and is also connected to the cathode of a diode D.sub.4 which has its anode connected to the output terminal of the amplifier A.sub.1.

The common point of the resistors R.sub.10 and R.sub.11 is connected by two diodes D.sub.5, D.sub.6 in series to the base of a pnp transistor Q.sub.5, the collector of which is connected to said other side of the capacitor C.sub.2. The emitter of the transistor Q.sub.5 is connected by a resistor R.sub.16 to the emitter of an npn transistor Q.sub.6 the collector of which is connected by a resistor R.sub.17 to the rail 30. The base of the transistor Q.sub.6 is connected directly to the output terminal of the amplifier A.sub.1.

The bases of the transistors Q.sub.3, Q.sub.5 are interconnected by a resistor R.sub.18.

In steady state conditions the output terminal of the amplifier A.sub.1 will be at at voltage set by the resistors R.sub.7 and R.sub.8. This will set the voltage at the base of the transistor Q.sub.4 higher than the voltage at the base of the transistor Q.sub.3 so that neither of these will conduct and similarly the transistors Q.sub.5, Q.sub.6 will be off.

During acceleration the output of the amplifier A.sub.1 falls to a level determined by the rate of increase of the voltage at the slider of the potentiometer 18. Should this output voltage fall to a level lower than that at the junction fo the resistors R.sub.11 and R.sub.12, the transistors Q.sub.3 and Q.sub.4 will both turn on, diverting sufficient current from the capacitor C.sub.2 to hold the amplifier output constant. When the increase in input voltage ceases capacitor C.sub.2 can charge through the resistor R.sub.4 and the transistor Q.sub.2 (assuming this to be conductive) and the amplifier output returns to its previous voltage at a rate determined by such charging. If the transistor Q.sub.2 is not conductive, the inclusion of the resistor R.sub.3 is the charge path of the capacitor C.sub.2 so as to delay the release of clamping and also increase the duration of charging.

In deceleration, the output of the amplifier A.sub.1 increases and eventually turns on transistors Q.sub.5 and Q.sub.6 to provide the clamping action, when the voltage at the base of transistor Q.sub.1 ceases to fall the capacitor C.sub.2 discharges rapidly via the diode D.sub.2 irrespectively of whether the transistor Q.sub.2 is conductive or not.

The diodes D.sub.3 and D.sub.4 are included to compensate for the base-emitter voltages of the transistors Q.sub.3 and Q.sub.4 so that no temperature drift effects occur. Similarly the base-emitter voltages of the transistors Q.sub.5 and Q.sub.6 are compensated for by the diodes D.sub.5 and D.sub.6.

The output terminal of the amplifier A.sub.1 is connected to the rail 30 by two resistors R.sub.19, R.sub.20 in series and to an output terminal A by a resistor R.sub.21, pnp transistor Q.sub.7 has its emitter connected to the common point of the resistors R.sub.19 and R.sub.20, its collector connected to the terminal A and its base connected by a resistor R.sub.23 to the terminal D. The transistor Q.sub.7 constitutes the sensitivity switch 24 of FIG. 1. As will be explained hereinafter the terminal A is held at a fixed voltage such that the amplifier A.sub.1 draws current from terminal A via the resistor R.sub.21. When transistor Q.sub.7 is on the resistors R.sub.19, R.sub.20 are arranged to draw no current from terminal A when the signal output is steady, but the overall gain of the circuit is increased--i.e. the current drawn by the amplifier A.sub.1 from the terminal A increases for a given rate of increase of the input signal from the accelerator pedal potentiometer 18.

FIG. 2 also shows the extra pulse circuit 26. This is constituted by a transistor Q.sub.8 with its emitter grounded to the rail 31 and its collector connected by two resistors R.sub.24, R.sub.25 in series to the rail 30. The junction of the resistor R.sub.24, R.sub.25 is connected by two resistors R.sub.26, R.sub.27 in series to the rail 31 and by a resistor R.sub.28 to the inverting input terminal of a voltage comparator A.sub.2, a diode D.sub.7 bridging the resistor R.sub.28 and a capacitor C.sub.4 connecting the collector of the transistor Q.sub.8 to the inverting input terminal of the comparator A.sub.2. The non-inverting input terminal of the comparator A.sub.2 is connected by a resistor R.sub.29 to the junction of the resistors R.sub.26, R.sub.27. The non-inverting input terminal is also connected by a resistor R.sub.30 to a terminal C' (see FIG. 3). The output terminal of the comparator A.sub.2 is connected by a resistor R.sub.31 to the rail 30 and by two resistors R.sub.32, R.sub.33 in series to the rail 31. The common point of the resistors R.sub.32, R.sub.33 is connected to the base of a transistor Q.sub.9, the emitter of which is grounded to the rail 31 and the collector of which is connected to the cathodes of the diodes 27, 28.

When the transistor Q.sub.4 turns on as the acceleration clamping level is reached current flows in resistor R.sub.14 flows until at some point the transistor Q.sub.8 turns on. This reduces the voltage at the junction of the resistor R.sub.24 and the capacitor C.sub.4. Initially, however, capacitor C.sub.4 draws current through the resistor R.sub.28 and thus causes the output of the comparator A.sub.2 to go high until the capacitor C.sub.4 is charged to a given level. The transistor Q.sub.9 conducts for the duration of this pulse, causing an additional injection action from all the injectors simultaneously. When the transistors Q.sub.4 and Q.sub.8 turn off again the diode D.sub.7 allows rapid discharge of the capacitor C.sub.4, and limits the voltage excursion of the inverting input terminal of the comparator A.sub.2.

For muting the extra pulse circuit just described an npn transistor Q.sub.10 has its emitter connected to the rail 31 and its collector connected to the non-inverting input terminal of the comparator A.sub.2. The base of the transistor Q.sub.10 is connected to the common point of two resistors R.sub.34 and R.sub.35 connected in series between the rail 31 and the collector of a pnp transistor Q.sub.11. The base of Q.sub.11 is connected to the collector of the transistor Q.sub.6 and its emitter is connected to the rail 30. A capacitor C.sub.5 is connected between the base and collector of the transistor Q.sub.11.

When the transistor Q.sub.6 turns on as the deceleration clamping level is reached, the transistor Q.sub.11 turns on at a predetermined higher level set by the resistor R.sub.17 thereby turning on transistor Q.sub.10 and grounding the non-inverting input terminal of the comparator A.sub.2. The transistor Q.sub.11 does not turn off immediately the transistor Q.sub.6 turns off because the capacitor C.sub.5 continues to supply base current to the transistor Q.sub.11 for a predetermined period, thereby preventing operation of the extra pulse circuit for a predetermined time after a "clamping level" deceleration has taken place. This muting arrangement comes into play when rapid pedal movements are executed such as during gear changing or during repeated acceleration of an unloaded engine prior to pulling away from rest.

The temperature dependent circuit of FIG. 3 includes a thermistor R.sub.40 sensitive to the engine cooling water temperature. The thermistor R.sub.40 is connected between the base of a pnp transistor Q.sub.12 and the rail 31 in parallel with a resistor R.sub.41, a resistor R.sub.42 being connected between such base and the rail 30. The collector of the transistor Q.sub.12 is connected to the rail 31 and its emitter is connected by a resistor R.sub.43 to the rail 30 and is also connected to a terminal C and to the anode of a diode D.sub.8 with its cathode connected by a resistor R.sub.85 to the rail 31 and also connected to the terminal C'. The cathode of the diode D.sub.8 is also connected via a resistor R.sub.44 to the inverting input terminal of a voltage comparator A.sub.3, a further resistor R.sub.45 connecting this input terminal to the inverting input terminal of a further voltage comparator A.sub.4. The non-inverting input terminals of the comparators A.sub.3 and A.sub.4 are connected to the common points of three resistors R.sub.46, R.sub.47 and R.sub.48 connected in series between the rails 30 and 31 so that the non-inverting input terminal of the comparator A.sub.3 is at a higher voltage than that of comparator A.sub.4. Positive feedback resistors R.sub.49, R.sub.50 connect the output terminals of the two comparators A.sub.3, A.sub.4 to their non-inverting input terminals so as to provide a small amount of hysteresis to prevent spurious triggering of the comparator. The output terminal of the comparator A.sub.3 is connected to the inverting input terminal of the comparator A.sub.4 and a load resistor R.sub.51 is connected between the rail 30 and the output terminal of the comparator A.sub.4 which is connected to the terminal D.

The voltage at the terminal C falls substantially linearly over the normal working range of the system. At low temperatures (e.g. below 15.degree. C.) the output of the comparator A.sub.3 is low and that of the comparator A.sub.4 is therefore high. As the temperature rises and the voltage at terminal C falls, the comparator A.sub.3 switches so that the output of the comparator A.sub.4 goes low. As the temperature continues to rise the comparator A.sub.4 switches (at about 60.degree. C.) and its output goes high again.

Turning now to FIG. 4, the clock pulse generator includes a pnp transistor Q.sub.13 with its base at a fixed voltage (of about 3.3 V) and its collector connected by a capacitor C.sub.6 to the rail 31. The emitter of the transistor Q.sub.13 is connected by a resistor R.sub.52 to the rail 30 and is also connected to the terminal A. The terminal C of FIG. 3 is also arranged to provide an input to the clock circuit to vary the proportion of the current in resistor R.sub.52 which enters the emitter of the transistor Q.sub.13. The terminal C is connected to the base of two npn transistors Q.sub.17 and Q.sub.18 which have their collectors connected to the emitter of the transistor Q.sub.13. The emitter of the transistor Q.sub.17 is connected to the common point of two resistors R.sub.86 and R.sub.87 connected in series between the rails 30, 31. Similarly the emitter of the transistor Q.sub.15 is connected to the common point of two resistors R.sub.88, R.sub.89 connected in series between the rails 30, 31. The resistors R.sub.86 to R.sub.89 are chosen so that the transistor's Q.sub.17, Q.sub.18 switch off at different voltage levels of terminal C. Thus the current drawn by the transistors Q.sub.17, Q.sub.18 will decrease with increasing temperature, initially at a relatively steep slope until the transistor Q.sub.17 turns off and then at a shallow slope until transistor Q.sub.18 turns off. At higher temperatures the current drawn through the resistor R.sub.52 is not temperature dependent. The collector of the transistor Q.sub.13 is connected to the non-inverting input terminal of a comparator A.sub.5 which has a load resistor R.sub.54 connected between its output terminal and the rail 30. The inverting input terminal of the comparator A.sub.5 is connected by a resistor to the common point of two resistors R.sub.55, R.sub.56 connected in series between the rails 30 and 31. The output terminal of the comparator A.sub.5 is connected to the base of an npn transistor Q.sub.14 the emitter of which is connected by a resistor R.sub.58 to the rail 31 and the collector of which is connected to the inverting input terminal of the comparator A.sub.5. A second non transistor Q.sub.15 has its base connected to the emitter of the transistor Q.sub.14, its emitter grounded to the rail 31 and its collector connected to the non-inverting input terminal of the comparator A.sub.5. Because of the fixed voltage bias on the base of the transistor Q.sub.13 its emitter is held at a fixed voltage (about 4 V) and the current passing through the resistor R.sub.52 is constant. A very small amount of this current passes through the base-emitter junction of the transistor Q.sub.13 and variable amounts are sunk via the terminal A and via the transistors Q.sub.17 and Q.sub.18 depending on the conditions in the FIG. 1 circuit and the temperature respectively. The remaining current passes into the capacitor C.sub.6 charging it linearly whenever the transistor Q.sub.15 is off. This occurs whenever the output of the comparator A.sub.5 is low so that the voltage at the non-inverting input terminal of the comparator rises linearly until it exceeds the voltage set at the inverting input terminal. The output of the comparator A.sub.5 now goes high turning on both transistors Q.sub.14 and Q.sub.15. The transistors Q.sub.14 causes the voltage at the inverting input terminal to be reduced by drawing current through the resistors R.sub.55 and R.sub.57 , thereby increasing the speed of switching and the transistor Q.sub.15 discharges the capacitor C.sub.6, rapidly. The comparator A.sub.5 then switches back to its original state and the cycle re-starts. For a fixed voltage at the junction of the resistors R.sub.55, R.sub.56 the frequency of the clock is proportional to the capacitor C.sub.6 charging current.

The voltage at the junction of resistors R.sub.55 and R.sub.56 is not, however constant because of the effect of the components shown at the left hand side of FIG. 4. These components include a voltage comparator A.sub.6 which has its non-inverting input terminal connected by a resistor R.sub.60 to the terminal E (of FIG. 2) and its inverting input terminal connected to the common point of two resistors R.sub.61, R.sub.62 connected in series between the rail 31 and the cathode of a diode D.sub.9 the anode of which is connected to the rail 30. The comparator A.sub.6 has positive feedback from its output terminal to its non-inverting input terminal via a resistor R.sub.63 and a further resistor R.sub.64 connects the non-inverting input terminal to the rail 31. A resistor R.sub.65 connects the output terminal of the comparator A.sub.6 to the rail 30 and a resistor R.sub.66 connects this output terminal to the junction of the resistors R.sub.55 and R.sub.56.

The comparator A.sub.6 is set so that its output is normally low but goes high when the accelerator pedal is nearly fully depressed. This causes an increase in the voltage at the junction of the resistors R.sub.55 and R.sub.56 and therefore decreases the clock frequency and increases the quantity of fuel injected for a given fuel demand signal.

In addition two resistors R.sub.67 and R.sub.68 are connected in series between the rail 30 and the junction of the resistors R.sub.55 and R.sub.56. These normally increase the voltage at the junction of R.sub.55 and R.sub.56 slightly, but a terminal F at the junction of the resistors R.sub.67 and R.sub.68 is provided and can be grounded whenever it is intended that the vehicle in which the fuel injection control is installed is to be used predominatly at high attitudes. This increases the clock frequency and reduces the fuel injected.

Turning now to FIG. 9, the graph shows the overall effect of temperature on the clock frequency. The line A is the steady state frequency curve and the lines B and C show the limits of frequency variation resulting from clamping of the differentiating circuit in acceleration and deceleration respectively.

Below 15.degree. C. and above 60.degree. C. the transistor Q.sub.7 is off because the output of the comparator A.sub.4 which controls it is high. Relatively narrow limits of acceleration enrichment and deceleration enleanment are then permitted. In between 15.degree. C. and 60.degree. C. the output of the comparator A.sub.4 goes low turning on the transistor Q.sub.7 and the overall gain of the differentiator (considered as a current sink) increases.

In the modification shown in FIG. 5 gain variation with temperature is obtained by switching in and out an additional resistor R.sub.70 in parallel with the resistor R.sub.9. This is effected by means of an npn transistor Q.sub.16 with its collector connected by the resistor R.sub.70 to the inverting input terminal of the amplifier A.sub.1 and its emitter connected to the output terminal of the amplifier A.sub.1. A bias resistor R.sub.71 is connected between the base and emitter of the transistor Q.sub.16 to bias it off and a diode D.sub.10 and a resistor R.sub.69 in series connect the base of the transistor to the terminal D to turn the transistor Q.sub.16 on at extreme temperatures and thereby reduce the gain of the differentiating circuit.

The modification shown in FIG. 6 affects the time law switch based on transistor Q.sub.2. Instead of varying a resistance in series with the capacitor C.sub.2, the transistor Q.sub.2 now introduces a capacitor C.sub.7 and resistor R.sub.72 in series with one another across the capacitor C.sub.2. This not only changes the time constants in the manner required but also varies the gain of the differentiator so that the transistor Q.sub.7 of FIG. 2 can be omitted completely. The diode D.sub.2 must also be emitted so that time law variations apply to acceleration and deceleration clamping.

The modification shown in FIG. 7 includes a quite different form of arrangement for varying the effect of the differentiation on the clock frequency with temperature. In this case the output of the amplifier A.sub.1 is connected by a resistor R.sub.73 to the common point of a pair of resistors R.sub.74 and R.sub.75 connected in series between the rails 30 and 31. The emitter of a transistor Q.sub.17 is connected to this same common point, the collector of this transistor being connected to the terminal A and its base being connected by a resistor R.sub.76 to the terminal C. This modification can be used in conjunction with the modifications shown in FIGS. 5 and 6 which give gain variation by alteration of feedback or by alteration of the input capacitance of the differentiating circuit.

Turning finally to FIG. 8 a different arrangement is shown for determining the clamping threshold levels. In this case separate potential dividers are used for biasing the acceleration and deceleration clamp circuits. The resistors R.sub.80 and R.sub.81 connected in series between the rails 30 and 31 have their common point connected to the cathode of the diode D.sub.3. Two further resistors R.sub.82 and R.sub.83 connected in series between the rails 30, 31 have their common point connected to the anode of the diode D.sub.5. The terminal D is connected to the cathode of a diode D.sub.12 with its anode connected to the common point of the resistors R.sub.80 and R.sub.81 so that only the acceleration clamping threshold is altered when the signal at D goes low.

Turning now to FIG. 10 the invention is applied to a system which does not use the acceleration enrichment/deceleration enleanment of the example shown in FIGS. 1 to 4. Instead, an "extra pulse" circuit and corresponding muting circuit are used with an otherwise conventional system.

The main fuel control 110 controls the pulse lengths applied to injectors 116 (via diodes 114, 115) in accordance with signals from one or more engine parameter transducers 111. Diodes 117, 118 connect the solenoids to the "extra pulse" circuit.

This circuit includes an array of voltage comparators A.sub.100, A.sub.101 and A.sub.102 which have their non-inverting input terminals connected by resistors R.sub.100, R.sub.101 and R.sub.102 to different voltage points on a potential divider chain consisting of resistors R.sub.103, R.sub.104, R.sub.105 and R.sub.106 connected in series between a positive supply rail 130 and a ground rail 131. The inverting input terminals of the comparators A.sub.100, A.sub.101, and A.sub.102 are connected by resistors R.sub.107, R.sub.108, and R.sub.109 to one side of a capacitor C.sub.100 the other side of which is grounded. Said one side of the capacitor C.sub.100 is connected by a resistor R.sub.110 to a potentiometer 120 operated by the accelerator pedal for the engine. Each comparator has positive feedback resistor R.sub.111, R.sub.112, R.sub.113 to provide some hysteresis. Such hysteresis, used in combination with the filtering provided by the resistor R.sub.110 and the capacitor C.sub.100, prevents spurious triggering of the comparators A.sub.100, A.sub.101 and A.sub.102 by noise and interference.

The output terminals of the comparators A.sub.100, A.sub.101 and A.sub.102 are connected by resistors R.sub.114, R.sub.115, R.sub.116 to a common point X which is connected by a resistor R.sub.117 to the rail 130 (the comparators being of the open collector type). A capacitor C.sub.101 couples to the point X to the base of an npn transistor Q.sub.101 which base is also connected by a resistor R.sub.118 to the rail 131.

A pnp transistor Q.sub.102 is connected to act as a current source to provide current for charging the capacitor C.sub.101. The emitter of the transistor Q.sub.102 is connected by a resistor R.sub.119 to the rail 130 and its base is connected to the common point of two resistors R.sub.120, R.sub.121 connected in series between the rails 130, 131, a thermistor R.sub.122 (sensitive to engine water temperature) being connected in parallel with the resistor R.sub.121. The collector of the transistor Q.sub.102 is connected to the base of the transistor Q.sub.101.

The collector of the transistor Q.sub.101 is connected to the base of an npn output transistor Q.sub.103 and also, by a resistor R.sub.123 to the rail 130, both transistors Q.sub.101 and Q.sub.103 have their emitters connected to the rail 131 and the collector of the transistor Q.sub.103 is connected to the cathodes of the diodes 117, 118.

In use the comparators A.sub.100, A.sub.101 and A.sub.102 are switched sequentially as the slider of the potentiometer 120 is moved away from the grounded end of the potentiometer. Switching occur at three specific positions of the slider and each switching operation reduces the voltage at the point X. Transistor Q.sub.101 is normally held on by the current from transistor Q.sub.102 passing through the resistor R.sub.118 and the base-emitter of the transistor Q.sub.101. When the voltage at the point X falls, however the current from the transistor Q.sub.102 is diverted to charge the capacitor C.sub.101 and the transistor Q.sub.101 turns off for time dependent on the charge in voltage at the point X and the current from transistor Q.sub.102 (which varies with engine temperature). Transistor Q.sub.103 is turned on for this same duration and causes extra pulses to be applied to the injector 116 in addition to the normal pulse duration modulated pulses from the main control circuit 10.

For muting the extra pulses immediately after deceleration, an npn transistor Q.sub.104 is provided with its emitter connected to the rail 131 and its collector connected to the base of the transistor Q.sub.101. The base of the transistor Q.sub.104 is connected by a resistor R.sub.124 to the cathode of a diode D.sub.101 which is also connected by a capacitor C.sub.102 to the rail 131. The anode of the diode D.sub.101 is connected to the cathode of a diode D.sub.102 with its anode connected to the rail 131. The anode of the diode D.sub.101 is also connected by a capacitor C.sub.103 and a resistor R.sub.125 in series to the point X. The capacitors C.sub.102, C.sub.103 and the diodes D.sub.101 D.sub.102 constitute a diode pump circuit.

During deceleration the voltage at the point X goes up at three positions of the slider of the potentiometer 120. After each such increase in voltage at the point X the transistor Q.sub.104 is turned on for a period determined by the voltage which is transferred to the capacitor C.sub.102 through the diode D.sub.101 and by the base current of the transistor Q.sub.104. While transistor Q.sub.104 is on transistor Q.sub.103 cannot turn on.

It will be appreciated that rapid movement of the slider of potentiometer 120 will result in the comparators switching at very short intervals. During acceleration the effect is to produce a single extended pulse of duration approximately equal to the sum of the durations of the three pulses produced by slow movement of the slider. Similarly, rapid movement of the slider in deceleration causes the muting signal from transistor Q.sub.104 to be extended.