Threshold Device for Distinguishing the White Level From the Black Level in an Input Signal Delivered by a Reading Head for Analyzing a Document

This invention relates to threshold devices for distinguishing the white level from the black level by means of signals delivered by a reading head for analyzing a document.

In order to make this distinction when analyzing a document with a reading head, a known practice consists in making use of threshold devices of the type comprising an amplifier for the signals delivered by the reading head, said amplifier being connected directly to a first input of a comparator and to a second input of said comparator through integrating means. These integrating means deliver a threshold voltage resulting from integration of the output signals of the amplifier. However, this threshold voltage is inaccurate by reason of the fact that the white level varies in particular with the level of illumination and the ground color of the document.

The aim of the present invention is to overcome this disadvantage. According to the invention there is provided a threshold device for distinguishing the white level from the black level in a first signal delivered by the output of a reading head for analyzing a document, and comprising amplification means having one input coupled to the output of the reading head and one output for delivering a second signal, a comparator having a first input coupled to the output of the amplification means, a second input and an output for delivering a signal having a first level when the level of the first signal is a white level and a second level when the level of the first signal is a black level, storage means having one input coupled to the output of the amplification means for storing the value of the level of the second signal, a control input coupled to the output of the comparator for controlling the storage operation under the action of the first level and an output coupled to the second input of the comparator in order to deliver a signal which is representative of a fraction of the value of the level of the second stored signal.

Further advantages will become apparent from the following description which will serve to gain a more complete understanding of the invention, reference being made to the accompanying FIGURE which illustrates a threshold device according to the invention.

In this FIGURE, the output signals of a reading head 1 controlled by a clock signal H.sub.1 are applied to the input of an amplifier 2, the output of which is connected to the positive input of a comparator 3 through a capacitor C.sub.1 and a resistor R.sub.1 connected in series. The positive input of the comparator 3 is also connected to the collector of an n-p-n transistor T.sub.1, the emmitter of which is connected to ground and the base of which is connected to an input terminal 11 to which a clock signal H.sub.2 is applied through a capacitor C.sub.2. A positive voltage V.sub.1 is applied to the collector and the base of said transistor T.sub.1 respectively through resistors R.sub.2 and R.sub.3. The positive input of the comparator 3 is also connected to the base of an n-p-n transistor T.sub.2, the collector of which is connected to the supply voltage V.sub.1 through a resistor R.sub.5 and the emitter of which is connected to ground through the channel N of a field-effect transistor T.sub.4 and a capacitor C.sub.3 connected in series whilst the drain of transistor T.sub.4 is connected to the emitter of the transistor T.sub.2. The gate of transistor T.sub.4 is fed from the output of an AND-gate 5, a first input of which receives a clock signal H.sub.4 and a second input of which receives the output signal of an asynchronous flip-flop 4 controlled by a clock signal H.sub.3. The output signal of the comparator 3 is applied to the input of said flip-flop and the output 10 of said comparator constitutes the output of the device. The voltage developed across the terminals of the capacitor C.sub.3 applies a bias to the base of an n-p-n transistor T.sub.3, the collector of which is connected to the voltage V.sub.1 through a resistor R.sub.4 and the emitter of which is connected on the one hand to ground through series-connected resistors R.sub.6 and R.sub.7 and on the other hand to a positive voltage V.sub.2 through a diode D.sub.1 which is forward-biased for the voltage V.sub.2. The common node between resistors R.sub.6 and R.sub.7 is also connected to the negative input of the comparator 3.

The clock signal H.sub.1 is a signal whose state "1" has a predetermined duration in order to permit reading of one point of a line.

The clock signal H.sub.2 is complementary to the clock signal H.sub.1 or, in other words, H.sub.2 =H.sub.1.

The clock signal H.sub.3 is in synchronism with the clock signal H.sub.1 but the leading edges of its pulses have a predetermined time-lag with respect to those of the clock signal H.sub.1 and the pulse-width of said clock signal H.sub.3 is much smaller than the pulse-width of the clock signal H.sub.1.

The clock signal H.sub.4 is in synchronism with the clock signal H.sub.3 but the leading edges of its pulses have a predetermined time-lag; the pulse-width of said clock signal H.sub.4 is of the same order of magnitude as the pulse-width of the clock signal H.sub.3. In addition, said clock signal H.sub.4 is in state "1" during the last fraction of state "1" of the clock signal H.sub.1.

The operation of this device consists in generating a threshold voltage representing a fraction of the voltage corresponding to the level of the white point previously read; the value of this voltage which is stored in a capacitor is modified at each white point reading and is applied to one input of a comparator; the signals corresponding to the read points are applied to the other input of said comparator.

The reading head 1 converts the light received into electrical signals at the time of reading of each point of a line of a document. The operation of said head is sampled by the clock signal H.sub.1, the logical state "1" of which permits reading of one point of a line. The amplitude of the electrical signal delivered by said reading head 1 is of maximum value in respect of a white point and of minimum value in respect of a black point. The amplifier 2 transmits these electrical signals to the positive input of the comparator 3 through the capacitor C.sub.1 and the resistor R.sub.1 which are connected in series, are associated with the input impedance of the comparator and thus constitute a low time constant which does not produce any appreciable deformation of said signals.

When the clock signal H.sub.2 is in state "1" (clock signal H.sub.1 in state "0"), a positive voltage is applied to the base of the transistor T.sub.1 and drives this latter into saturation.

The voltage applied to the positive input of the comparator 3 is then equal to the value of the collector-emitter voltage (or V.sub.CE) of the saturated transistor T.sub.1.

When the clock signal H.sub.2 is in state "0" (clock signal H.sub.1 in state "1"), the transistor T.sub.1 is turned-off and the voltage at the positive input of the comparator 3 is in that case the output voltage of the reading head 1 corresponding to one point of a read line transmitted through the amplifier 2, the capacitor C.sub.1 and the resistor R.sub.1. At the positive input of said comparator 3, the signals are in fact aligned with the potential V.sub.CE of the saturated transistor T.sub.1.

The voltage which is present at the positive input of the comparator 3 during state "0" of the clock signal H.sub.2 charges the capacitor C.sub.3 through the transistor T.sub.2 which has a common-collector connection and the transistor T.sub.4 operates as a switch controlled by the output signal of the AND-gate 5. This electronic switch is closed when the output signal of the AND-gate 5 is in state "1". The advantage of the transistor T.sub.2 lies in the fact that it permits rapid charging of the capacitor C.sub.3, taking into account the low output resistance of said transistor T.sub.2.

If the first point of a line read by the reading head 1 is a white point, the output signal at the terminal 10 of the comparator 3 changes to the logical state "1" since the voltage applied to the negative input of this latter is either a fraction of the voltage V.sub.2 (this fraction being obtained by the potentiometric divider constituted by the resistors R.sub.6 and R.sub.7), or a fraction of the stored voltage at the terminals of the capacitor C.sub.3 (therefore a fraction of the voltage corresponding to a white level).

In the contrary case, the output signal at the terminal 10 of the comparator 3 changes to state "0".

The logical output states of said comparator 3 are stored within the asynchronous flip-flop 4 controlled by the leading edges of the pulses of the clock signal H.sub.3. The output state of said flip-flop 4 is applied to the AND-gate 5 which is activated by the clock signal H.sub.4.

When the point of a line read by the reading head 1 is white, the AND-gate 5 delivers a logical state "1" which closes the electronic switch constituted by the transistor T.sub.4 and serves to charge the capacitor C.sub.3.

When the point is black, the output signal of the memory circuit 4 is in state "0" and the capacitor is not charged by the voltage corresponding to the black point but stores in memory the voltage corresponding to the previous white point.

The advantage of the voltage V.sub.2 associated with the diode D.sub.1 lies in the fact that a threshold voltage is delivered when a first line of a document begins with black points.

It should be noted that the threshold voltage applied to the negative input of the comparator 3 is a predetermined fraction of the voltage corresponding to the level of the white point which had previously been read (by reason of the fact that the comparator 3 changes state before the voltage corresponding to the point which has been read is recorded) or of the last white point read in the case of a succession of black points. In practice, this threshold voltage is therefore adapted to each point which has been read.

Moreover, correct operation involves the following relations:

resistance R.sub.1 of much higher value than the collector-emitter resistance of the saturated transistor T.sub.1,

resistance R.sub.1 of much lower value than the resistance R.sub.2 in order to ensure that practically the entire level is applied to the positive input of the comparator 3.

The invention is not limited to the embodiment hereinabove described and illustrated. In particular, the transistors T.sub.1 to T.sub.4 can be p-n-p bipolar transistors or field-effect transistors. Devices of this type can be employed especially in telecopying emitters.