Television Signal Horizontal Interval Timing Reconstruction System

This invention relates to a television camera system and more particularly to a system including means for reducing the number of transmission channels required in communicating video information and timing information from the camera to a remotely located camera control unit.

In a conventional television system camera, the camera head communicates with a remote camera control unit by means of a suitable transmission cable. In the past, transmission cables have been used which have separate conductors for each of the signals which must be communicated between the camera head and the camera control unit. In view of the very large number of these signals, the multiconductor cables were both bulky and expensive.

Current efforts have been directed toward combining as many of the signals as possible so that the composite signal resulting from this combination of signals could then be communicated over a transmission cable having a smaller number of conductors. Preferably, a single composite signal will be generated so that only a single length of coaxial or triaxial cable will be required. Frequency division multiplexing has been used effectively in this regard, but requires the allocation of a separate frequency channel for each signal which must be independently transmitted. Since the attenuation characteristics of coaxial and triaxial cables increases with the frequency of the signal being transmitted thereon, it is desirable to reduce the bandwidth requirement of the signal by reducing the number of frequency channels required. It is therefore desirable to provide a means of combining signals which not only does not require a separate conductor for each of the signals, but also would not require the allocation of a separate frequency channel in a frequency division multiplexing scheme.

Normally, a camera head provides a video signal which is made up of regularly occurring horizontal blanking intervals of fixed duration separated by video information intervals. Each blanking interval is divided into two slots with the first typically containing a white pulse of fixed duration such as 1.5 microseconds. This white pulse will have a signal level which indicates the maximum excursion of the video signal during the video information interval. This white pulse is followed by a black level signal for the duration of the horizontal blanking interval, wherein the balck level indicates the minimum signal which will occur during the video information interval. In addition to the black and white level information, the camera additionally provides a separate camera timing signal which occurs in synchronism with the horizontal blanking interval of the video signal. These camera timing pulses must be communicated to the camera control unit for purposes of synchronizing the operation of each camera head with the standard timing of the control unit involved therewith.

It is therefore a primary object of the present invention to conserve the transmission channel requirements in a television camera system by combining a camera video signal with a modified camera timing signal to form a composite signal which may be communicated over a single channel, with provisions being made at the camera control unit for reconstructing the original signals.

It is a further object of the present invention to provide such a system as discussed above where the composite signal includes video information as well as information representative of maximum white and black levels, together with timing information representative of the beginning and ending of the camera timing pulses.

It is still a further object of the present invention to provide a system for accurately recovering both the camera timing signal and the video signal from the composite signal.

The present invention contemplates the provision of a television camera system wherein a camera employs means for providing a video signal as well as a camera timing signal and in which the video signal includes regularly occurring horizontal blanking intervals of fixed duration separated by video information intervals. It is contemplated that each blanking interval is divided into two successive time slots wherein the signal levels in these time slots represent the maximum and minimum magnitudes of the video information signal. Moreover, it is contemplated that the camera timing signal includes regularly occurring timing pulses each of the same duration as, and synchronized with, a corresponding horizontal blanking interval.

In accordance with the present invention, circuitry is made responsive to each camera timing pulse for purposes of providing a modified horizontal timing pulse having its leading edge delayed by a fixed amount from that of the camera timing pulse and its trailing edge corresponding with that of the camera timing pulse. This camera timing pulse has a signal level outside of the limits established by the white and black signal levels. The video signal is additively combined with these horizontal timing pulses to provide a composite signal for transmission from the camera head to the camera control unit through a single transmission path.

In accordance with another aspect of the present invention, circuitry is provided at the camera control unit for separating the modified horizontal timing pulses from the composite signal. A phase locked loop is provided for synchronizing one phase of a sixteen phase oscillator with the modified timing pulses. Selected phases of the oscillator are logically combined with the modified timing pulses and the composite signal so as to reconstruct the video signal and unmodified horizontal timing signals therefrom.

The foregoing and other objects and advantages of the invention will become more readily apparent from the following description of the preferred embodiment of the invention as taken in conjunction with the accompanying drawings which are a part hereof and wherein:

FIG. 1 is a block diagram illustrating a camera system employing the present invention;

FIG. 2, consisting of A-N, illustrates a plurality of waveforms A-N representative of various operations described herein;

FIG. 3 is a schematic-block diagram illustration of a preferred form of the invention; and,

FIG. 4 is a logic diagram of one possible embodiment of the pulse generator block of FIG. 3.

Reference is now made to the drawings wherein the showings are for purposes of illustrating a preferred embodiment of the invention only and not for purposes of limiting same. In FIG. 1 there is illustrated a television camera system which employs the present invention. This system includes a camera unit CU which may be remotely located from the camera control unit CCU by means of a suitable transmission link TL. As is conventional, the camera unit provides a video signal and in a color camera unit these video signals include red, green, and blue signals, all of which are transmitted to the camera control unit CCU.

In addition to the video signals, the camera control unit also provides timing information in the form of a horizontal interval timing signal which corresponds in time with the horizontal blanking intervals of the video signals. In accordance with the present invention, this horizontal timing signal is processed for form a modified signal which is then combined with one of the video signals (shown in FIG. 2 as being the blue video signal) by a combining circuit CC. This combined signal, containing information from the blue video signal and the horizontal timing signal is then transmitted over a transmission link TL to a reconstruction circuit RC.

If a number of signals are to be transmitted in discrete frequency channels over a single common length of coaxial or triaxial cable, transmission link TL may include a modulator for modulating the combined signal onto a carrier signal so as to shift the center frequency of the signal into the desired frequency channel. In this event, a demodulator will be included at the other end of the transmission link TL for recovering the combined signal from the modulated signal.

The combined signal will then be processed by a reconstruction circuit RC. Reconstruction circuit RC serves to separate out the modified timing signal from the combined signal, and to use this modified signal to regenerate the horizontal interval timing signal and the blue video signal. These two signals, the blue video signal and the timing signal, will then be directed to a camera control unit CCU for further processing.

As shown in FIG. 2, the video signal A comprises periodic video intervals containing the picture content of the video signal separated by horizontal blanking intervals. The first portion of each horizontal blanking interval includes a white pulse having an amplitude indicative of the greatest possible amplitude of the video signal during the video interval. For the duration of the horizontal blanking interval, the signal remains at a black level indicative of the lowest possible amplitude of the signal during each video interval.

The horizontal interval timing signal generated by the camera is identified in FIG. 2 by the letter B. It will be seen that this signal is comprised of a periodic sequence of horizontal timing pulses corresponding to the blanking intervals of the video signals generated by the camera. In accordance with the present invention, the horizontal interval timing signal is processed to generate a modified horizontal timing signal D shown in FIG. 2. This modified signal is then combined with the incoming video signal A to generate a composite signal E, which signal thus contains information corresponding to both the video signal and the horizontal interval timing signal.

Referring now to FIG. 3, a more detailed block diagram is shown of the combining circuit CC interconnected with a reconstruction circuit RC by means of the transmission link TL. In accordance with the present invention, the incoming horizontal timing signal is processed by a combining circuit 10 which includes a triggerable monostable 12 and a logic gate 14. Triggerable monostable 12 responds to the leading edge of each of the horizontal interval timing pulses to generate a delay pulse (identified by letter C in FIG. 2) having a fixed duration of 5.95 microseconds. This signal serves to disable the passage of the horizontal interval timing pulse B through gate 14. At the conclusion of the 5.95 microsecond delay, however, logic gate 14 will be enabled, and will pass the remainder of the horizontal interval timing pulse. The horizontal interval timing pulse, thus modified, is then additively combined with the incoming video signal by a signal adder circuit 16 to generate the composite signal E shown in FIG. 2. The composite signal thus has an additional pulse occurring during the black level interval which has an amplitude outside of the range of video amplitudes established by the white and black levels.

Following transmission of this combined signal over transmission link TL, a reconstruction circuit RC receives the signal and reconstructs the video and horizontal timing signals therefrom. A horizontal timing pulse stripper 18 is provided in the reconstruction circuit RC which serves to separate the modified horizontal timing pulse from the composite signal. This separation of signals can be readily accomplished because of the distinctive amplitude of the timing pulses. The stripped signal, identified by the letter F in FIG. 2, is then inverted by inverter 19 and directed to a phase locked loop 20 which serves to synchronize the operation of a voltage controlled oscillator (VCO) 22 therewith. In accordance with the present invention, voltage controlled oscillator 22 operates at a frequency which is a high multiple of the frequency of the stripped horizontal pulse. In the disclosed embodiment, the VCO generates 16 pulses for every stripped horizontal pulse. The output of voltage controlled oscillator 22, identified by letter G in FIG. 2, is directed to a 16-line counter/decoder 24 which serves to count the pulses provided by VCO 22 and to decode the counter output with a 1-of-16 decoder. The 16 outputs are thus activated in sequence, with only one output being activated (i.e., in a logic "1" state) at any given time. Since VCO 22 produces a repetitive pulse waveform, the output signal on each output line will similarly be a pulse waveform, and will have a repetition rate 1/16.sup.th that of the VCO. Additionally, adjacent outputs will produce sequential pulses in consecutive VCO output cycles. VCO 22 in combination with counter/decoder 24 could thus be viewed as a 16-phase oscillator, wherein each output Q1-Q15 corresponds to a different phase of a single operating cycle. Thus, the three adjacent outputs Q15, Q0, and Q1 (Q15 is considered to be adjacent to Q0 since Q0 will be activated after Q15) will produce the outputs H, I, and J shown in FIG. 2. These three signals are used for synchronizing the operation of the phase locked loop, and for regenerating both the horizontal timing pulse and the video signal. The H output, corresponding to the Q1 output pulse, is supplied to a phase comparator 26 which is responsive to the leading edges of the signals supplied thereto and which serve to compare the phase of the stripped horizontal timing pulse with the phase of the Q1 output of the 16-line counter/decoder 24. The output of phase detector 26 is directed through a low-pass filter 27 to the control input to voltage controlled oscillator 22. In this manner, the operation of the VCO is adjusted by the phase comparator so that the leading edge of the Q1 output pulse occurs simultaneously with the leading edge of the stripped horizontal timing pulse.

The Q0 and Q15 outputs supplied by the 16-line counter/decoder 24, as well as the outputs of voltage controlled oscillator 22 and pulse stripper 18, are directed to a pulse generator 28 which serves to logically combine these signals to provide a black clamp pulse L, a blanking pulse M, and a reconstructed horizontal timing pulse K. Pulse generator 28 will be described in further detail with reference to FIG. 4. With respect to the reconstruction of the horizontal timing pulse, it will be noted that the delay provided by monostable 12 has been selected so that the actual beginning of the horizontal timing interval will be exactly 11/2 cycles of VCO 22 prior to the beginning of the modified horizontal timing pulse.

The black level clamp pulse L is directed to a clamping circuit 30 which serves to clamp the DC voltage level of the detected video signal, as indicated by the black level signal selected by the clamping pulse, to the black level of the camera control unit. The blanking pulse M is directed to a blanking circuit 32 which serves to remove the modified horizontal timing signal from the detected video signal by maintaining the detected video signal at the level that it had been at immediately prior to the blanking pulse. Blanking circuit 32 thus provides at its output the reconstructed video signal N shown in FIG. 2.

Referring now to FIG. 4, a pulse generator 28 is shown which could be employed with the present invention. Two type "D", positive-edge triggered flip-flops (F/F) 40 and 42 are used for reconstructing the horizontal timing signal and generating the blanking pulse. Each F/F is set when a low level is established on its "set" input. F/F 40 is set at the beginning of the horizontal interval by logically ANDing the VCO output and the Q15 output of counter/decoder 24 by NAND gate 44. This will cause the output of NAND gate 44 to fall to a low voltage level exactly 11/2 cycles of VCO 22 prior to the beginning of the stripped horizontal pulse. As stated previously, this timing corresponds to the beginning of the horizontal interval. F/F 42 is set somewhat later in the horizontal interval, after the incoming signal has settled at the black level. The Q10 output of counter/decoder 24 is inverted by inverter 46 to supply a signal which falls to a low voltage level at the proper time. F/F's 40 and 42 are simultaneously reset when a rising transition is presented at their clock inputs C. By connecting the output of pulse stripper 18 to the clock input of each F/F, each will be reset at precisely the conclusion of the horizontal interval. The clamp pulse is generated by ANDing the Q0 output of counter/decoder 24 with the inverse of the VCO output. This is accomplished through use of gate 48. The net results of these operations are the signals shown in FIG. 2 and identified by letters K, L, and M.

Although the invention has been described with respect to a preferred embodiment, it will be appreciated that various rearrangements and alteration of parts may be made without departing from the spirit and scope of the invention as defined in the following claims.