BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to meters in general and, more particularly, to torque meters.
SUMMARY OF THE INVENTION
A torque meter which measures the torque of a rotating shaft includes at least two sensors. A portion of each sensor is affixed to the shaft. The sensors provide shaft pulse signals at the same frequency but having a phase difference corresponding to the torque experienced by the shaft. A detector connected to the sensors provides a detection signal corresponding to the direction of rotation of the shaft. A clock provides clock pulses. A circuit connected to the sensors and to the clock provides first group pulses in accordance with the shaft pulse signals so that the number of pulses in each group of the first groups of pulses corresponds to the torque experienced by the shaft at a constant speed. A first count network counts the pulses provided by the circuit. Another network connected to the clock provides second groups of pulses and is responsive to the speed of the shaft rotations so that a ratio of a group of pulses from the first groups of pulses to a corresponding group of pulses from the second groups of pulses averages out errors due to the speed of shaft rotation and the positions of the sensors. A second counting network counts the pulses in the second group of pulses. A circuit provides a reset pulse for resetting the counting networks each revolution of the shaft. An output network connected to both counting networks and to the detector provides an output corresponding to the torque experienced by the shaft rotating in the proper direction in accordance with the ratio of the counts in the counting networks and the detection signal.
The objects and advantages of the invention will appear more fully hereinafter from a consideration of the detailed description which follows, taken together with the accompanying drawings wherein one embodiment of the invention is illustrated by way of example. It is to be expressly understood, however, that the drawings are for illustration purposes only and are not to be construed as defining the limits of the invention.
DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified block diagram of a torque meter, constructed in accordance with the present invention, for measuring the torque experienced by a rotating shaft.
FIGS. 2A through 2C are graphical representations of pulses occurring during the operation of the torque meter shown in FIG. 1.
FIGS. 3A through 3H are graphical representations of signals E.sub.a and E.sub.b.
FIG. 4 is a detailed block diagram of the detector shown in FIG. 1.
DESCRIPTION OF THE INVENTION
Referring to FIG. 1, there is shown a torque meter having a wheel 1, with teeth, mounted on a shaft 3. At another location on shaft 3, there is mounted another wheel 5 substantially identical to wheel 1. As shaft 3 rotates, the teeth in wheels 1, 5 pass pick-up coils 7 and 9, respectively, which are connected to ground 10; each coil has a magnetized core. An alternate arrangement would have each tooth of the wheels magnetized instead of the cores of the coils. As each tooth passes a corresponding coil an electric voltage is induced therein so that during rotation of shaft 3, coils 7 and 9 provide pulses.
The pulses from coils 7, 9 are applied to squaring amplifiers 11 and 14, respectively. Squaring amplifiers 11 and 14 may be omitted if the pulses provided by coils 7, 9 are suitable. Squaring amplifiers 11, 14 provide shaft pulse signals E.sub.a and E.sub.b, respectively, shown in FIGS. 3B and 3A, respectively, to an exclusive OR gate 17 and to a detector 18.
When amplifiers 11, 14 are simultaneously providing a pulse, exclusive OR gate 17 provides a low logic level output. When one and only one of the amplifiers 11 or 14 is not providing a pulse, exclusive OR gate 17 provides a high logic level output. If both amplifiers 11 and 14 are not providing a pulse exclusive OR gate 17 produces a low output. Thus, the duration of a high output from exclusvie OR gate 17 corresponds to the torque experienced by shaft 3 for a given speed. The output from exclusive OR gate 17 is applied to an AND gate 25.
Detector 18 determines if shaft 3 is rotating in a reverse direction or if amplifier 11 is producing noise or vibration pulses.
A clock 26 provides clock pulses to AND gate 25 and to another AND gate 27.
The shaft pulse signal E.sub.b from amplifier 14 is provided to a divider 30 which divides the pulses by a number equal to the number of teeth on wheel 1 or 5. Each pulse provided by divider 30 triggers a one-shot 33 to provide a negative going `enter` pulse E.sub.1, shown in FIG. 2A. Pulses E.sub.1 are provided to another one-shot 35 triggering it to provide a negative going `reset` pulse E.sub.2, shown in FIG. 2B. Pulses E.sub.1, E.sub.2 are applied to a NAND gate 38 causing it in effect to provide a positive going pulse. The positive going pulse is applied to an inverter 39 which provides a negative going pulse E.sub.3, as shown in FIG. 2C. Pulse E.sub.3 is provided to AND gates 25, 27 and effectively disables them for the duration of the pulse E.sub.3 so that any counting as hereinafter explained would not occur during the occurrence of pulses E.sub.1, E.sub.2.
The clock pulses from clock 26 pass through AND gate 25 when the signal from exclusive OR gate 17 is at a high level and while there is an absence of pulse E.sub.3. The passed pulses from AND gate 25 are provided to a `divide by 100` divider 40. The pulses from divider 40 are applied to counter means 43 which counts them in an up direction. Similarly, clock pulses from clock 26 pass through AND gate 27, during the absence of a pulse E.sub.3, and are applied to a `divide by 5,000` divider 47 whose pulses are applied to counting means 49. It should be noted at this point that counter means 43 contains a count corresponding to a phase difference while counter means 49 contains a count corresponding to the time duration of one cycle of the torque meter. Counter means 43 and 49 are periodically reset to zero by `reset` pulse E.sub.2 from one-shot 35 and provide digital signals corresponding to the counts to latch means 52 and 53, respectively. Latch means 52 and 53 store the digital signals from counter means 43 and 49 in response to a pulse E.sub.1 from one-shot 33. Thus the sequence of events is such that latch means 52 and 53 store the digital signals from counter means 43 and 49, respectively, and then counter means 43 and 49 are reset to zero. Latch means 52 and 53 provide digital signals to down counter means 57 and 58, respectively.
A clock 70 provides clock pulses to an AND gate 72. AND gate 72 is controlled by the output of a flip-flop 73 to pass or block the clock pulses from clock 70. Flip-flop 73 is set by a passed pulse from an AND gate 74 receiving pulses E.sub.2 and which is controlled by a signal E.sub.4 from detector 18 as hereinafter explained. Pulses passed by AND gate 72 are provided to down counter means 75, 58. Preset means provides signals corresponding to a predetermined multiplication factor N to downcounter means 75 so that the counting down of counter means 75 repeats until AND gate 72 is disabled. Downcounter means 57 provides a pulse output upon reaching zero count to reset flip-flop 73, thereby disabling AND gate 72 and stops the passage of the clock pulses from clock 70 so that the number of pulses passed by AND gate 72 corresponds to the product of N and the count in counter means 43. Since the count in counter means 49 is less than or equal to N times the count in counter means 43, the pulses provided by AND gate 72 cause counter means 58 to count down to a zero count repeatedly. When the count in counter means 58 reaches zero, it provides a pulse to another counter means 80 and to inverter 81. Inverter 81 inverts the pulse and provides it back to counter means 58 causing it to load in the digital signals from latch means 53, so that the counting down of counter means 58 keeps repeating. When flip-flop 73 is reset by counter means 57, the count in counter means 80 corresponds to the product N and the count in counter means 43 divided by the count in counter means 49. The count in counter means 80 also corresponds to the torque experienced in shaft 3.
Preset means 83 may be utilized to preset a count into counter means 80 corresponding to any alignment error between wheels 1 and 5.
Latch means 85 receives digital signals from counter means 80, corresponding to the count, and is controlled by the output from flip-flop 73 to enter the digital signals. Latch means 85 provides digital signals to display means 87, which may be of a conventional type, for providing a display corresponding to the torque experienced by shaft 3.
Referring now to FIGS. 1, 3A through 3H, and 4, detector 18 determines whether the shaft is rotating in a wrong direction or that amplifier 14 is providing pulses as a result of vibration or noise. Should either of these conditions occur, the current erroneous data is prevented from entering latch means 85 so that latch means 85 provides the latest valid data.
Pulses E.sub.b are applied to the clock or `C` input of `D` type flip-flop 89 and to an inverter 95, while pulses E.sub.a are applied to the data or `D` input of `D` type flip-flop 89 and to an inverter 90. Inverters 90, 95 provide inverted pulses E.sub.a and E.sub.b, respectively, to the `C` input and the D input, respectively, of flip-flop 94. The Q outputs of flip-flops 89, 94 are provided to an OR gate 97. OR gate 97 is connected to a set or `S` input of yet another `D` type flip-flop 100. Pulses E.sub.3 are applied to the `C` input of flip-flop 100 while flip-flop 100 `D` input is grounded. Flip-flop 100 provides its Q output as signals E.sub.4. A `D` type flip-flop will provide its Q and Q outputs at low and high logic levels, respectively, when in a clear state and at high and low logic levels, respectively, when in a set state. Further, when an input of one logic level is applied to the `D` input, the flip-flop is triggered by a rising pulse to provide a Q output at the same logic level as provided to the `D` input.
In normal operation, pulses E.sub.a lag pulses E.sub.b. Thus, when pulse E.sub.b is rising pulse E.sub.a is low so that flip-flop 89 is triggered to provide its Q output at a low logic level. Similarly, due to the effect of inverters 90 and 95, flip-flop 94 is triggered by the trailing edge of pulses E.sub.b to provide its Q output at a low logic level. Thus for normal rotation both flip-flops 89, 94 provide low logic level Q outputs to OR gate 97 causing it to provide a low logic level output to flip-flop 100. Flip-flop 100 is not affected by the low logic level output from OR gate 97 and continues to provide signal E.sub.4 at a high logic level which allows AND gate 74 to pass a pulse E.sub.2 so that flip-flop 73 is set. This causes latch means 85 to enter the signals from counter means 80.
When reverse rotation occurs, pulses E.sub.a lead pulses E.sub.b as is shown in FIGS. 3C and 3D so that pulse E.sub.a is at a high level when pulse E.sub.b rises. In response to this condition, flip-flop 89 is triggered to provide its Q output at a high logic level. Once this occurs, flip-flop 94 is of no importance. Since flip-flop 89 is at a high logic level, OR gate 97 provides a high level output triggering flip-flop 100 to a set state. While in a set state, flip-flop 100 provides signal E.sub.4 at a low logic level to disable AND gate 74 to prevent the entry of data into latch means 85 by not allowing flip-flop 73 to be set. Thus latch means 85 provides signals corresponding to the last valid data obtained. Further, signal E.sub.4 is going to a low logic level causes a light means 104 to light thus visibly indicating malfunctioning. Light means 104 does not light when signal E.sub.4 is at a high logic level.
Signal E.sub.3, as can be seen in the description regarding FIG. 1, is a pulse which occurs every cycle. Its occurrence when flip-flop 100 is in a set state, resets flip-flop 100 to a clear state causing signal E.sub.4 to go to a high logic level. Latch means 85 can then again enter valid data.
When noise or vibration causes an amplifier 11 or 14 to provide an erroneous output, that condition may be seen either in FIGS. 3E, 3F or 3G, 3H. With regard to FIGS. 3F and 3G, the output of an amplifier 11 or 14 should be at a steady state, which may be at a high logic level or at a low logic level. The solid line is for a low logic level, while the dash line represents a high logic level steady output. When pulse E.sub.a does not occur and the output of amplifier 11 is at a high logic level, flip-flop 89 is triggered by the leading edge of a pulse E.sub.b. Similarly, if the signal from amplifier 11 is at a steady state low logic level, the trailing edge of a pulse E.sub.b triggers flip-flop 94 to provide its Q output at a high logic level. As noted hereinbefore, a high logic level Q ouput from either flip-flop 89 or 94, causes flip-flop 100 to be triggered to a set state.
A final erroneous condition, that is where amplifier 14 provides a steady state signal, while noise or vibration cause amplifier 11 to provide pulses E.sub.a, is not controlled by detector 18 but by the inherent operation of system itself. Since amplifier 14 is not providing pulses E.sub.b, `divide by T` 30 does not provide a pulse therefor, latch means 85 cannot enter the erroneous data.
It would be obvious to one skilled in the art that if only reverse rotation was to be detected flip-flop 89 would be needed solely or in conjunction with flip-flop 106. For the solo case, flip-flop 89 would provide its output as signal E.sub.4 and there would be no cyclic resetting of flip-flop 89. The resetting would occur with normal rotation.
The invention hereinbefore described is a digital torque meter for measuring the torque on a rotating shaft. The torque is determined by developing two signals whose difference in phase corresponds to the torque experienced by the shaft. The phase difference is then used to generate pulses corresponding in number to the torque. The pulses are then counted, displayed and recorded. The torque meter does not record any display erroneous data due to reverse rotation of the shaft or due to vibration of noise.