Glass-Ceramics for Semiconductor Doping

This invention is an improvement over the invention of commonly assigned copending application entitled "Boron Doping of Semiconductors" Ser. No. 431,211 filed 1/7/74, now U.S. Pat. No. 3,928,096 and relates to diffused-junction type semiconductor devices, and especially to a new method for diffusing boron into silicon and germanium semiconductors. More particularly, the present invention pertains to glass-ceramic bodies suitable for use in a precise and readily controllable method for diffusing a boron-containing layer in at least a portion of the surface of a semiconductor for the purpose of forming a semiconductor junction therein.

Semiconductors have been known in the industry for many years, and the term semiconductor element has been considered generic to silicon, germanium and silicon-germanium alloys. As used herein, the term "semiconductor" is intended to mean such silicon, germanium and silicon-germanium alloy semiconductor elements. Such elements can be circular, rectangular or triangular or any other convenient geometric shape, although they are usually in the form of a wafer or disc in most commercial situations.

Such silicon semiconductors have an active impurity incorporated therein during manufacture or later by diffusion, which impurity affects the electrical rectification characteristics of the semiconductor as distinguished from other impurities which may have no appreciable effect on those characteristics. Active impurities are usually classified as donor impurities or acceptor impurities. The donor impurities include phosphorus, arsenic and antimony and the acceptor impurities include boron, gallium, aluminum and indium. In other cases, the silicon semiconductors are essentially free of such impurities and are called "intrinsic" semiconductors.

With respect to the nomenclature used in the semiconductor art, a zone of semiconductor material containing an excess of donor impurities and yielding an excess of free electrons is said to exhibit N type conductivity. On the other hand, P type conductivity is exhibited by a zone containing an excess of acceptor impurities resulting in a deficit of electrons or an excess of "holes." In other words, N type conduction is characterized by electron conduction whereas a P type conduction is one characterized by hole conduction. "Intrinsic" (sometimes called "I" type) silicon semiconductors contain neither donor or acceptor impurities.

When a continuous solid specimen of semiconductor material has an N type zone adjacent to P type zone, the boundary between them is termed a P-N or N-P junction and the specimen of semiconductor material is termed a P-N junction semiconductor device. When a zone of P type conductivity is adjacent a zone of greater P type conductivity, the junction is called a P-P.sup.+ junction. When a zone of N type conductivity is adjacent a zone of greater N type conductivity, the junction is called an N-N.sup.+ junction. Semiconductor junctions of the P-I type and N-I type also exist. The present invention encompasses the diffusion doping of boron to form P (including "P.sup.+") zones in the above types of semiconductor devices.

Semiconductors have application and utility for purposes such as rectifiers, transistors, photodiodes, solar batteries, semiconductor controlled rectifiers and other devices. In addition to general electronic applications, the P-N junction semiconductor is frequently used as a radiation detector of charged particle detector.

Commonly assigned, copending application Ser. No. 431,211 filed 1/7/74, now U.S. Pat. No. 3,928,096, entitled "Boron Doping of Semiconductors" discloses B.sub.2 O.sub.3 containing glass-ceramic dopant hosts in the form of thin wafers which do not significantly deform at doping temperatures in the neighborhood of 1000.degree. C. The present invention represents an improvement over this copending application in that it provides a specific family of B.sub.2 O.sub.3 containing glass-ceramic dopant hosts which are thermally stable and rigid at doping temperatures in excess of about 1050.degree. C. The preferred range of glass-ceramic dopant host compositions are rigid at temperatures in the 1100.degree.-1200.degree. C. range even when in the form of thin wafers. Furthermore, the parent glass compositions which are thermally crystallized to form these improved glass-ceramic dopant hosts are readily melted and are resistant to uncontrolled devitrification.

The primary feature of the present invention is that it provides for the incorporation of as high as 60 mole percent B.sub.2 O.sub.3 in the glass-ceramic dopant hosts while maintaining rigidity and dimensional stability during high temperature doping. This feature is extremely important because the rate at which B.sub.2 O.sub.3 vapors are generated by the glass-ceramic dopant host during doping, generally increases as the concentration as B.sub.2 O.sub.3 in the dopant host increases. Unfortunately the thermal stability and rigidity of glass-ceramic materials in thin sections usually decreases with increasing B.sub.2 O.sub.3 concentration. The present invention provides the unique and desirable combination of high concentration of B.sub.2 O.sub.3 in the glass-ceramic dopant host as well as thermal stability and rigidity at temperatures in excess of 1050.degree. C., even when the dopant host is in the form of a thin wafer.

The above and other features and advantages of the present invention will become apparent from the following detailed description thereof taken in conjunction with the drawing wherein:

FIG. 1 is a cross-sectional view of the semiconductor body, having been processed in accordance with the method described herein.

FIG. 2 is an isometric view of a solid B.sub.2 O.sub.3 -containing glass-ceramic dopant wafer as described herein.

FIG. 3 is an elevation view showing a refractory container in which a plurality of solid wafers of the B.sub.2 O.sub.3 -containing glass-ceramic and a plurality of silicon wafers are arranged for practicing the present invention.

The present invention overcomes the difficulties of the prior art methods by utilizing a rigid, dimensionally stable, substantially alkali metal oxide free alkaline earth aluminoborosilicate glass-ceramic dopant host as a dopant source or host for varpor phase transport of B.sub.2 O.sub.3 to the semiconductor. According to the present invention, the glass-ceramic dopant host is maintained in vapor phase communication (with or without the presence of a carrier gas) with a semiconductor at a temperature and for a time sufficient to transport B.sub.2 O.sub.3 from the dopant host to the surface of the semiconductor. The semiconductor so treated is then heated, with or without the continued presence of the glass-ceramic dopant host for a time sufficient to permit diffusion of boron into the semiconductor to the desired depth.

A commercially significant embodiment of the invention is an N type silicon semiconductor which has formed therein a boron-containing layer defining a P type zone. The reverse side of the silicon chip or wafer retains its N type nature and, accordingly, the product produced by this invention is a P-N junction semiconductor device.

The invention is described in terms of the "vapor phase transport of B.sub.2 O.sub.3 " for lack of a clear understanding of the boron-containing species vaporized from the glass-ceramic host. Accordingly, this term includes whatever boron-containing species is responsible for the transport effect. Similarly, the diffusion process is discussed in terms of "boron diffusion" into the semiconductor for lack of a clear understanding of the boron-containing species actually being diffused. Accordingly, this term includes whatever boron-containing species is responsible for the diffusion doping effect.

Boron is deposited from the vapor phase onto the surface of the semiconductor and diffuses to a controlled depth within the silicon wafer. The concentration and depth of the junction is proportional to the time and temperature of the doping and diffusing process.

The glass-ceramic dopant host must be rigid and dimensionally stable at the doping temperatures so that deformation is not a problem when the dopant source is planar in configuration. In planar diffusion doping, a planar surface of a solid dopant host and a planar surface of the semiconductor to be doped are positioned parallel in spaced confronting relationship during the diffusional heat treatment. In that the concentration of B.sub.2 O.sub.3 on the surface of the semiconductor is a function of the distance between the planar surfaces, dimensional stability of the dopant host is of the utmost importance in achieving uniformity in boron distribution on the surface of the silicon semiconductor.

The glass-ceramic dopant hosts particularly useful for practicing the present invention are formed from certain alkaline earth alumino borosilicate glasses which are substantially free of alkali-oxide. By substantially alkali-free, it is meant that the glasses do not contain sufficient alkali oxides (e.g., K.sub.2 O, Na.sub.2 O, and Li.sub.2 O) to yield a vapor phase containing such oxides at the doping temperatures. It has been found that presence of such alkali oxides in the vapor phase contributes undesirable conductivity characteristics to the resulting semiconductor. In the usual practice of the present invention, the combined alkali oxides are less than about 0.5 mole % and preferably less than 0.1 mole % of the glass-ceramic dopant composition. Preferably the alkali oxides are absent altogether, although this is not always possible because batch materials often contain alkali oxides as impurities.

The term "glass-ceramic" body is used herein according to its conventional meaning and refers to a semicrystalline ceramic body which is composed of at least one crystalline phase randomly dispersed in a residual glassy phase or matrix. Such crystalline phase is formed by the in-situ thermal crystallization of a parent glass composition.

The heat treatment process for forming glass-ceramics from a parent glass usually include a nucleation stage at substantially the temperature of the annealing point (viscosity 10.sup.13 poises) of the parent glass, a development stage at a temperature below the fiber softening point of the parent glass (preferably at a viscosity in the range of 10.sup.8 to 10.sup.12 poises), and a crystallization stage (at a temperature preferably 150.degree. to 300.degree. F. above the fiber softening point of the parent glass (i.e., viscosity of 10.sup.7.65 poises).

Although the crystallization process itself is not the subject of the present invention, the following description is given in the interest of completeness of disclosure. The parent glass to be crystallized is heated to a temperature corresponding to a viscosity of about 10.sup.13 poises and maintained at this temperature long enough to permit the formation of submicroscopic crystals dispersed throughout a glassy matrix. This is commonly known as the nucleation. The time required for the nucleation period varies according to the composition and is typically from 1/4 to 24 hours.

The glassy matrix containing the nucleated crystals is then heated to a temperature corresponding to a viscosity of approximately 10.sup.8 poises. This thermal condition is maintained for a sufficient time to permit partial crystallization to form a rigid, crystalline structure. The submicroscopic nuclei dispersed in the glassy matrix as a result of the nucleation phase act as growth centers for the rigid framework formed during this second or development stage of the heating cycle. The development stage varies with composition and is typically 1/4 to 4 hours. The purpose of the development phase is to provide a rigid skeletal-crystal framework to support the remaining matrix when the temperature is raised to complete crystallization.

This glass-ceramic body is then formed by heating to a temperature of 150.degree. to 300.degree. F. above the temperature corresponding to the viscosity of 10.sup.7.65 poises of the parent glass. This temperature is maintained until the desired degree of crystallinity is obtained. The final crystallization phase of the heat treating cycle is typically 1/4 to 4 hours at the highest practical temperature which does not cause the glass ceramic to flow. This heat treatment promotes high temperature dimensional stability in the finished glass-ceramic. This heat treatment temperature is in the neighborhood of the solidus temperature.

In actual practice, it has been found that all three stages of the heating process can be accomplished by continuously advancing the temperature through regions of nucleation, development and crystallization. In many compositions of the present invention, it has been found that a "formal" development stage is not required because the time required to heat the article from the nucleation temperature to the crystallization temperature is sufficient. Additional details for forming glass-ceramic bodies are described in U.S. Pat. No. 3,117,881, the disclosure of which is incorporated by reference.

In practicing the present invention, the glass-ceramic dopant host is formed from an alkaline earth alumino borosilicate parent glass which is substantially free of alkali metal oxides and consisting essentially of the following ingredients on a molar percent basis.

usually the sum total of alkali metal oxides is less than about 0.5 mole % and preferably less than 0.1 mole % in the above compositions.

In the above composition range the BaO content is usually 0-10 mole %, although compositions containing up to 15 mole % are quite satisfactory.

In a preferred practice of the present invention, within the above range the composition consists essentially of:

wherein the MgO component of RO is at least about 3% of the total composition.

As will be apparent from the examples that follow the combination of MgO with CaO, SrO, and/or BaO improves the resistance to uncontrolled devitrification in the parent glass. The presence of La.sub.2 O.sub.3, Nb.sub.2 O.sub.5, and Ta.sub.2 O.sub.5 contribute to the melting and formation of parent glass compositions having high proportions (e.g. greater than about 50 mole %) B.sub.2 O.sub.3 which are resistant to uncontrolled devitrification.

In addition to the above oxides, the term "consisting essentially of" is intended to include minor proportions (i.e. up to about 10 mole %) of other than alkali oxides such as glass forming oxides, modifying oxides, nucleant oxides (e.g. TiO.sub.2 and/or ZrO.sub.2) and refining aids, when such ingredients are not detrimental to the semiconductor doping and are required to achieve specific chemical or physical properties.

The ratio Al.sub.2 O.sub.3 /RO is important from the standpoint of glass formability and high temperature stability in the resulting glass-ceramic dopant host. When the ratio of Al.sub.2 O.sub.3 /RO is less than about 1.5, the glass-ceramic dopant host wafers may have a tendency to deform at doping temperatures in the neighborhood of 1100.degree. C.-1200.degree. C. When the ratio of Al.sub.2 O.sub.3 /RO is greater than about 4 it becomes more difficult to melt and form the parent glass.

In accordance with one embodiment of the present invention and with reference to the attached drawings, a suitable N type silicon substrate 10 is prepared by any of the known techniques of obtaining monocrystalline bodies of silicon. For example, a monocrystalline ingot can be formed of highly purified silicon. The ingot is cut into transverse slices and the slices are diced to form silicon wafers of the desired dimension. The surface of the substrate can be prepared by suitable cleaning and polishing. However, the polished and cleaned semiconductive silicon materials can be commercially purchased. Polishing or cleaning of the surface can be accomplished by mechanical means such as lapping or the like or by chemical means, such as etching which is well understood in the art and does not form a part of the present invention.

Furthermore, the N type silicon wafer can be part of a complex semiconductor device and already have one or more P-N junctions arranged in any geometric pattern therein. The only important feature is that at least a part of the exposed surface of the silicon wafer exhibit "N" type of conduction. Accordingly, the term "N" type silicon as used herein includes such complex semiconductor devices having alternating zones of P and N type conduction.

For conventionally grown crystals, the surface may be chemically polished with a suitable etchant; for example, a concentrated solution of three parts hydrofluoric acid, three parts acetic acid and five parts nitric acid, by volume. Alternatively, the surface may be prepared by lapping or etching with a hot solution of water containing about 10% sodium hydroxide at ambient temperature and up to about 90.degree. C. These cleaning and etching operations function for the purpose of removing contaminants from the surface and to make the surface uniform with a high degree of smoothness. These preparatory operations are well understood in the art.

Formation of P-N junctions of the present invention have been found to occur to a desirable extent on N-type silicon having a resistivity of about 10 ohm-centimeters. It is, of course, readily apparent that the precise size and nature of the wafer is not critical. For example, wafers conventionally used can be 1, 2, or 3 inches in diameter or even more. The thickness can range from 5 to 20 mils, although this can vary. Typical wafers are 8 to 10 mils thick. Likewise, the resistivity of suitable N-type silicon starting materials ranges from about 0.1 to about 100 ohm-centimeters.

An oxide layer 11 is grown on the surface of wafer 10 in accordance with this invention. The wafer is heated in the vapors of B.sub.2 O.sub.3 so that a film or coating is formed over at least a portion of the surface of the wafer. A mask or protective covering can be utilized so as to develop any pattern as is understood in the art. The coating or film 11 is of glassy nature and contains boron in one form or another.

The temperature of this operation is such that simultaneously, some boron diffuses from the film or deposit 11 into the wafer 10 forming a thin boron diffused surface layer on region 12 adjacent the coating 11. The region 12 is a boron diffused layer 11 into the N conductivity silicon 10. The juncture depth can vary, but in general, it is up to about 10 microns in thickness. The minimum thickness can vary and illustratively is about 0.1 micron.

FIG. 2 shows a disc or wafer 14 of the B.sub.2 O.sub.3 -containing glass-ceramic dopant host, which functions as the source of B.sub.2 O.sub.3 vapors for contact with the silicon wafers.

When positioned in a suitable furnace used for the invention, and when subjected to temperatures in the range of 700.degree. C. to 1250.degree. C., more particularly 1050.degree. C. to 1200.degree. C., the glass-ceramic dopant wafer liberates B.sub.2 O.sub.3 vapors, which vapors then flow through the furnace high temperature zone in the direction of contacting the silicon wafers positioned in the vicinity of the dopant wafer. Generally, the method comprises diffusing boron into a semiconductor silicon element by positioning at least one semiconductor silicon element in a furnace, positioning a solid dopant wafer, disc or similar body in the furnace in the vicinity of, but not in physical contact with the silicon element, and then subjecting the silicon element and glass-ceramic dopant to an elevated temperature in the range mentioned above. At these temperatures the dopant liberates B.sub.2 O.sub.3 vapors which vapors then pass through the furnace and contact at least a portion of the surface of the silicon element. This process is conducted for a sufficient period of time to permit the diffusion of the boron into at least one portion of the surface of the silicon element to form a diffused region therein. After the B.sub.2 O.sub.3 vapors react with the hot silicon surface, the elemental boron diffuses into the silicon chip with continued heating. This boron diffusion step can be conducted in the absence of the glass-ceramic dopant wafer if desired.

As a further aspect to this embodiment of the invention, the doping process is further controlled and enhanced by the use of free-flowing inert carrier gas such as argon, or nitrogen. As used here, the expression "inert gas" means that the carrier gas does not enter into the chemical reaction between the B.sub.2 O.sub.3 vapors and the hot silicon surface.

This is shown in FIG. 3, wherein the carrier gas enters from the left and passes across wafer 14 where the B.sub.2 O.sub.3 is released and contacts the exposed surfaces of the silicon wafer 10. By placing two silicon wafers back-to-back, the reverse side of each of the silicon chips receives no boron from the process and consequently retains its original character as an N type silicon. Following the doping process, the diffusion depth can be further increased to diffuse the junction deeper by a simple heat treatment in an inert atmosphere. This can be carried out in a separate furnace if desired. The process has been described in terms of silicon semiconductors because of their commercial importance, although the same process can be applied to germanium semiconductors. Somewhat lower doping temperatures are employed in the doping of germanium because of its 937.degree. C. melting point.

In preparing the glass-ceramic dopants, suitable compositions containing appropriate raw materials can be melted to form a homogeneous glass. Illustratively, compositions described above can be melted to form a homogeneous glass at 1500.degree. C. to 1650.degree. C. in a refractory vessel. Generally, this melting procedure requires about 15 minutes to several hours to achieve homogeneity. It can be desirable to add additional B.sub.2 O.sub.3 to the melt to account for losses due to volatilization. It is desirable to keep the melting time as short as possible in order to reduce the losses due to volatilization. Also, the batch material should be as pure as possible so as to minimize the presence of impurities.

The dopant host can be produced in a number of ways. The parent glass can be melted from metal organic derived materials to minimize the content of undesirable ingredients as disclosed in commonly assigned U.S. Pat. No. 3,640,093, the disclosure of which is incorporated by reference, or it can be melted from conventional high purity glassmaking ingredients.

Clearly, the presence of impurities can deleteriously affect the electrical performance of the doped silicon semiconductor device. Impurities specifically to be excluded or held at an absolute minimum are the oxides of the alkalis, i.e., Li.sub.2 O, Na.sub.2 O, K.sub.2 O, Cs.sub.2 O, or Rb.sub.2 O and other high vapor pressure components such as PbO, SnO.sub.2, and CuO.

After the glass compositions are melted and formed into a homogeneous molten mass, the glasses can be cast into any desired shape. Conveniently, this can be carried out by casting the glass into preheated graphite molds in the shape of right circular cylinders of a diameter approximating that of the finished diffusion disc. The glass can be permitted to cool and when cold the glass billet or cylinder is removed and inspected for flaws and then sliced into wafers usually ranging from 0.025 inches to 0.050 inches in thickness, although wafers having a thickness of up to 0.100 inches and above are employed in some applications. At this point, the glass wafers are in a form for conversion to a glass-ceramic. Alternatively, the glass billet or a core drilled section can be heat treated to form the glass-ceramic in which glass-ceramic is then sliced into wafers. Because of the very close control made possible by the present invention, a plurality of silicon elements can be treated by appropriate positioning of a plurality of glass-ceramic dopant wafers arranged in a boat as shown in FIG. 3.

In carrying out this aspect of the invention, the doping is accomplished by placing the glass-ceramic dopant chips near and parallel to, but not touching, the silicon wafer to be doped. Generally, for best results, the distance has been determined to be about 1/8 inch. In a multi-slotted fused silica boat or other refractory vessel, container or the like, as many as 100 or more silicon chips or wafers can be doped to a uniform level by alternately spacing a glass-ceramic wafer, and a pair of wafers in back-to-back contact with confronting faces, silicon wafers and glass-ceramic wafers, being substantially parallel. The general arrangement can be as shown in FIG. 3.

Time and temperature of doping conditions are selected to give the appropriate P-N junction depth and sheet resistivity for the desired device configuration. This is shown in the examples that follow.

Spacing of the chips in the boat and selection of ambient inert carrier gas and the flow rate are based on requirements that silicon chips facing in the direction of the ambient gas flow receive equivalent doping to those facing counter to the flow.

The invention will be further explained in the examples that follow wherein all percentages are in mole percentages and temperatures are in .degree.C. unless stated otherwise.

Conventional high purity batch materials are melted in a platinum crucible at 1540.degree. C. for 5 to 6 hours with manual stirring to yield a clear molten homogeneous glass having the following composition.

The molten glass is removed from the furnace and cooled to room temperature. The glass, still in the crucible, is transferred to an annealing oven maintained at 650.degree. C. The glass is annealed at 650.degree. C. for 1/2 hour and then removed and cooled to room temperature.

The crucible with the clear glass contents is placed in a heat treatment furnace and the temperature raised to 690.degree. C. The crucible is held at 690.degree. C. for 3 hours. The temperature is then raised to 805.degree. C. and the crucible is held at 805.degree. C. for 1 hour. The temperature is then raised to 1100.degree. C., and the crucible is held at 1100.degree. C. for 1 hour. The furnace is then turned off and allowed to cool to room temperature before removing the crucible. The resulting nonporous glass-ceramic material has a milky-white appearance. The glass-ceramic material is cored with a 11/2 inch diameter hole saw and sliced into thin wafers ranging in thickness from about 15 to 40 mils with a diamond saw.

Planar diffusion doping is accomplished by placing some of the glass-ceramic wafers of Part B about 1/8 to 1/4 inch from, and a parallel confronting relationship to, the silicon wafers to be doped. The glass-ceramic wafers and silicon wafers are arranged in multi-slotted, fused silica trays by alternately spacing a glass-ceramic wafer, and so on. The general assembly is as shown in FIG. 3.

The silicon wafers used in this example originally are N-type, and have a resistivity of about 9 ohm-cm.

The assembly is placed in a diffusion furnace and argon gas is passed therethrough as an inert carrier gas as shown in FIG. 3 at the rate of 500 cc/minute, while the doping period and temperature is maintained as indicated below.

At the end of this diffusion doping period, the silicon wafer is cooled to room temperature and cleaned with dilute hydrofluoric acid.

The surface of the doped silicon wafers exhibit P-type conductivity. Surface testing of the doped wafers with a four-point conductivity probe. The surface resistivities in ohms per square of the resulting doped silicon sample is set forth below as a function of temperature. The conductivity of the doped silicon is P type.

The dopant disc has not significantly slumped or otherwise deformed at the end of the diffusion doping process. When doping an N type germanium semiconductor according to the present invention, somewhat lower temperatures are employed because germanium melts at 937.degree. C.

Several more diffusion doping tests are conducted by the above procedure except that the time and temperature are varied as set forth below. In each case the doped silicon wafer exhibited P type conductivity.

Glass-ceramic dopant host wafers are prepared from glasses of the composition as set forth in the following Tables I and II. The procedure for melting and crystallizing the glasses are like those described in Example 1 except the temperatures are maintained as indicated in the Tables and the molten glass is quenched by casting as a slab into a shallow metal tray at room temperature rather than annealing as in Part A of Example 1. Table I concerns compositions wherein MgO is the only "RO" components and Table II illustrates various combinations of "RO" components.

An arbitrary "Sag Test" is reported in the table below. In this test, glass bars approximately 1/8 inch square and about 11/8 inch in length are prepared from the indicated glass and crystallized to a glass-ceramic body by the crystallization heat treatment indicated. After crystallization each glass-ceramic bar is ground to flatness on both sides so that the finished dimensions are 11/8 inch.times.1/8 inch.times.1/16 inch. Each glass-ceramic bar is then placed across a platinum vessel 7/8 inch wide, (with 1/8 inch dimension of the bar resting on the vessel) and held at a temperature ranging from 1000.degree. to 1250.degree. for 1/2 hour. The distance that the 1/16 inch thickness "sagged" or deflected from flatness gives an arbitrary indication of the resistance to thermal deformation. While the amount of thermal deformation or sagging that can be tolerated varies with sample thickness, doping time and doping temperature in any situation, a sagging of greater than about 0.3 mm in the above procedure approximately corresponds to the maximum allowable deformation for a very thin (e.g. about 20 mil thickness) doping wafer about 1-11/2 inches in diameter in doping assembly like that shown in FIG. 3. Thicker glass-ceramic dopant shapes can be employed for higher temperatures.

The data in the Tables indicates that the tendency for deformation increases with increasing temperatures although good thermal stability is observed for very thin glass-ceramic bars at temperatures in excess of 1050.degree. C. and even as high as 1250.degree. C.

To further demonstrate the principles of the present invention, several different barium aluminosilicate glass-ceramic dopant hosts are prepared and evaluated in doping by the methods of Example 1. The results are set forth below in Table III.

At the end of diffusion doping the thin dopant host wafers have not slumped or otherwise physically deformed to render them unsuitable for further diffusion doping process. Example 44 illustrates that an Al.sub.2 O.sub.3 /RO ratio of 1.48 is about 1.5 and within the scope of the present invention for the purpose of providing dimensional stability under doping conditions.