Fuel Injection Apparatus for Internal Combustion Engines

The invention relates to a fuel injection apparatus for internal combustion engines. The apparatus includes a control apparatus which produces an uncorrected injection pulse, in accordance, for example, with the aspirated air quantity per stroke, for the controlling of at least one injection valve of the engine. The apparatus also includes a correction frequency generator, for modulating the injection pulse for the injection valve, in accordance with the various operational parameters of the combustion engine.

Digital control apparatuses for fuel injection systems are capable of computing the injection time during which fuel is supplied to the cylinders of the internal combustion engine via electromagnetic injection valves, that is of computing the duration of the electrical pulses delivered to the injection vlaves. The duration is computed from the basic data regarding the air quantity aspirated by the internal combustion engine, and from crankshaft rpm. A so-called uncorrected injection pulse is formed from these basic data. This uncorrected injection pulse is still dependent upon further operational parameters of the internal combustion engine, for example, temperature. It is, moreover, still not attuned to the various conditions present, for example, during idling, partial load operation, and full load operation. This attuning to the cited and to other operational parameters is accomplished with a correction apparatus, which adjusts, to a geeater or lesser extent, the uncorrected injection pulse in accordance with the given operational parameters. The corrected injection pulse is commonly still further processed by a correcting circuit for a battery voltage dependent compensation of the injection pulses. Subsequent thereto, the injection pulses are delivered in their final form to the injection valves of the internal combustion engine via the distribution and amplifier stages, where they determine the injection time, i.e., the fuel quantity to be injected per stroke.

It is a principal object of the invention to provide a correction apparatus which generates a correction frequency signal for the correction of the uncorrected injection pulse from a multiplicity of data present in digital form, wherein the formation of the correction frequency signal shall proceed rapidly, and wherein the expenditure for the circuitry required shall be kept exceedingly low.

This object is achieved, according to the invention, by the fact that the correction apparatus possesses auxiliary storage registers for the reception, from a main storage register, of information present in digital form, and the fact that the auxiliary storage registers are interconnected to numerical frequency converters, which produce the correction signal at the correction frequency from the information stored in the auxiliary storage registers.

Further advantageous configurations and appropriate refinements of the invention will become evident, in conjunction with the claims, from the following description of an examplary embodiment, and from the associated drawings.

FIG. 1 is a fundamental block diagram of a fuel injection apparatus.

FIG. 2 is a block circuit diagram of the correction apparatus of FIG. 1.

FIG. 3 is a detailed block circuit diagram of a numerical frequency converter of FIG. 2, and

FIG. 4 is a detailed block circuit diagram of a serial counter of FIG. 2.

FIG. 1 depicts a digital control apparatus 10 for a fuel injection apparatus. The digital control apparatus is commonly called the main computer. This main computer 10 produces an uncorrected injection pulse from, for example, a signal corresponding to the given revolutions per unit time and from an air quantity signal that is proportional to the air quantity aspirated by the internal combustion engine. The air quantity signal is commonly formed with the aid of a barrier flap 11 and a potentiometer 12, wherein the barrier flap is disposed within an intake suction tube 13 of the combustion engine, and is deflected more or less energetically in correspondence to the given aspirated air quantity, the barrier flap in turn displacing the wiper of the potentiometer 12. The signal extractable at the wiper of the potentiometer 12 is thus proportional to the given aspirated air quantity.

The present fuel injection apparatus also possesses a fixed value storage register 14 commonly designated as a ROM (read only memory), which stores, in digital form, various operational parameters of the combustion engine. From the multiplicity of the stored operational parameters in the ROM 14, a correction apparatus 15, commonly called a correction computer, forms a correction frequency fK, which is brought to the main computer 10, and which corrects the uncorrected injection pulse in accordance with the data magnitudes stored in the ROM 14. The corrected output signal of the main computer 10 is further conducted to a circuit 16 for the corrective compensation of the injection pulse in accordance with the given battery voltage in the electrical wiring system of the motor vehicle. The injection pulse is next applied to the working winding 17 of a schematically represented injection valve 18, which determines the fuel quantity delivered to the combustion engine by opening for the given duration of the injection pulse.

FIG. 2 represents the correction computer 15 in a block diagram. The correction computer 15 includes a first auxiliary storage register 19, which can consist, for example, of a 2 by 8 bit shift register. This auxiliary storage register is connected to a first numerical frequency converter 20, which receives a constant frequency fZ. Directly preceding the first auxiliary storage register 19 is a switching logic circuit 21, which can connect the first auxiliary storage register with a data bus line 22, via which digital information can be transferred by a multiplexing operation from the ROM 14 depicted in FIG. 1, to the first auxiliary storage register 19. The first switching logic circuit 21 must be controlled by a multiplex rate pulse via a control input 23.

Information in digital form, concerning the mutually independent regulation times of a starting enrichment and of a post starting enrichment of the fuel-air mixture delivered to the combustion engine, can be stored in the first auxiliary storage register 19. Both kinds of information can be required at the same time. By means of the dual multiplexing operation of the numerical frequency converter 20, as well as of a counter 24 interconnected downstream, it is possible to have both regulation processes progress independent of one another. Alternatively, information about the regulation of the air number .lambda. of the fuel-air mixture delivered to the combustion engine can additionally be stored in the first auxiliary storage register 19. The first numerical frequency converter 20 now forms a counting frequency fZF1 for the starting enrichment and the post starting enrichment regulation, wherein the counting frequency fZF1 is conducted to a serial counter 24. The first numerical frequency converter 20 is additionally connected with the serial counter 24 via a sign digit control line; this sign digit control line is, however, only required in conjunction with the still to be described regulation process of the air number .lambda..

A second auxiliary storage register 25 which can, for example, also be constructed as a 2 by 8 shift register, is assigned to the serial counter 24. Information about a temperature dependent initial magnitude of the starting enrichment and of the post starting enrichment of the fuel-air mixture for the combustion engine is stored in this second auxiliary storage register 25. To facilitate the transfer of digital information stored in the ROM 14, the second auxiliary storage register is connected to a second switching logic circuit 26, which likewise connects the second auxiliary storage register 25 in a multiplex operation with a data bus line 22, wherein a multiplex pulse is applied to the control input 27 of the second switching logic circuit 26. The serial counter 24 produces a time dependent number, which appears at its output, and which is conducted to a second numerical frequency converter 28. This second numerical frequency converter 28 is connected with a third numerical frequency converter 29 having a third auxiliary storage register 30, which can, for example, be constructed as an 8 bit shift register; information regarding a starting enrichment or a warm running enrichment of the fuel-air mixture for the combustion engine can be stored in this third auxiliary storage register. These two magnitudes are alternatively storable, since they are not needed simultaneously. To accomplish the storage of the information in the third auxiliary storage register, a third gating circuit 31 is provided, which connects the third auxiliary storage register 30, in a multiplex operation, with the ROM 14 via the data bus line 22, so that the given requisite data can be received at a control input 32 of the third switching logic circuit 31, controlled by a multiplexing pulse rate. The third numerical frequency converter 29 thus forms a variable output frequency fK from the input frequency as a function of the storage register content of the third auxiliary storage register 30, which output frequency fK constitutes the correction frequency, and which is conducted to the main computer 10, according to FIG. 1.

The input frequency signal of the second numerical frequency converter 28 is supplied by a fourth numerical frequency converter 33, to which a fourth auxiliary storage register 34 is assigned, which can likewise be constructed as an 8 bit shift register. Data pertaining to an idle running apportionment, a partial load apportionment, and a full load apportionment of the fuel-air mixture delivered to the combustion engine can be stored in this fourth auxiliary storage register. The fourth auxiliary storage register 34 is connectable with the data bus line 22, and thereby with the ROM 14, via a fourth gating circuit 35, for the reception of data, wherein a multiplexing pulse rate can be applied at a control input 36 of the fourth switching logic circuit 35. Thus information respectively concerning the idle running apportionment, the partial load apportionment, and the full load apportionment is alternatively stored in the fourth auxiliary storage register 34, since these various data are not needed simultaneously. The numerical frequency converter 33 thus forms an output frequency from a constant input frequency fE, in accordance with the information stored in the fourth auxiliary storage register 34, which output frequency is transmutable by the information just stored in the fourth auxiliary storage register 34.

The input frequency fE, which is constant in this exemplary embodiment, can also be switchable to other frequencies, and can thereby produce a favorable interaction possibility for a further consideration of other correction quantities.

The numerical frequency converters 28, 29, 33 differ from the numerical frequency converter 20 in that they are only equipped with an 8 bit shift register, and that they do not possess any sign digit control.

In the exemplary embodiment according to FIG. 2, four numerical frequency converters are provided, whose auxiliary storage registers are controlled, and supplied with data, in a multiplex operation. In the depicted exemplary embodiment, according to FIG. 2, a dual multiplex operation of the first numerical frequency converter 20, as well as of the serial counter 24, is therein additionally provided. One thus acquires the possible option that two counting processes that are chronologically independent of one another can proceed in both of the switching circuits. This fact can be advantageously exploited for the chronological regulation of a post starting enrichment as well as of a starting enrichment, or alternatively for a .lambda. regulation apparatus having a short and a long integration time. However, it is possible without difficulty, and it is viewed as lying within the framework of the present invention, that the number of numerical frequency converters be reduced and that the multiplexing frequency be correspondingly increased, so that the then remaining numerical frequency converters and the associated auxiliary storage registers are utilized more frequently at a higher multiplexing rate.

In regard to the method of operation of the exemplary embodiment according to FIG. 2, the following is, in particular, still to be mentioned: The first numerical frequency converter 20 delivers, as was already further indicated above, counting frequencies for the regulation of the post starting enrichment and the starting enrichment, as well as the counting frequency and the FORWARD-BACKWARD control of the serial counter 24 in the regulation of the aix number .lambda. of the fuel-air mixture delivered to the combustion engine. The serial counter 24, interconnected at the output of the first numerical frequency converter 20, undertakes the chronological regulation of the post starting enrichment and the starting enrichment, and in its stationary condition, that is to say whenever no correction factors relating to a regulation of a starting enrichment and a post starting enrichment are present, the serial counter 24 acts as a regulator for the regulation of the air number .lambda., because the serial counter 24 can then be conveniently employed as a regulator possessing an integration behavior. The expenditure for the correction computer 15 is therewith decreased noticeably, because the .lambda. regulation is, in any case, only effective whenever no corrections concerning the post starting enrichment and the starting enrichment are needed. In addition, the possibility exists that large and small integration time constants for the regulation apparatus for the regulation of the air number .lambda. can be obtained, wherein these data are storable in the first auxiliary storage register 19. The regulation apparatus can then be utilized in conjunction with the large time constant for the regulation of the long term drift of the outer components, for example, of the injection valves, or else it can undertake a correction of the fuel-air mixture in accordance with the given barometric magnitude. The regulation apparatus is operated, on the other hand, with the small time constant whenever the customary disturbances in the composition of the fuel-air mixture are to be eliminated by means of the regulation.

A time dependent number is available at the output of the serial counter 24. The second numerical frequency converter 28 interconnected at the output of the serial counter 24 thus now adds the correction factors supplied by the serial counter 24 and converts the sum into a signal of proportional frequency. The input frequency of the second numerical frequency converter 28 is also already conditioned by the information concerning the idle apportionment of the fuel-air mixture; this information is processed in the fourth numerical frequency converter 33 under the influence of the constant input frequency fE, which, in addition, can be switchably alterable. The output frequency of the second numerical frequency converter 28 is conducted to the third numerical frequency converter 29, which then in turn varies the input frequency in accordance with the information stored in the third auxiliary storage register concerning a starting enrichment or a warm running enrichment of the fuel-air mixture, and which therewith forms the correction frequency fK. The correction frequency fK represents the product of temperature dependent factors, temperature dependent and time dependent factors, as well as apportionment factors for the post starting enrichment, the starting enrichment, the idle running apportionment, the full load apportionment, the partial load apportionment, and for the air number .lambda. regulation.

The selection of the alternative data, for example that concerning either a starting enrichment or a warm running enrichment, and either an idle running apportionment or a partial load apportionment or a full load apportionment, takes place during the storing of the auxiliary storage registers by means of an address control apparatus, which, in turn, is influenceable by means of switching positions, for example of an idle running switch or of a full load switch, or by means of programmable temperature thresholds or equivalent data.

FIG. 3 is a detailed representation of the first numerical frequency converter 20. A principle component of this first numerical frequency converter 20 is the serial adder 37, and a shift register 38 connected in parallel with the serial adder 37, which shift register 38 can, for example, be constructed as a 2 by 8 bit shift register. The output of the serial adder 37 is connected to the input of the shift register 38 via an EXCLUSIVE OR gate 39, and the output of the shift register 38 is connected to the first input of the serial adder 37 via an EXCLUSIVE OR gate 40. An AND gate 41 precedes the second input of the serial adder 37, the first input of the AND gate 41 is connected to the first auxiliary storage register 19 depicted in FIG. 2, and the second input of the AND gate 41 is connected to a synchronizing apparatus 42.

The method of operation of this principal component of the numerical frequency converter 20 shall be elucidated in the following: The shift register 38 encompasses a given desired number of storage locations; in the shift register 38 of the present case 2 by 8 bits are provided. The number of storage locations determines the maximal word length which the shift register 38 can accommodate. Since this circuit works in a dual multiplex operation, two mutually independent numbers, each having a maximal word length of 8 bits, result herefrom. The storage locations of the shift register receive a shift pulse signal, and the register content of the shift register 38 is shifted along by one position with each such shift pulse, so that, at any given time, the word contained in the shift register reaches the first input of the serial adder 37 with a repetition frequency of

namely with its least important bit, called LSB (least significant bit) in the following. Concurrent with this time point, a word contained in the first auxiliary storage register 19 can then also appear at the second input of the serial adder 37, whenever the AND gate 41 is opened. The sum of the words A and B, which are stored, respectively, in the shift register 38 and in the auxiliary storage register 19, then appears as the serial counting result at the summing output of the serial adder 37 at the rate of the shift pulse frequency. The serial counting result is also present in a parallel form in the shift register 38 at the time at which the LSB of the word in the shift register 38 appears at the first input of the serial adder 37, and it can also be retrieved, though only at this time, in its parallel configuration. For this purpose a reference rate pulse is required, which appears during the LSB timepoint at the first input of the serial adder 37, or at the MSB (most significant bit) timepoint at the summing output of the serial adder 37, and which reference rate pulse can be extracted from the system. This reference rate pulse is also required particularly when, during the repeating addition (the content of the shift register, after all, recirculates continually at the shift pulse frequency), the capacity of the numerical frequency converter 20 is exceeded. In the event that a CARRY appears at the MSB timepoint at the summing output of the serial adder 37, the CARRY obtained for a full shift register component must be extracted or diverted by the reference rate pulse, in order that no erroneous addition of the CARRY to the LSB shall result. It is to be noted that the register capacity is only 2 to the eighth power, due to the dual multiplex operation, even through 16 shift register cells are provided. Thus a CARRY also takes place for a full 8 bit shift register component, whenever the capacity 2 to the eighth power is reached or exceeded. For the case where the capacity is exceeded at both register components (this is only possible in the multiplex raster, that is to say, chronologically sequentially,) two overrun pulses are then also generated, which are mutually offset by eight shift pulses. The required reference pulse thus repeats periodically after each eighth shift pulse. The extracted CARRY at the serial adder 37, or the sum of the CARRYs during a definite time interval, can be viewed as a signal frequency, which results from the information respectively stored in the shift register 38 and in the first auxiliary storage register 19. The relative distribution of these CARRY signals during the given time span is of subordinate significance. The CARRY pulses which appear at the output of the serial adder 37, respectively at the output of the AND gate 43 which serves for the referencing of the CARRY pulses at a reference pulse rate, are dependent, as already indicated, upon the storage register contents of the first auxiliary storage register 19. In addition, the register capacity of the shift register 38 and the initial value in the shift register 38 also exert an influence. The output of the AND gate 43 connects to a bistable flip flop stage 44 or a delay stage, which serves to create a running time equalization relative to the serial adder, and concurrently serves to synchronize the CARRY pulses with a given specified pulse rate.

Since, according to FIG. 3, the numerical frequency converter 20 shall also accomplish a sign digit control for the counting pulses appearing at the output of the bistable flip flop stage 44, a sign digit control, which encompasses the EXCLUSIVE OR gates 39, 40, 45 is provided. However, the sign digit control is only active when the circuit is operated as an air number (.lambda.) regulating apparatus.

The formation of the counting pulses takes place in the following manner: The word stored in the first auxiliary storage register 19 is continuously added at the shift rate to the initial register value of the shift register 38. The content of the shift register 38 increases linearly, wherein the slope depends upon the word in the first auxiliary storage register 19. When the sum is larger than the maximal word length possible, an unequivocal 1/0 transition of the MSB results, as was already further explained above. This transistion is used as a counting pulse, and is conducted on to the serial counter 24 according to FIG. 2, via the bistable flip flop stage 44. The shift register 38 is concurrently reset to the initial value. If a word is continuously subtracted from this initial value at the frequency of the shift pulse, the content of the shift register 38 decreases continuously. When the difference is less than zero, an unequivocal 0/1 transition results, which is evaluated as a counting pulse and which resets the shift register 38 to the initial value. This cited initial value is not constant, but rather depends upon the overrun remainder. Herein the EXCLUSIVE OR circuit 45 forms the sum from 128 + overrun remainder during a positive overrun (1/0 transition). This value is then the new initial value. During a negative overrun (0/1 transition), the difference of 128 - overrun remainder is used as the new initial value.

As already further indicated above, the AND gate 41 is respectively switched open and closed by a synchronizing apparatus 42. The word stored in the first auxiliary storage register 19 is thereby multiplicatively combined with the release frequency delivered by the synchronizing apparatus 42, by means of the subsequent processing in the serial adder 37. However, it is to be noted that the release frequency of the synchronizing apparatus must be at least as long as one shift length of an 8 bit shift cycle, since otherwise falsification of data appears during the combining process.

The synchronizing apparatus 42 has the task of bringing various input signals, which are conducted to this synchronizing apparatus, into a multiplex pattern, that is to say, into the multiplex pulse rate. Therewith the sequence for the computation of the time dependent factors for the starting enrichment and the post starting enrichment, as well as for the short integration time constant in the air number .lambda. regulation and for the long integration time constant in the air number .lambda. regulation is unequivocally defined. Input signals for synchronizing apparatus 42 consist of the conditioned probe voltage of an oxygen trace constituent sensor (not shown) disposed within the exhaust system of the combustion engine, wherein the air number .lambda. probe voltage is conditioned in a limiting apparatus not here shown, and thus delivers a digital switching signal U.lambda. for the count control of the first numerical frequency converter 20 and for the serial counter 24 interconnected to the output of the numerical frequency converter 20, fixed frequencies which are diverted from a central main divider and which determine the minimal regulation times for the post starting enrichment and the starting enrichment, a signal corresponding to the revolutions per unit time wherein the frequency of the revolutions per unit time determines the minimal possible integration time constant of the air number .lambda. regulation apparatus, and a counting frequency which determines the minimal possible integration time constant of the long term air number .lambda. regulation.

After describing the method of operation of the first numerical frequency converter 20, the method of operation of the serial counter 24 interconnected to the output of the numerical frequency converter 20 and the method of operation of this circuitry in the regulation of the air number .lambda. shall once more be taken up in the following: With every counting pulse of the first numerical frequency converter 20 lying in the multiplex raster of the post starting enrichment, the initial value of the digital information concerning the post starting enrichment is increased by 1, until the register state has reached a given number Z.sub.max. Therewith the regulation process is completed, that is to say, the post starting enrichment is shut off. The recognition of the state where the regulation equals the maximal number Z.sub.max takes place within a level recognition logic circuit 60 according to FIG. 4. When the factor for the post starting regulation is larger than, or equal to, the given number Z.sub.max, then the level recognition logic circuit 60 delivers at its Z.sub.max output an L-signal. This L-signal preemptorily switches the counting direction of the serial counter 24 to the BACKWARD counting mode via the UP/DOWN control. Herewith the register value oscillates in the regulated condition about the values Z.sub.max and Z.sub.max - 1. It is advantageous in this apparatus, that during a disturbance of the post starting regulation, wherein the regulation factor is greater than Z.sub.max, after a certain regulation interval the value Z.sub.max - 1 once again stands in the shift register. This fact yields an automatic error correction. The regulation of the air number .lambda. is hence only operative when a signal S, which turns the regulation of the air number on, is available, and the post starting enrichment and the starting enrichment have been regulated. Furthermore, the value in the second auxiliary storage register 25 of the serial counter 24, namely the value Z.sub.max or the value Z.sub.max - 1, serves as the initial value for the regulation of the air number .lambda.. During the operation of this .lambda. regulation apparatus, a maximal register state must not be exceeded additively, and a minimal register state must not be exceeded subtractively. This level limiting of the .lambda. regulation region likewise takes place by means of the level recognition logic circuit 60. The switching of the regional limits for the .lambda. regulation is likewise effected by the signal S.lambda..

When the serial counter 24 is operated as a regulation apparatus with a small integration time constant, then the regulation apparatus is directly controlled by an oxygen measuring probe disposed in the exhaust current of the combustion engine, wherein the counting frequency determining the integration time and the sign digit control is, as already further elucidated above, delivered by the first numerical frequency converter 20. An integration of the small time constants for the .lambda. regulation is herein achievable by means of the integration time determining information of the addition frequency of the first numerical frequency converter 20, wherein a proportionality relation to the revolutions per unit time is taken into account. The regulation stroke for the .lambda. regulation operation can be freely chosen. The regional limits are therein formed by means of Z.sub.max 1 and Z.sub.min 1.

When the serial counter 24 is operated as a regulation apparatus having a long integration time constant, then the regulation stroke is limited by the regional limits Z.sub.max 2 and Z.sub.min 2. The switching of the regional limits Z.sub.min 1 and Z.sub.max 1, as well as of Z.sub.min 2 and Z.sub.max 2, takes place in the level recognition logic circuit 60, by means of the time multiplex pulse .phi.2, or the complementary .phi.2. The .lambda. regulation having a long time constant is normally not operative whenever the working region of the .lambda. regulation having the short integration time constant lies within the regional limits.

Not until the .lambda. regulator having the short integration time constant arrives in the limiting region is the basic integrated varied by means of the .lambda. regulation having the long time constant, therewith accommodating the .lambda. regulator having the short integration time constant in such a manner that it operates approximately in the middle of the regulation region. The overrun signals from the level recognition logic circuit 60, which originate during the multiplex duration for the .lambda. regulation having the short integration time constant, are correlated in the OR gate 56, and are stored in the synchronizing logic 42 in the multiplex raster for the long integration time constant, and serve as counting pulses and sign digit pulses for the .lambda. regulation having the long integration time constant. The time constant of the regulation having the long integration time constant is, therefore, dependent upon the frequency of the overruns. The time constant can additionally be made variable, by virtue of the combinatory linkage of the overrun frequency with the programmable number during the long integration time constant in the first numerical frequency converter 20.

FIG. 4 depicts a detailed block circuit diagram of the serial counter 24. The serial counter 24 possesses, as does the first numerical frequency converter 20, a serial adder 46 with the second auxiliary storage register 25 interconnected thereto in parallel. The method of operation of the serial adder 46 and the second auxiliary storage register interconnected in parallel corresponds in principle to the method of operation of the serial adder 37 and its parallel shift register 38 of the first numerical frequency converter 20, and is, therefore, not again described in detail. Beyond the foregoing, according to FIG. 4, the serial counter 24 additionally features a FORWARD-BACKWARD counter control having an EXCLUSIVE OR gate 47 and an EXCLUSIVE OR gate 48. The method of operation of the level recognition logic circuit 60 has already been illustrated. Additionally, an AND gate 49, an OR gate 50, and a bistable flip flop stage 51 are provided for the sign digit control. The function of the sign digit control is to cause the serial counter 24 to count FORWARD via the FORWARD-BACKWARD counter control 47, 48 whenever a LOGIC 1 appears on the line Z.sub.min of the level recognition logic circuit 60, and to cause the serial counter 24 to count BACKWARD whenever a LOGIC 1 appears on the ling Z.sub.max. Finally a SET logic having an AND gate 52 is additionally provided, with the aid of which an initial word number for the loading of the second auxiliary storage register 25 can be inserted during an excessively strong drop of the output value for the .lambda. regulation in the case of a disturbance of the content of the register 25. Finally provided is a logic function using an OR gate 53 for the acquisition of the counting pulses for the .lambda. regulation having a long integration time constant.

In addition, the serial counter 24 is provided with an inverter stage 54, and AND gate 55, and an OR gate 56 for the blocking of the serial counter 24 during the starting phase of the combustion engine, since during this phase no interaction by the serial counter 24 is required, since none is desired.

The illustrated correction apparatus collectively possesses the following advantages: By means of a similar circuit structure and of the possibility of utilizing dynamic shift registers, the concept is well suited for a large scale integration. Finally possibilities exist for interaction with additional correction factors, which can be combinatorily linked in a multiplicative mode with the cited existing factors, for which added use no particular additional effort is required.

The just described correction computer 15, according to the invention, can also be utilized with particular advantage for altitude correction in a fuel injection apparatus for combustion engines, and in particular when the correction computer 15 also encompasses an air number .lambda. regulation, that is to say, when a so-called oxygen probe is disposed within the exhaust system, which oxygen probe, as already mentioned herein previously, participates jointly in the determination of the duration of the fuel injection pulses to be conducted to the combustion engine. In this case, the composition of the exhaust gases can be regulated to possess a minimal content of noxious substances even at high altitudes by means of an expansion of the .lambda. regulation region.

It is fundamentally appropriate, that during the operation of a motor vehicle, powered by a combustion engine, at altitudes above approximately 1000 meters, the possibility of an altitude dependent correction of the injection time computed by the fuel injection apparatus be anticipated, since due to the altered specific weight of the air, the O.sub.2 constituent for the computed injection quantity will otherwise be too small. If a separate transducer is here utilized, then the injection time ought to be decreased respectively by 5% per 1000 meters of altitude, or, therefore, by 15% at 3000 meters. This additional correction can be then undertaken by an asymmetrically expanded .lambda. regulation region, when one takes into consideration that during the "cold phase" of the .lambda. regulation the mixture becomes too rich, and is only made leaner when the .lambda. probe temperature is reached. For that reason an additional lean-making region of approximately 15% must be provided, wherein the mixture is then kept constant independent of the given altitude by means of the .lambda. probe or oxygen probe. A given time constant provided for this purpose is substantially greater than the regulation time constant, that is to say, onto the normal .lambda. time constant for, for example, a +/- 5% stroke, there is superimposed in the regulation a substantially greater time constant for the long term variation, for example for the altitude operation. Thus the effect is obtained wherein the basic integration is varied by very large time constants, whose order of magnitude can, for example, comprise minutes, by means of the .lambda. probe, and wherein the intrinsic .lambda.-correction having a normal, short time constant is superimposed thereon.