Brief Description of the Drawings
FIGS. 1A-1C together represent a flow diagram illustrative not only of operation of the system but also its elements, interconnecting portions of the diagram being indicated by alphabetic characters;
FIG. 2 is a symbolic representation of a data base of a central processor system of the invention;
FIGS. 3A-3D together constitute a schematic diagram of circuitry of a remote unit of the invention, circuits, interconnections being identified by the alignment of leads.
Corresponding reference characters indicate corresponding elements throughout the several views of the drawings.
Description of the Preferred Embodiments
Referring to FIG. 1A, indicated at 11 is one of a plurality of electronic remote units of the present security system. Each remote unit 11 is located at the corresponding premises of a subscriber to the system which premises are relatively remote, e.g., geographically separated by up to many miles, from central digital processor facilities of the present security system, there being no interconnection between any of the remote units 11 and the central processor facilities except through a common carrier communications link 13 (such as a telephone circuit) explained below.
Each remote unit 11 includes circuitry 15 for interrogating each of a plurality of switch-type sensors 17 positioned suitably on the subscriber's premises for detecting any of various alarm conditions such as intrusion, fire, heat, water, etc. The purpose of such interrogation is for detecting whether any of the sensors 17 has changed from a normal status to a tripped status, such tripped condition resulting from occurrence of an alarm situation (alarm condition). Within the block designated 18 is communications initiation means, e.g., an automatic telephone dialer, operative upon detection of such change in sensor status, for initiating the establishment of communications link 13 between one of the possibly several input ports 19 of the central processor system and remote unit 11.
At 21 is a memory of remote unit 11 which serves as means for storing sensor data signifying the address (i.e., location on the premises) and tripped status of each of sensors 17 which have been tripped. An encoder shown at 23 serves as means for encoding, when enabled, said stored sensor data in a digital format suitable for transmission over communications link 13. Circuitry within block 15 serves constitutes message initiation means, operative upon establishment by dialer 18 of communications link 13, to enable encoder 23 for transmitting said stored sensor data as a sensor alarm data message to the central processor system over link 13.
The central digital processor system which is preferred is of the type generally disclosed in Amdahl et al. U.S. Pat. No. 3,400,371, entitled "Data Processing System" herein incorporated by reference and more preferably an improved data processing system such as System/370 models 145, 155 II, 158, 165 II, or 168, commercially available from International Business Machines Corporation. For this purpose, it is preferred to use an Information Management System/Virtual Storage (IMS/VS) control system in order to implement the present invention when employing one of the above models, but others may be used.
Referring again to FIG. 1A and also to FIGS. 1B and 1C, the central processor system includes a suitable decoder 25 for decoding the data received over link 13 and for converting it to an electronic format compatible with the processor system. At 27 is shown a data communications facility serving as symbolic program linkage between the communications terminal constituted by decoder 25 and the remainder of the processor system.
The received sensor alarm data message flows from facility 27 to a message scheduler 29 serving as a message processing region or partition of the processor system for defining message priority, size, or class. In this way priorities can be set for different types of data messages in the event of high data message activity. Such operation will be understood by those skilled in the art of using advanced digital processing systems.
A common service facility 31 makes the incoming data available to both a system log 33 and to a message queue 35. Thus the input data is both logged and queued for further processing. This arrangement provides message storage means for storing the sensor alarm data message. It may be noted that all input (and output) messages are electronically written in log 33 to ensure an ability to preserve data, and ensure an ability to restart the system, in the event of a system failure, such as loss of power, or in the event of deliberate processor system shutdown.
Processing by the processor system of the sensor alarm data message is deemed to begin in FIG. 1A at the input designated 37. It should here be understood that various data transactions may be taking place within the processor system. For this purpose, a sensor alarm data message arriving at input 37 is deemed an emergency message. A determination then results at decision point 39 as to whether the received data represents an emergency message transaction. If the determination is "no," the processor system continues processing other transaction types as shown at 41.
If the determination at 39 is "yes," control of the emergency message (i.e., the sensor alarm data message) is released as indicated at 42 to Data Language/I (DL/I), a data management facility through which the IMS/VS control system is adapted to the data requirements of the present security system. DL/I, designated at 43, provides the present crime and fire, etc., prevention application program 45 with a facility to use a crime and fire, etc., customer (subscriber) data base 47 as described below. DL/I can also be used to assist in the creation and maintenance (e.g., updating of subscriber information) of data base 47, as well as for other purposes which will be understood to those skilled in the art of using advanced digital processing systems such as those identified above and similar types.
Data base 47 is provided by electronically storing segments of preselected data associated uniquely with corresponding subscriber remote premises. Referring to FIG. 2, data base 47 is shown to include for each such subscriber (customer) a record including an identification number 49, the subscriber's name and address 51, police district 53, fire district 55, as well as various parameters 57 which are helpfully descriptive of the subscriber's premises and location on the premises of the various sensors 17. For example, a heat sensor location in a bedroom on the third floor, or a door intrusion sensor in the basement may be so identified.
Once into the security program 45, the sensor alarm data message undergoes several decisional processing steps, herein referred to simply as determinations. Thus, referring again to FIG. 1B, a determination is made at 59 as to whether the message indicates a fire. If "yes," the program initiates (as shown at 61) a call to data base 47 to get the customer's data base record for further processing as described below.
If the message does not indicate a fire, a determination is made at 63 as to whether it indicates an intrusion. If It does, the program initiates a data base call as shown at 61. If it does not, a determination is then made at 65 as to whether the message indicates that presence of water has been sensed. If the message so indicates water, a data base call is initiated as shown at 61. If it does not so indicate, a further determination is made at 67 as to whether the data signifies some other alarm occurence (e.g., excessive heat, overpressure and so forth). If so, a data base call is initiated as shown at 61.
Assuming that one of the above determination results in a data base call 61, further determinations are made by the program with the use of the data base record. At 69 a determination is made (by comparison of the alarm message with the data base) of whether the floor number identified in the alarm message as the location of the sensed alarm occurence is logically valid. For example, a reported intrusion on the third floor could be valid if the premises from which the message was received is indicated in the data base as having an intrusion sensor on the third floor of the premises but would not be valid if the data base held no record of an intrusion sensor on third floor.
Then, if the transmitted floor message input is determined to be valid, a determination is made at 71 as to whether the switch (sensor) number input is logically valid on the basis of the switch (sensor) numbers in the data base. If so, a further determination is made at 73 as to whether the location or address of the sensor (e.g., "hallway No. 3 sensor") matches information in the data base. If so, a further determination is made at 75 as to whether the type of alarm occurence reported by the data message corresponds to the type of sensors which the data base indicates are present at the premises.
If the answer to any of determinations 69, 71, 73, or 75 is "no," a corresponding appropriate error message action 77, 79, 81 or 83 is taken. Such error messages signify, for example, that a malfunction has occurred in the sensors of a customer or elsewhere in the remote unit, for example. All such error messages are electronically written by the program to a message queue 85 from which they can be sent to the master terminal operator (or elsewhere) for notifying the customer or service personnel of the malfunction.
If the answer to each of determinations 69, 71, 73, and 75 is "yes," the program moves the customer's name and address to output message format as shown at 87. Then the program moves the time, date and emergency (alarm occurrence) type to message format as indicated at 89. Finally, it moves a police and/or fire destination terminal number to output message format as signified at 91 for further processing.
Note that if the determination at decision point 75 is "yes," a further determination is made at 95 as to whether the alarm data message signals that an intrusion has been made. If "yes," further steps are taken as shown in FIG. 1C.
Referring to FIG. 1C, a first such step 97 is to set a message intrusion counter to the processing system to zero. Then, as indicated at 99, the customer's name and address are moved to output message format. Next, the time, date and type of emergency (alarm occurrence type) are moved to output message format, as shown at 101. Finally, at 103, a police destination terminal number is moved to output message format.
The completed message is written, as represented at 105, to a message queue 107 for further processing described below. When the message is written to queue 107, a count of one is added to the intrusion counter, as indicated at 108, whereupon the program is structured as represented at 110 to go back to point "B" (See FIG. 1B) of the program to see if there are any additional messages to be processed, the intrusion counter being incremented accordingly.
From message queue 107, messages flow conventionally to a common service facility 109 and thence to a message scheduler facility 111 for delivery to a message terminal operator 113. Receiving of the alarm, i.e., emergency message is indicated at 115. The terminal operator starts a remote terminal line as shown at 117. Then, data communications facility message transmission occurs as represented at 119.
A police department is illustrated at 121 as receiving the alarm message report, here represented at 123 as an intrusion message report. For this purpose, police department 121 may have a conventional on-line printer terminal.
It should be understood that if the alarm message is of a nonintrusion type, i.e., a fire, heat, water, etc., message, then the alarm message report would be sent to a fire department instead, but in a manner identical with that just described. Such nonintrusion alarm message reports may be provided simultaneously also to a police department.
Although the intrusion message report is shown at 123 is represented as showing the name and address of the customer, as well as the date and times of intrusions sensed, it will be apparent that other information may additionally be reported, such as specific locations of the tripped sensors, or additional customer data such as type of premises and other especially useful types of information in data base 47.
Referring to FIGS. 3A-3D, circuitry of a remote unit 11 of the system is shown in detail. In the interest of clarity, not all of the various conventional power supply or similar connections are illustrated.
The various circuits and logic devices described herein may be advantageously comprise monolithic integrated circuits. While integrated circuit devices of discrete commercial types as described may be employed, it will be apparent that circuitry as described herein may be of the large scale integration (LSI) type.
Various logic gates or digital devices of the type described herein having outputs which are logical functions of the inputs thereto are said to supply an output signal when the respective output or input is at a first distinct voltage or current level (a "1" state) as opposed to a second distinct voltage or current level (a "0" state). Positive logic is assumed.
Two sensor switches ("Sensors") SS1 and SS2 are shown in FIG. 3B. These are but two of the many possible sensors, a convenient maximum number for this configuration of the remote unit being one hundred forty-four. Such sensors may be of either normally-open (n.o.) or normally-closed (n.c.) types, it being understood that the respective sensor is moved from its normal position or status and thus attains a tripped status or condition in response to occurence of an alarm condition.
One side of each such sensor SS1, SS2 is connected to either the inverting or noninverting input of a corresponding operational amplifier A1, A2, depending upon whether the sensor type is n.c. or n.c. A suitable d.c. potential +V is supplied to the other side of the respective sensor.
Each of the sensors has identical logic circuits associated with it, as is suggested by dotted-line portions of circuits associated with sensor SS2. Thus only circuits associated with sensor SS1 are described in detail. Operation of such logic circuits is described below, since it is appropriate first to consider certain circuit features for interrogating the sensors.
The interrogation circuits include a source CL1 of clock pulses constituted, for example, by an astable multivibrator oscillating at a suitable frequency such as 150Hz. Such pulses are gated through a 2-input AND gate G1 to the first of a chain of two 4-bit binary counters CN1A and CN1B.
Logic decoder circuits including a pair of logic-inverting amplifiers N1A and N2A and a 4-input AND gate G2A are connected across the outputs of counter CN1A for resetting it to zero upon counting the 13th pulse. An identical reset circuit is connected to counter CN1B. Hence, the counter chain may count to a total of 144.
The counter outputs are made available at 301 for interrogating memory circuits described below and are also supplied to respective data bus drivers DR3-DR10 (constituted by inverting amplifiers for the purpose of sending interrogation addresses to the sensors and their co-located associated logic circuits (hereinafter "sensor circuits") it being understood that such sensors and associated circuits may, if desired, be located on the premises at considerable distance from the interrogation circuits and other portions of the remote unit, and the logic circuits may be in the form of self-contained modules.
Associated with the above data bus drivers are additional data bus drivers DR1 and DR2. Driver DR2 transmits to the sensor circuits a signal SENSE INTRUSION (+) generated as described below by circuits of FIG. 3D for activating the sensor circuits. Driver DR1 transmits to the sensor circuits the output of a one-shot multivibrator or flip-flop OS1 for resetting the sensor circuits each time a pushbutton switch PB1 is operated.
Data bus receivers RR1-RR10 (constituted by inverting amplifiers) are interconnected with corresponding ones of drivers DR1-DR10 and provide binary sensor address data to a pair of four-bit input hexadecimal output demultiplexers DM1A and DM1B. By selectively connecting one output of each demultiplexer to individual sensor circuits, a unique address for each sensor is defined. For example, sensor SS1 has an address defined by the "9" output of DM1A and by the "B" output of DM1B. However, the outputs of the demultiplexers may be connected in a random pattern to the sensor circuits to avoid an easily-determined interrogation sequence. In such an arrangement, each sensor is interrogated in sequence but in a randomized pattern. Since timer CL1 operates at 150Hz, all the sensors are interrogated within less than a second, such interrogation being repeated continuously, of course.
Interrogation of sensor SS1 occurs when its address (provided by the demultiplexer outputs) is detected by a 3-input NOR gate G3, the output of which goes high when all of its inputs are low. This triggers a one-shot multivibrator OS2 and, if sensor SS1 was tripped during the interrogation or is, at this time, tripped even momentarily, the resultant signal is clocked by OS2 through a flip-flop, FF1 and, in inverted logic, is presented by the Q output of FF1 to a 3-input AND gate G4 for clocking a one-shot multivibrator OS3. When clocked, its Q output goes momentarily high. This signal is then inverted by an inverter N3 to provide a signal referred to as ALARM ACTIVATED (-). This inverted-logic signal is thus representative of detection of a tripped sensor. It is supplied through a bus 303 common to all the sensor circuits to a data bus driver DR.phi. (an inverter) is in turn received by a data bus receiver RR.phi. (an inverter) and thence delivered by a line 305 to the circuitry of FIG. 3C, where it is again inverted by an inverter N4 for further use explained below.
Referring again to FIG. 3B, when one-shot OS3 is clocked, its Q output momentarily goes low, causing the Q output of flip-flop FF3 to go low. This produces a low input for AND gate G4 to preclude further clocking of one-shot OS3 and prevents another ALARM ACTIVATED signal, for the time being. Designated CN2 is a 4-bit binary counter clocked by one-shot OS2. Hence, it counts the number of interrogations of sensor SS1. The output 2.sup.3 (corresponding to eight interrogations) of this counter is interconnected with the clock input of a one-shot multivibrator OS4 having its Q output interconnected with one input of a 2-input AND gate G5. The other input of G5 is ordinarily high until a SYSTEM RESET (-) signal results from reset operation explained below.
Operation of the logic elements just described has the result of allowing one-shot OS3 to be clocked for a second time only after eight interrogations of sensor SS1 have occurred. This period is preselected to be long enough to allow any data stored in later-described memory elements of FIG. 3C first to be transmitted to the central processor system. When a second alarm activation signal from sensor SS1 is thus given, a 2-input OR gate G6 and two flip-flops FF4 and FF5 act to prevent the output of gate G4 from again going high until a SYSTEM RESET (-) signal is provided.
Accordingly, this circuitry operates not only to permit only a predetermined number (two) of tripped sensor occurences to be reported, but also provides for a predetermined time delay between them. This ensures high reliability in reporting the alarm occurrence detected by the sensor but precludes undesirably redundant reports from the same sensor while enabling all stored data to be forwarded promptly to the central processor system.
While still referring to the sensor circuits, it should be observed that each sensor circuit is provided with a switch SW1 which, when selectively closed, grounds an input of NOR gate G3. In this closed position, the sensor operates as a nonintrusion type. Thus, this switch is closed if the sensor is employed, for example, for detecting fire. If the sensor is an intrusion-sensing type, then switch SW1 is opened and an inverter N5 provides a signal SENSE INTRUSION (+), when present, to this input. This signal is supplied when the remote unit is being employed in its intrusion sensing mode which mode, as explained in the description below of circuity of FIG. 3D, may be selectively disabled.
Referring now to FIG. 3C, the signal ALARM ACTIVATED (-) clocks a first of three one-shots OS5, OS6, and OS7 cascaded to provide a timing sequence. When, as a result, the Q output of one-shot OS7 goes low, a signal is provided by a 2-input NOR gate G7 and a pair of OR gates G8 and G9 to the chip enable input ("CE") input of each of two 16-word, 4-bit random-access memories MEM1A and MEM1B.
Note that the sensor addresses are also made available as input to each of the memories, as shown at 301', from counters CN1A and CN1B. Thus, loaded into the memories are the addresses of each of the sensors which have been tripped. This stored data therefore signifies the tripped status of such sensors and their address data.
Each memory has a read input designated "R" which must be low for such data to be stored in the memories. This input goes high in response to a signal XMIT signifying that the data is to be transmitted to the central processor system.
The Q output of one-shot OS5 is seen to be provided to the up-count input of a binary counter CN3 so that this counter counts the number of tripped sensors which are detected during an interrogation cycle.
Designated CL2 is an astable multivabrator oscillating at a relatively low frequency such as about 3Hz (up to perhaps 30Hz) to provide clock pulses which are gated by a 2-input AND gate G10 when a signal TRANS (described below) is provided thereto, and then are delivered to the first of a time-delay cascade of one-shots OS8, OS9 and OS10.
The Q output of OS8 is interconnected with the clock input of a flip-flop FF6 having its Q output connected to the down-count input of counter CN3 for the purpose of de-incrementing the count in this counter as the data signifying each tripped sensor is transferred to the central processor system. The Q output of one-shot OS10 is interconnected with an input of an AND gate G11 and then through two AND gates G12 and G13 for enabling each of memories MEM1A and MEM1B.
A J-K flip-flop FF7 has its respective Q and Q outputs connected the other input of each of gates G12 and G13, this flip-flop being clocked by timer CL2. This arrangement is such that the memories are enabled alternately when data is being read from the memories during transfer of data to the central processor system but are enabled simultaneously when such data is being stored.
Such are the various features for storing data in the memories and for causing it to be read from the memories for transmission to the central processor system. A description of features for initiating communications with the central processor and for facilitating transmission of the sensor data and other information follows.
Referring still to FIG. 3C, designated G14 is a 4-input OR gate. Its inputs are interconnected with the address lines of the memories. Accordingly, if during an interrogation cycle, one or more tripped sensors have been detected, the output of gate G14 goes high in response to the storage at an address in the memories of tripped sensor data. The output of gate G14 is but one input of an expanded-input AND gate G15. Other inputs to the latter are provided by designated ones of the sensor address lines, i.e., of the several memory address inputs 301'.
Hence, when the output of gate G14 goes high, the output of gate G15 goes high. An OR gate G16 (FIG. 3D) receives the output of gate G15 as well as the output of an AND gate G17 whose four inputs are provided by the memory address lines. The result is that the input "E" of a 2-input NAND gate G18 goes high and, assuming that data is not being transferred from the memories, gate G18 will preset a flip-flop FF8 causing its Q output to go high.
When the Q output of FF8 is high, it signals XMIT, meaning to initiate a dialing sequence by a conventional multifrequency telephone dialer (not shown). The function of gate G18 is thus also apparent: If during an interrogation cycle, fifteen alarm addresses have been stored in the memories, the output of gate G18 goes high. This also causes flip-flop FF8 to be preset for initiating a dialing sequence. Accordingly, a dialing sequence initiated either at the completion of an interrogation cycle (and there is at least one stored sensor address) or whenever fifteen sensor addresses have been stored, whichever first occurs. The Q output of flip-flop provides a signal XMIT which is the logical inverse of the signal XMIT.
The Q output of flip-flop FF8 is connected to one of the two inputs of OR gate G19, the output of which is interconnected with the telephone dialer conventional input for initiating dialing. Hence, a signal XMIT from flip-flop FF8 signals the dialer to dial the central processor system via a conventional telephone line. The signal is identified START DIALER (+) as shown. The absence of a signal XMIT, on the other hand, causes an adjacent 2-input NOR gate G20 to signal STOP DIALER (+) for preventing dialer operation.
Clearing of flip-flop FF8 is provided for by the operation of an inverter N11, which receives the output of OR gate G14, and a 3-input NAND gate G24 which receives the output of gate G14 via inverter N11, the Q output of flip-flop FF6, and the Q output of flip-flop FF8. This arrangement causes clearing of flip-flop FF8 under circumstances described below.
When the central processor system automatically answers in response to the dialed call described above, the dialer conventionally provides a signal CALL COMPLETED (+) which is supplied to one input of each of a pair of 2-input NAND gates G22 and G23. The other input of G23 is provided with the signal XMIT. Hence, the output gate G23 will cause a flip-flop FF9 to provide at its Q output a signal TRANS meaning to transfer data stored in the memories to the central processor system. This signal is provided to AND gate G10 (FIG. 3C) for gating clock pulses from timer CL2.
Operation of the memory data read-out (i.e., data transfer) circuits of FIG. 3C previously described causes data from memory chips MEM1A and MEM1B to be alternately provided to four inverters N6-N9. Hence, the logic-inverted data bits representing digits stored in each of the memory chips are alternately provided to inputs of a 4-input hexadecimal-output demultiplexer circuit DM2. The twelve outputs of the latter circuit povide the twelve dialing digits to a conventional multifrequency telephone dialer tone generator (not shown), these digits being 0 through 9 and "*" and "#". This tone generator may be the same one used for dialing a telephone line to the central processor system.
When the last sensor address has been transmitted, NAND gate G24 output goes high, clearing flip-flop FF8 and stopping further data transmission.
It should be apparent from the foregoing that stored sensor data is thus tone-encoded in a digital format for transmission to the central processor system over a telephone circuit communications link as a sensor alarm data message, each sensor address being represented by two digits which are transmitted serially as multifrequency tones.
System reset functions may be noted, with reference to FIG. 3A, as involving selective operation of pushbutton switch PB1. This causes one-shot OS1 to provide a signal SYSTEM RESET (-) to each of the sensor circuits via data bus driver DR1 and data receiver RR1 for clearing each flip-flop of the sensor circuits corresponding to flip-flop FF5. This signal is also provided to counter CN3 (see FIG. 3C) for clearing it. Hence, pushbutton PB1 is operated for clearing the unit and readying it for operation.
As was noted above, the sensors may be of either intrusion or nonintrusion alarm sensing types, the remote unit being adapted for responding to sensors of both types. For many commercial and industrial subscribers, it is desirable for intrusion alarm sensing to be selective disable or enabled. For example, in either commercial or private premises it may be unnecessary and undesirable to employ intrusion sensing during daylight or business hours but desirable to return to intrusion sensing capability after dark or after close of business. Yet it may be desirable to retain nonintrusion types of sensing (e.g., fire, heat, etc.) even during times when intrusion sensing is disabled. Accordingly, remote units of the system are provided with means for selectively disabling response by the respective remote unit to tripped conditions of intrusion alarm sensing type sensors while permitting response to tripped conditions of nonintrusion alarm sensing type sensors. In this way, the remote unit is provided with only a nonintrusion sensing mode of operation. Features described below also signal the central processor system of such change in mode of operation.
A pushbutton switch PB2 (FIG. 3D) is provided for selectively enabling or disabling the above-described intrusion feature. Its operation toggles a flip-flop FF11 whose Q output, when high, provides signal S.I. (+) meaning "sense intrusion" or whose Q output, when high, signals the logical inverse S.I. (-) for terminating intrusion sensing. Either signal is provided through an OR gate G25 for clocking a one-shot OS12. The Q output of the one-shot operates to preset a flip-flop FF12. The Q output of FF12 is provided to OR gate G19, hence providing a signal START DIALER (+) whenever the intrusion sense mode is either selectively enabled or disabled, at the subscriber's option.
The Q output of flip-flop FF12 is also provided to NAND gate G22 for presetting another flip-flop FF13, but only after a signal CALL COMPLETED (+) is provided by the telephone dialer signifying that a telephone circuit has been established with the central processor system. The Q output of flip-flop FF13 then causes an AND gate G26 to permit clock pulses from timer CL2 to be provided to one input of each of a pair of AND gates G27 and G28 and a NAND gate G29.
These three gates are controlled by a binary counter chain constituted by two flip-flops FF14 and FF15. Flip-flop FF14 is clocked through gate G26. Hence, operation when intrusion sensing is enabled by operation of switch PB2 is as follows: The counter chain first causes the output of gate G28 to go high, and then causes the output of gate G27 to go high.
Three inverters N12-N14 tie the output of gate G28 to the three memory output lines designated which provide to inverters N6-N9 (FIG. 3C). Hence, when gate G28 output goes high, a first tone is generated by operation of demultiplexer DM2 and the dialer multifrequency tone generator to which it is connected.
Two other inverters N15 and N16 tie the output of gate G27 to memory output lines designated. Hence, when the output of gate G27 goes high, a second different tone is generated by the dialer tone generator. In this way, the central processor system is signalled by digital encoding that sensor intrusion operation has been enabled at the respective remote unit.
Following such operation of first gates G28 and then gate G27, the NAND gate G29 operates to provide a signal S.I. STP, meaning sense intrusion signalling stop, to the reset inputs of each of flip-flops FF14 and FF15 and to the clear input of flip-flop FF12. Accordingly, the intrusion mode signalling circuits are reset and so conditioned for signalling again.
When it is desired to disable the intrusion sensing mode, operation of pushbutton switch PB2 again toggles flip-flop FF11. Accordingly, its output provides the signal S.I. (-), meaning terminate intrusion sensing. This signal is provided to one input of a NAND gate G30 whose output is interconnected with a designated memory output line.
The signal S.I. (-) also clocks one-shot OS12 so that a dialing sequence is again initiated. When the dialer provides the signal CALL COMPLETED (+) to signify readiness of the telephone circuit, the counter chain provided by flip-flops FF14 and FF15 then again causes AND gates G27 and G28 to generate tones by means of demultiplexer DM2 and the dialer tone generator. However, the signal S.I. (-) provided to NAND gate G30 causes these tones to be different from those previously given. In this way, the central processor system is signalled by digital encoding that sensor intrusion operation has been disabled at the respective remote unit.
Various modifications of the system and the remote unit are possible. For example, greater remote unit memory storage may be provided, as well as storage of additional types of data. The sensor interrogating (addressing) may be done in ways different from that described and shown. For example, strobe interrogation may be used for detecting a tripped sensor followed by sequential addressing to identify which of the sensors has been tripped. Or multiplex interrogation may be used to reduce the number of leads running to sensor circuits.
Various forms of readouts or other visual and/or aural indications may be employed for signalling at the remote unit (such as for local security purposes) which of the sensors, if any, has been tripped.
Provision may be made for selectively enabling or disabling blocks of sensors, and reporting to the central processor system to that effect.
In view of the foregoing, it will be seen that the several objects of the invention are achieved and other advantages are attained.
As various changes in addition to those discussed above could be made in the above constructions and methods without departing from the scope of the invention, it is intended that all matter contained in the foregoing description shall be interpreted as illustrative rather than in a limiting sense.