US 4,138,280 AGrant

Method of Manufacture of Zener Diodes

Issue Date:1979-02-06

•10 Claims

•1 Drawing Sheets

Abstract

A method of manufacture of a zener diode with a given breakdown voltage is disclosed wherein the resistivity of the initial wafer is measured before diffusion of a junction in the wafer, and a diffusion operation is then performed to diffuse the junction at a fixed diffusion temperature and for a time which is determined such that the desired breakdown voltage is proportional to the product of the square root of the initial resistivity and the fourth root of the diffusion time.

Metadata

Assignee

International Rectifier Corporation

Inventor

Vladimir Rodov

Application Information

Application Number:US 8744165

Filing Date:1978-02-02

Priority Date:1978-02-02

Art Unit:111

Classifications

IPC:

H01L 21223

Field of Search:

148186;187;189

Patent Drawings (1 sheets)

Description

Background of the Invention

This invention relates to the manufacture of semiconductor devices such that a given reverse avalance bulk breakdown voltage across a p-n junction can be accurately reproduced in the manufacturing process, and more specifically relates to a novel process for the manufacture of a zener diode wherein the reverse breakdown voltage of the device can be held within narrow tolerances during the manufacturing operation.

Processes for the manufacture of zener diodes are well known, and are described in numerous prior publications including, for example, U.S. Pat. No. 3,378,915, dated Apr. 23, 1968.

Zener diodes have an accurately defined reverse breakdown voltage and this characteristic is widely used in various electrical circuits. Zener diodes are normally sold with a given reverse voltage breakdown to within a tolerance of plus or minus 5%. Thus, the manufacturing operation must be closely controlled to avoid too high a rejection rate.

The actual breakdown voltage of a given device will be determined by the depth of the junction, and by the resistivity of the wafer materials. These characteristics in turn are controlled by the initial resistivity of the wafer, the diffusion temperature, and the diffusion time for a given diffusion system using given n-type or p-type conductivity materials. Consequently, the breakdown voltage of devices being produced will vary with changes in any of the above parameters.

Brief Description of the Invention

In accordance with the invention, a novel manufacturing process is provided for zener-type junctions, in which diffusion temperature is fixed and the diffusion time is very accurately controlled in accordance with a fourth root law wherein:

where:

V = zener breakdown voltage;

K = constant;

P = resistivity of the wafer prior to diffusion;

T = total diffusion time.

The above relationship, which is newly discovered, reveals that the ultimate breakdown voltage produced is proportional to the fourth root of diffusion time during the manufacturing process. The relation also reveals that if one tries to change both diffusion temperature (which is contained in the constant k in the novel relation of the invention, and is held constant in accordance with the invention) and diffusion time during the process, the process becomes virtually uncontrollable.

The relation also reveals that if the resistivity of the initial wafer material varies only slightly, the diffusion time must be greatly changed to obtain a given breakdown voltage. This is particularly important since semiconductor crystals are commonly sold to device manufacturers with resistivity tolerances of plus or minus 10%.

For example, the process may begin with p-type monocrystalline silicon wafers having a resistivity in the range of 0.07 to 0.095 ohm cm. An n-type region is then diffused into the p-type wafer. The final breakdown voltage, however, will vary widely if the same process parameters are used for initial 0.07 ohm cm. material as for the 0.095 ohm cm. material; and will vary uncontrollably if one tries to control the process by modifying diffusion temperature and other parameters.

In carrying out the invention, the resistivity of one or more pilot wafers is measured, and the devices are diffused under fixed temperature conditions until a device is made with the requisite breakdown voltage, say 34 volts. This then allows the determination of the constant k in the novel relationship:

for example, if, after 55 hours of diffusion at a given time and under given diffusion conditions, and using a material measured to be 0.079 ohm cm., one produces a device with a 34.5 volt reverse-voltage breakdown, then from the above equation:

If the next wafers to be diffused to form 34.5 volt zeners have a resistivity of 0.096 ohm cm., the diffusion time T.sub.x needed for the wafer can be calculated from: ##EQU1##

Thus, the single process variable of diffusion time T.sub.x can now be calculated from the initial wafer resistivity, and the process will produce devices with reproducible reverse bulk avalance breakdown characteristics within a tolerance of plus or minus 5%. Note in the above example that a drastically different diffusion time is needed for 0.096 ohm cm. material than the 55 hours for the 0.079 ohm cm. material to obtain the same breakdown voltage.

Stated differently, and in accordance with the invention, if the resistivity of the initial wafer is changed from .rho..sub.1 to .rho..sub.2, the diffusion time T.sub.1 of the initial wafer at constant temperature must change from T.sub.1 to T.sub.2, where T.sub.2 = (.rho..sub.1 /.rho..sub.2).sup.2 T.sub.1.

Brief Description of the Drawings

FIG. 1 is a plan view of a monocrystalline silicon wafer which is to be processed to produce a zener diode.

FIG. 2 is a cross-sectional view of FIG. 1 taken across section line 2--2 in FIG. 1.

FIG. 3 shows the wafer of FIG. 2 after a diffusion step.

FIG. 4 shows the wafer of FIG. 3 after the bottom surface has been lapped.

FIG. 5 shows the wafer of FIG. 4 after electrodes have been attached thereto.

Detailed Description of the Drawings

Referring first to FIGS. 1 and 2, there is shown a monocrystalline silicon wafer which may have a thickness of 13 mils and a diameter of 1 inch. One or more devices are to be made from this wafer. In the following, the invention is illustrated for the case of a zener diode having a reverse voltage of 34.5 volts, plus or minus 1.5 volts. However, the invention will be understood to be applicable to the reproducible production of any given bulk avalanche breakdown voltage (in the range from approximately 10 volts to 100 volts) for any junction in a silicon semiconductor body.

The wafer 10 of FIGS. 1 and 2 is typically available with any required resistivity within about a 15% range and with any desired impurity type. For the example described herein the wafer 10 is a p-type wafer having a resistivity in the range of 0.07 ohm cm. to 0.095 ohm cm.

In order to form the zener diode, the wafer 10 is placed in a suitable diffusion furnace and an n-type impurity, such as phosphorus, is diffused into the wafer to form the thin n-type conductivity shell 11 of FIG. 3 which creates the p-n junction 12. Any other diffusion process could be used, including but not limited to vapor phase deposition processes. After the zener diode is completed, it is provided with suitable electrodes 13 and 14, as shown in FIG. 5.

The present invention is directed to a novel process for producing the junction in a plurality of devices 12 such that they have highly reproducible reverse-voltage breakdown characteristics. In particular, the present invention is based on the discovery that if diffusion temperature is held constant, the breakdown voltage can be described with high accuracy, by the following relation:

where:

V is breakdown voltage;

.rho. is the resistivity of wafer 10 of FIGS. 1 and 2 before the diffusion step;

T is the total diffusion time;

k is the constant.

This approximate equation holds very well for breakdown voltages in the range of 10 volts to 100 volts.

Equation (1) is derived as follows:

The breakdown voltage V is known to be (for a gradual junction): ##EQU2## where N.sub.d is the concentration of donor atoms in the semiconductor body, and X.sub.1 is the depth of the junction 12 into body 10.

The following approximation is used for the concentration of donor atoms at any depth in the wafer N.sub.d(X) : ##EQU3## where: N.sub.o is the surface concentration of donor atoms;

X is the distance into the surface of the semiconductor body;

D is the diffusivity of the donor atoms; and

T is the total diffusion time.

The concentration of acceptor atoms at the depth X.sub.1 is N.sub.a(X.sbsb.1.sub.), and is: ##EQU4##

It follows from equation (4) that ##EQU5## and therefore from equations (4) and (5): ##EQU6##

Combining equations (2) and (6), ##EQU7##

and since D is a constant if diffusion temperature is constant, combining (7) and (8) gives equation (1):

in accordance with the present invention, the diffusion temperature is kept constant, for example, 1230.degree. C., for the total diffusion time T. Note that diffusion time is measured from the time the wafers enter the diffusion furnace until the temperature starts to decline with a cooling rate about 2.degree. C./min. The warm-up and cool-down times need not be considered if they are not considered in the calibrating procedure which is used to account for the proportionality factor k.

When using the process of the invention, and in order to take into account the proportionality factor k, wafers of a measured resistivity .rho. are processed in the equipment, using a fixed diffusion temperature and using a given diffusion process.

The apparatus can then be used to process subsequent wafers, changing only the diffusion time T in accordance with the measured resistivity .rho. of the wafers being processed. Thus, in one example, it was found that a wafer 10 having a resistivity of 0.079 ohm cm. produced a 34.5 volt junction after 55 hours of diffusion. A new wafer sample having a resistivity of 0.096 ohm cm., but being otherwise similar to the original wafer can then be directly processed in the same diffusion apparatus, where, however, the diffusion time T.sub.x is changed by the amount determined from: ##EQU8##

In the above example, a typical wafer 10 having the resistivity 0.079 ohm cm. may have an initial thickness of 13 to 14 mils. This wafer is etched to remove about 3 mils and to polish the surface. Thereafter, a layer of phosphorus is deposited on the surface of the wafer until the sheet resistance of the surface is about 0.3 ohms. Thereafter, the temperature is increased to 1230.degree. C. and is maintained at that temperature for 55 hours. The final device has a zener voltage of 34.5 volts.

In carrying out the present invention, it will be understood that the processing of the devices is conventional, except that the diffusion temperature is calculated as described above, and diffusion temperature is kept constant. The process can also be applied to multiple junction devices having at least one zener diode junction therein and any desired donor and acceptor atom can be used.

Although a preferred embodiment of this invention has been described, many variations and modifications will now be apparent to those skilled in the art, and it is preferred therefore that the instant invention be limited not by the specific disclosure herein but only by the appended claims.

Claims

I claim:

1. The process of manufacture of a zener diode having a predetermined reverse voltage (V) comprising the steps of measuring the resistivity (.rho.) of a semiconducting body which is to receive a zener diode junction therein, and diffusing impurity atoms into said body at a constant temperature and for a time (T) where said time (T) is determined from the relation: where k is a constant.

2. The process of claim 1 wherein said body is initially of a p-type conductivity and wherein said impurity atoms diffused into said body are donor type atoms.

3. The process of making a p -n junction in a semiconductor body, which junction has a predetermined breakdown voltage within plus or minus about 5%, comprising the steps of measuring the resistivity of the semiconducting body before the formation of said p-n junction; and then diffusing impurity atoms into said body at a constant temperature for a controlled length of time such that said predetermined breakdown voltage is proportional to the product of the square root of the measured resistivity and the fourth root of the diffusion time.

4. The process of making a p-n junction in a semiconductor body which has a predetermined breakdown voltage within plus or minus about 5%, comprising the steps of measuring the resistivity of the semiconducting body before the formation of said p-n junction; and then diffusing impurity atoms into said body at a constant temperature and varying the diffusion time such that: where T is diffusion time, V is said predetermined breakdown voltage, .rho. is said resistivity, and k is a constant.

5. The process of claim 1 wherein said constant k is determined by processing semiconducting bodies of pre-measured resistivities for measured times T until a device is produced having said predetermined reverse voltage V wherein said last-mentioned device had an initial measured resistivity .rho..sub.1 and was diffused for a measured time T.sub.1.

6. The process of claim 5 wherein the diffusion time T.sub.x for subsequently produced wafers made by the same process apparatus which produced said device is determined by measuring their resistivities .rho..sub.x and by determining their diffusion time T.sub.x from the relation:

7. The process of claim 4 wherein said constant k is determined by processing semiconducting bodies of pre-measured resistivities for measured times T until a device is produced having said predetermined reverse voltage V and which had an initial resistivity .rho..sub.1 and was diffused for a time T.sub.1.

8. The process of claim 7 wherein the diffusion time T.sub.x for subsequently produced wafers is determined by measuring their resistivities .rho..sub.x and by determining their diffusion times T.sub.x from the relation:

9. The process of producing a zener diode having a given reverse breakdown voltage V within a given tolerance range; said process comprising the steps of measuring the resistivity .rho..sub.1 of a first wafer of monocrystalline semiconductor material, and diffusing a junction into said first wafer at a constant temperature and for a time T.sub.1 sufficient to produce the reverse breakdown voltage V; and thereafter measuring the resistivity .rho..sub.2 of a second wafer of monocrystalline material, and diffusing a junction into said second wafer at said constant temperature and for a time T.sub.2 to produce said reverse breakdown voltage V in said second wafer, where the time T.sub.2 is determined by:

10. The process of manufacture of a zener diode having a given breakdown voltage wherein a junction is diffused into wafers of semiconductor material at constant temperature for a given diffusion time and wherein, when the initial resistivity of wafers being diffused is changed from .rho..sub.1 to .rho..sub.2, the diffusion time T.sub.1 used to diffuse wafers of resistivity .rho..sub.1 is changed to a time T.sub.2 wherein:

Patent Citations (11)

Patent	Date	Inventor
US2827436	1958-03-01	Bernski
US2937963	1960-05-01	Pelfrey
US3340598	1967-09-01	Hatcher
US3349474	1967-10-01	Rauscher
US3453154	1969-07-01	Wycislak
US3602778	1971-08-01	Ura et al.
US3635773	1972-01-01	Thire
US3878001	1975-04-01	Olk
US3933527	1976-01-01	Tarneja et al.
US4013483	1977-03-01	Nuzillat et al.
US4046608	1977-09-01	Iseghem et al.

Abstract

Description

Background of the Invention

Processes for the manufacture of zener diodes are well known, and are described in numerous prior publications including, for example, U.S. Pat. No. 3,378,915, dated Apr. 23, 1968.

Brief Description of the Invention

where:

V = zener breakdown voltage;

K = constant;

P = resistivity of the wafer prior to diffusion;

T = total diffusion time.

If the next wafers to be diffused to form 34.5 volt zeners have a resistivity of 0.096 ohm cm., the diffusion time T.sub.x needed for the wafer can be calculated from: ##EQU1##

Brief Description of the Drawings

FIG. 1 is a plan view of a monocrystalline silicon wafer which is to be processed to produce a zener diode.

FIG. 2 is a cross-sectional view of FIG. 1 taken across section line 2--2 in FIG. 1.

FIG. 3 shows the wafer of FIG. 2 after a diffusion step.

FIG. 4 shows the wafer of FIG. 3 after the bottom surface has been lapped.

FIG. 5 shows the wafer of FIG. 4 after electrodes have been attached thereto.

Detailed Description of the Drawings

where:

V is breakdown voltage;

.rho. is the resistivity of wafer 10 of FIGS. 1 and 2 before the diffusion step;

T is the total diffusion time;

k is the constant.

This approximate equation holds very well for breakdown voltages in the range of 10 volts to 100 volts.

Equation (1) is derived as follows:

The following approximation is used for the concentration of donor atoms at any depth in the wafer N.sub.d(X) : ##EQU3## where: N.sub.o is the surface concentration of donor atoms;

X is the distance into the surface of the semiconductor body;

D is the diffusivity of the donor atoms; and

T is the total diffusion time.

The concentration of acceptor atoms at the depth X.sub.1 is N.sub.a(X.sbsb.1.sub.), and is: ##EQU4##

It follows from equation (4) that ##EQU5## and therefore from equations (4) and (5): ##EQU6##

Combining equations (2) and (6), ##EQU7##

and since D is a constant if diffusion temperature is constant, combining (7) and (8) gives equation (1):

Claims

I claim:

2. The process of claim 1 wherein said body is initially of a p-type conductivity and wherein said impurity atoms diffused into said body are donor type atoms.

Patent Citations (11)

Patent	Date	Inventor
US2827436	1958-03-01	Bernski
US2937963	1960-05-01	Pelfrey
US3340598	1967-09-01	Hatcher
US3349474	1967-10-01	Rauscher
US3453154	1969-07-01	Wycislak
US3602778	1971-08-01	Ura et al.
US3635773	1972-01-01	Thire
US3878001	1975-04-01	Olk
US3933527	1976-01-01	Tarneja et al.
US4013483	1977-03-01	Nuzillat et al.
US4046608	1977-09-01	Iseghem et al.