Method and Apparatus for Adaptive Control of a Stepper Motor

The present invention relates to adaptive stepper motor control systems and more particularly to a method and apparatus for controlling the deceleration of a stepper motor in accordance with measured real time characteristics of the motor and load.

Stepper motors are controlled by the input signals or pulses, applied thereto and are frequently used to position a load. For example, a stepper motor can be used to position a machine tool, such as a milling machine, with respect to a piece of material to be worked upon by the machine tool. In many instances, it is very desirable that the position of the load be accurately controlled. This requires the rotation of the stepper motor to be accurately controlled by means of the drive signals applied thereto. Heretofore in the prior art, accurate positioning of a load by a stepper motor has been achieved to a certain extent by determining the deceleration characteristics of the stepper motor and load and then utilizing these characteristics to compute the deceleration required to stop the stepper motor when the load is moved from one position to another. One disadvantage to this is that the deceleration characteristic of the stepper motor and load does not remain constant over a period of time nor, in many instances, does the deceleration characteristics remain constant from one move to another. This can be alleviated to some extent by determining the deceleration characteristic of the motor and load more often. Obviously, however, this is cumbersome and not economical.

Accordingly, an object of this invention is to provide an improved method and apparatus for determining the deceleration characteristic of a stepper motor and load.

Another object of this invention is to provide an improved method and apparatus for determining the real time deceleration characteristics of a stepper motor and load.

Still another object of this invention is to provide an improved method and apparatus for controlling a stepping motor.

A further object of this invention is to provide an improved method and apparatus for controlling a stepping motor wherein, for every move greater than a predetermined distance, the real time deceleration characteristics are measured during the move and are utilized to calculate the deceleration that will be required to bring the motor to a stop at the desired location.

Briefly described, these and other objects and features of the present invention are realized in an adaptive control system for a stepper motor that includes electrical means coupled to the stepper motor for driving the stepper motor for a predetermined number of steps. The electrical means also includes means to temporarily decelerate the stepper motor while the stepper motor is being driven the predetermined number of steps. Computing means coupled to the stepper motor during the temporary deceleration portion measures the deceleration characteristics of the stepper motor system and calculates the number of deceleration steps that will be necessary to bring the stepper motor to a stop. When the steps remaining in the move are substantially equal to the number of calculated steps of deceleration needed to stop the stepper motor, the electrical means will stop the stepper motor, in accordance with the calculations made by the computing means. Prior to being stopped in this manner, however, the stepper motor is again driven to the velocity that existed just prior to the temporary deceleration.

In one embodiment of the present invention the deceleration requirements are calculated by the computing means after the temporary deceleration only when the move exceeds a predetermined number of steps. For all other moves, the stepper motor is automatically accelerated and decelerated according to a fixed routine.

The present invention will be clearly understood from the following detailed description taken in conjunction with the following drawings, wherein like reference characters designate like or corresponding parts throughout the several views, and wherein:

FIG. 1 is a block diagram of an adaptive stepper motor control system in accordance with the present invention;

FIG. 2 is a logic block diagram of an LSI chip which is utilized in the system of FIG. 1;

FIG. 3 is a plan view of a perforated disk that is attached to the stepper motor shaft to provide stepper motor position and speed signals to the system of FIG. 1;

FIG. 4 illustrates idealized waveshapes which are generated by rotation of the disk shown in FIG. 3;

FIG. 5 is a schematic diagram of the driver circuit for the stepper motor in the system shown in FIG. 1;

FIG. 6 is a graphical representation of the plurality of steps, or positions, to which the stepper motor in the system shown in FIG. 1 can be moved;

FIGS. 7, 8A, 8B, 9A and 9B illustrate the velocity profiles of the various movements made by the stepper motor in the system of FIG. 1 in accordance with the present invention;

FIG. 10 is a chart which shows the status of the addressing signals applied to the LSI chip shown in FIG. 2 and the type of data that is read out from the LSI chip in response to these addressing signals; and

FIGS. 11 through 24 constitute various flow charts of the program carried out by the system illustrated in FIG. 1.

The preferred embodiment of the present invention illustrated in FIG. 1 is described in conjunction with a digital feedback system for position control of a stepper motor 10. Position and control signals for actuating the stepper motor 10 in a desired manner are provided by user controls 20. Coupled to the stepper motor 10 and to the user controls 20 is a data processing system 18 that enables actuation of the stepper motor 10 in accordance with the signals supplied by the user controls 20.

The stepper motor 10 preferably comprises a variable reluctance, phase wound stepper motor and drives, or positions, a mechanical load 12 by means of the motor 10 shaft 14. In one embodiment of the invention which was constructed, the motor 10 included a Kearfott No. 20, four phase, fifteen degree stepper motor which enabled the load 12 to be moved from one to two thousand fourty seven steps, where each step included fifteen degrees of rotation of the stepper motor 10. Accordingly, each full cycle of rotation of the stepper motor 10 constitutes twenty four full steps.

In the description that follows, a signal is considered to be active when high except when otherwise designated or described.

The system motor 10 position feedback is provided by an optical encoder which includes a disk 16 which is attached to the motor 10 shaft 14 to rotate therewith. The optical encoder provides a first encoder 128 signal ENC1 (FIG. 4) which is applied to the data processor system 18 by way of a lead 28 and a second encoder 130 signal ENC2 which is applied to the processor system 18 by way of a lead 26. Additionally, the optical encoder provides a home indicate signal HI (active when low) to the processor system 18 by way of a lead 24.

The generation of the ENC1, ENC2 and HI signals will be readily apparent from consideration of FIG. 3 wherein the disk 16 is illustrated in detail. The disk 16 includes a centrally located aperture 123 that enables the 16 disk to be secured to the motor 10 shaft 14 by any number of well known means. The disk 16 includes a plurality of openings 120 equally spaced around the periphery of the disk 16. In accordance with a preferred embodiment, there are twenty four equally spaced openings 120, each corresponding to a step of the motor 10. A first optical path 124 located normal to the plane of the disk 16 is sequentially interrupted by rotation of the disk 16. By positioning a source of light (not shown), such as a light emitting diode, on the optical path 124 on one side of the disk 16 and a light responsive element (not shown), such as a photo transistor, on the optical path 124 on the opposite of the disk 16, sequential interruption of the light path 124 by rotation of the disk 16 can be utilized to generate a square wave signal in a manner well known to those in the art. Such a signal is illustrated in FIG. 4 as the waveform 128 which constitutes the encoder signal ENC1. The encoder signal ENC2, illustrated in FIG. 4 by the waveshape 130, is generated in a like manner by way of a second optical path 122. As shown in FIG. 3, however, when the optical path 124 is in the middle of an opening 120, the optical path 122 is just beginning to be interrupted by the portion of the disk 16 between openings 120. Accordingly, since the width of the disk 16 portions that interrupt the light paths 124 and 122 between openings 120 are equal to the width of the openings 120, the ENC1 and ENC2 signals constitute square waves that are in quadrature, i.e. ninety degrees out of phase, as is illustrated in FIG. 4. As shown by FIG. 3, one 120' of the openings 120 is extended such that a third light path 126 is uninterrupted once for each complete rotation of the disk 16 to produce the HI signal which is illustrated in FIG. 4 by the waveshape 132. The HI signal 132 is coincidental with the center of the corresponding low portion of the ENC1 signal. The disk 16 is secured to the shaft 14 of the stepper motor 10 so that the disk 16 takes a stationary position as shown in FIG. 3 with respect to the light paths 122, 124 and 126 only when a single predetermined winding of the stepper motor is energized as is discussed hereinbelow.

Referring to FIG. 4 it is seen that for each step of rotation of the motor 10, the ENC1 signal includes a low portion corresponding to the time the light path 124 is uninterrupted and a high portion corresponding to the time the light path 124 is interrupted. Since there are 24 motor 10 steps for each complete rotation of the disk 16, each ENC1 cycle includes fifteen degrees of rotation of the stepper motor 10 with seven and a half degrees of rotation taking place during each half cycle of the ENC1 signal. As will now be apparent, the number of steps of rotation of the motor 10, and therefore the position of the load 12, can be controlled and/or monitored by the processor system 18 by monitoring ENC1 and ENC2 pulses. Also, the frequency or time duration of the ENC1 pulses are related to the speed of the motor 10 and therefore the ENC1 signals can be used by the processor system 18 to control and/or monitor the speed of the motor 10. Assuming that clockwise CW rotation of the motor 10 causes generation of the ENC1 and ENC2 signals as shown by the arrow 125 in FIG. 4 and that counterclockwise CCW rotation causes generation of the signals as shown by the arrow 127, then when the motor 10 is moving clockwise ENC1 will be low when ENC2 goes from low to high and when the motor 10 is moving counterclockwise ENC1 will be high when ENC2 goes from low to high. Accordingly, the ENC1 and ENC2 signals can be used by the processor system 18 to determine the direction of rotation of the motor 10.

As discussed above, one embodiment of the present invention enabled the stepping motor 10 to be stepped from one to two thousand forty seven steps. These steps are graphically illustrated in FIG. 6. In order to enable the processor system 18 to keep track of the position of the load 12 by keeping track of the rotational steps of the motor 10, a mechanical reference or "home" position is required. In FIG. 6, the home position is located intermediate the first and last steps and is identified by the vertical line 154. The motor 10 is rotated in a clockwise direction to move the load 12 away from the home position in one direction and is rotated counterclockwise to move the load 12 away from the home position in the opposite direction. As will be apparent to those skilled in the art, the location of the home position 154 is entirely arbitrary and is usually decided by the move characteristics which the user of the system wishes to impart to the load 12. Accordingly, except when the home position 154 is located at the very beginning or at the very end of the number of steps that can be made and the step positions are identified by absolute addresses (discussed below), the system must indicate both the direction (clockwise or counterclockwise) and the location (step) to which the motor is to be rotated in order to place the load 12 at a desired position which corresponds to one of the two thousand forty seven rotational steps.

The motor 10 includes at least four winding 156, 158, 160 and 162 (FIG. 5) which are driven by pulse signals W4, W3, W2 and W1, respectively, generated by the processor system 18 on leads 32, 34, 36 and 38 respectively. These signals are amplified by a power driver 22 (FIG. 1) before being applied to the windings of the motor 10. A motor 10 winding 162, 160, 158 or 156 will be activated by the driver 22 whenever the corresponding signal W1, W2, W3 of W4 is high. Under normal operating conditions, counterclockwise rotation of the motor 10 is achieved by sequentially activating the windings 162, 160, 158 and 156 by sequentially actuating the drive signals as follows: W1, W1 and W2, W2, W2 and W3, W3, W3 and W4, W4, W4 and W1 etc. etc. Clockwise rotation of the motor 10 is achieved by reversing this sequence of drive signals. Only signal W1 being active can cause the motor 10 to take a position that places the disk 16 in a position relative to the optical paths 122, 124 and 126 shown in FIG. 3. The processor system 18 also applies a zener by pass signal ZBYP to the motor 10 driver 22 by way of a lead 30. This signal, as discussed below, is used when stopping the motor 10.

The driver 22 circuit is shown in more detail in FIG. 5 wherein power transistors T1-T4 amplify the motor 10 drive signals W1-W4, respectively, prior to application to the motor 10 windings 162, 160, 158 and 156. Each of the power transistors T1-T4 has its collector coupled to the emitter of a transistor T6 by way of a diode D1-D4. A zener diode 164 is coupled across the base and collector terminals of the transistor T6 and a source of potential B+ is also coupled to the collector of the transistor T6. The base of the transistor T6 is coupled to the collector of a transistor T5 by way of a resistance R1 with the emitter of transistor T5 being coupled to the emitters of the power transistor T1-T4. The ZBYP signal is coupled to the base of transistor T5 and when active creates substantially a short circuit across the zener diode 164 so that current in the motor 10 windings 162, 160, 158 and 156 due to drive signals W1-W4 changes slowly. When ZBYP is inactive, the transistor T5 is nonconducting. Whenever any of the transistors T1-T4 becomes nonducting due to its associated input signal W1-W4 becoming inactive, it is not possible for the current in the associated motor 10 winding 162, 160, 158, or 156 to decrease instantly to zero. Accordingly, current will continue to flow through the associated diode D1, D2, D3 or D4 and through the zener diode 164 and transistor T6 with the zener diode 164 current flow being substantially less than but effectively controlling the emitter to collector current flow of transistor T6. The resulting voltage drop of about thirty volts across the zener diode 164 appears across the associated motor 10 winding 156, 158, 160 or 162 to allow the current therein to decay to near zero in a short time. When the ZBYP signal is active, the transistor T5 conducts through the zener diode 164 unless the voltage on the emitter of transistor T6 rises above B+, at which time T6 turns on, effectively placing a short circuit across the zener diode 164. Whenever any of the transistors T1-T4 become nonconducting due to its associated input signal W1-W4 becoming inactive, it is not possible for the current in the associated motor 10 winding 162, 160, 158, 156 to instantly decrease to zero. Accordingly, current will continue to flow through the associated diode D1, D2, D3 or D4 and through the transistor T6. However, since the voltage drop across transistor T6 is only a few volts, insufficient voltage is impressed across the associated motor winding 156, 158, 160 or 162 to cause the current flow therein to decay to near zero in a short time. Rather, current in the associated winding 156, 158, 160 or 162 will decay slowly. As will now be apparent, the presence of the ZBYP signal effectively increases the decay time of the windings of the motor 10 and is utilized to stop the motor 10 in a manner as described hereinbelow.

The user controls 20 (FIG. 1) may include a manually operated keyboard (not shown) that enables an operator to manually provide the desired operating signals for the motor 10 and receive and display to the status signals from the processor system 18 that indicate the condition of the motor 10. Alternatively, the user controls 20 may comprise an automatic data handling system (not shown) that supplies the operating signals and receives the motor 10 condition signals in accordance with an automatic control or data processing system that is entirely independent of the processor system 18. The user, by way of an eleven bit bus 52, supplies eleven position indication signals PIL0-PIL10 to the processor system 18 that specify the desired position of the load 12 that is to be moved by stepping the motor 10. The desired position is indicated in binary form on the eleven position lines PIL0-PIL10 where line PIL0 is the least significant bit of the position data. The use of 11 bits provides two thousand fourty seven distinct positions, each of which is represented by one of the two thousand forty seven steps of the motor 10 discussed above in conjunction with FIG. 6. The user, by way of a lead 54, provides a direction signal DIR to the processor system 18 that indicates whether the motor 10 is to be rotated clockwise or counterclockwise to arrive at the desired location indicated by the binary signals PIL0-PIL10. The user controls 20 generates a most significant bit enable signal MSBENA on a lead 56 to the processor system 18 and a least significant bit enable signal LSBENA on a lead 58 to the processor system 18. These two signals, MSBENA and LSBENA, enable the processor system 18 to accept the eleven bit position data PIL0-PIL10 from eight of the bus 52 lines of 11 of the bus 52 lines. This is desirable whenever the user controls 22 include a data handling system that includes an eight bit, rather than an eleven bit, word. When eight of the eleven bus 52 lines are used for presenting the position data to the processor system 18, the presence of the LSBENA signal enables the transfer of the least eight PIL0-PIL7 significant bits of the eleven bit position data to the processor system 18 on the first eight leads of the eleven lead bus 52. The presence of the MSBENA signal enables the transfer of the DIR signal to the processor system 18 by way of the lead 54 and the transfer of the remaining three most significant bits PIL8-PIL10 of the eleven bit position data to the processor system on the first three leads of the eleven lead bus 52. The order of occurence of the MSBENA and LSBENA signals is immaterial to the processor system 18 as long the data inputs remain consistent with the above. Simultaneous application of the MSBENA and LSBENA signals will enable simultaneous transfer of the direction DIR signal to the processor system 18 together with all eleven of the position signals PIL0-PIL10.

The user supplies a motion signal A/I on a lead 48 to the processor system 18 that indicates whether the position data PIL0-PIL10 is to be interpreted by the processor system 18 as an absolute number, or address, or whether the position data PIL0-PIL10 specifies the number of steps the motor 10 is to be incremented. When the absolute/incremental A/I signal is high the absolute mode of operation is signified. In this mode, the position data on PIL0-PIL10 is interpreted as an absolute position, where the home position 164 is defined as position zero. The DIR signal indicates whether the desired absolute position is located clockwise or counterclockwise from the present position. When low, the DIR signal indicates clockwise rotation and when high counterclockwise rotation. As will be apparent, if the home position is located at one or the other end of the possible two thousand forty seven steps, no direction DIR signal is necessary in the absolute mode of operation. When the A/I signal is low, the incremental mode of operation is signified. In this mode of operation the position data PIL0-PIL10 indicates the number of steps the motor is to be rotated from its current position. The step rotation is clockwise if the DIR signal is low and counterclockwise if the DIR signal is high.

When the motor 10 is stopped, the processor system 18 will supply a chopped signal having a frequency of about 8 KHZ and a duty cycle of about 25% to the single active winding 156, 158, 160 or 162 in order to keep the motor 10 rotor (not shown) stationary. If the load 12 on the motor 10 is such that this does not provide sufficient holding power, a user supplied low power disable signal (LPD) on a lead 40 is coupled to the processor system 18. The occurrence of this signal will result in the processor system 18 supplying an unchopped, or full DC signal, to the single active winding of the motor 10 to keep it stationary.

As discussed above, the motor 10 is assigned a mechanical reference or home position. The procedure of setting the home position is described below in detail and requires a user supplied home indicate enable signal HIE (active low) that is applied to the processor system 18 by way of a lead 50. This signal must be active HIE when the motor 10 is within 165.degree. of the home position whenever the motor 10 is being homed.

A STOP signal supplied by the user on the lead 46 to the processor 18 will result in the motor 10 being decelerated to a stop and can be applied during motor 10 movement. Once the motor 10 has been homed as described below, the motor 10 can be moved from its current position back to the home position by the occurrence of a user supplied home request signal HR on a lead 42 to the processor system 18. Then after the direction DIR and position PIL0-PIL10 of a desired motor move has been entered into the system together with the type of move denoted by the A/I signal, a user supplied motion request signal MR on a lead 44 to the processor system 18 will cause the motor 10 to move from its current position to the new position.

During the course of the operation of the system illustrated in FIG. 1, the processor system 18 may supply signals indicative of the system operation to the user. For example, an ERROR signal will be supplied to the user controls 20 from the processor system 18 by way of a lead 64 whenever the motor 10 jams, whenever a STOP signal is entered, or whenever the motor 10 rotates eight full steps past the midpoint test region during a type III move. This move is described in detail hereinbelow. Also, an acknowledge signal ACK will be supplied to the user controls 20 from the processor system 18 by way of a lead 62 whenever the motor 10 is not moving.

As will now be apparent, the processor system 18 will control the stepper motor 10 in accordance with the control signals received from the user controls 20 and the motor position signals ENC1, ENC2 and HI provided by the optical encoder associated with the stepper motor 10. As illustrated in FIG. 1, the processor system 18 is a programmed, automatic data processing system that preferably includes a microprocessor chip 74 having an input/output (I/O) chip 72 operably coupled thereto. The system program is stored in three programmed read only memories 66, 68 and 70. Also part of the system is a custom LSI chip 76, the internal organization of which is discussed below in conjunction with FIG. 2. In accordance with a preferred embodiment of the present invention the microprocessor 74 constituted a MOS Technology Inc. Microprocessor 6503 and the I/O chip 72 constituted a MOS Technology Inc. Microprocessor 6530 I/O chip. Both of these MOS Technology Inc. devices are described in detail in the "MCS 6500 Microcomputer Family Hardware Manual" copyrighted 1975 by MOS Technology Inc., 950 Rittenhouse Road, Norristown, Pa. 19401, the contents of which are incorporated herein by reference. In accordance with a preferred embodiment of the present invention, the three PROMS 66, 68 and 70 constituted three Model HM-7641 chips from Harris Semiconductor, a division of the Harris Corporation of Cleveland, Ohio. All of the processor system 18 output signals emanate from the I/O chip 72. Input signals relating to the type of motor 10 motion desired such as A/I, HR, MR and motor 10 control signals such as HIE,LPD, HI and STOP are inputted into the processor system 18 by way of the I/O chip. The ENC1 and ENC2 signals for determining the speed and location of the motor 10 are input into the processor system 18 by way of the LSI chip 76 as are the motor direction DIR and position designation signals PIL0-PIL10, MSBENA and LSBENA. The system includes an eight bit D0-D7, bidirectional data bus 80 that interconnects the microprocessor 74, I/O chip 72, LSI chip 76 and the three program storage chips 66, 68 and 70. All data and instructions are carried on the data bus 80. An eight bit A0-A7, unidirectional address bus 78 couples the microprocessor 74 generated addresses to the I/O chip 72, LSI chip 76 and the program storage chips 66, 68 and 70. A plurality of chip select leads 82, 84, 86, 88, 90 and 92 emanate from the microprocessor 74. Predetermined ones of these leads are coupled to the I/O chip 72, LSI chip 76 and program storage chips 66, 68 and 70 in a manner as shown in FIG. 1. In general, the microcomputer 74 generated signals on the chip select leads 82, 84, 86, 88, 90 and 92 determine which of the remaining chips is to be selected for data withdrawal therefrom or insertion of data therein while the microcomputer 74 generated signals on the address bus 78 determines what data is withdrawn or where entered data is placed. As will be apparent to those skilled in the art, a predetermined combination of both chip select signals and address signals can be used for both selective chip actuation and addressing.

Each time power is applied to the processor system 18, it is necessary that the supply voltages and system clocks be stabilized before a reset signal RES is applied. This is required so that the processor system 18 will always initialize into a known state and is accomplished by having the RES signal remain low after power is turned on until all voltages and clocks are stabilized after which RES becomes high to reset the system. This is provided by a first RC circuit that includes a resistor 102 coupled between a positive source of potential and a capacitor 104 the opposite side of which is grounded. The junction of the resistor 102 and capacitor 104 is coupled to I/O chip 72 and the LSI chip 76 by way of a lead 94. When power is turned on the RES signal on lead 94 remains low until the capacitor charges in accordance with the resistor 102 capacitor 104 time constant. When RES does become high the I/O chip 72 and LSI chip 76 clocks and voltages have been stabilized. A similar RES signal is applied to the microcomputer 74 by way of a lead 60 by a second RC circuit that includes a resistor 114 and a capacitor 116. Since the microcomputer 74 must reset last, the time constant of the resistor 114 capacitor 116 is greater than the time constant of the resistor 102 and capacitor 104.

A count of the ENC1 signals performed within the I/O chip 72 enables the processor system 18 to keep track of the location of the load 12. A counter (described hereinbelow in conjunction with FIG. 2) in the LSI chip 76 enables the processor system 18 to monitor the speed of the motor 10. Data flow is from the LSI chip 76 along the data bus 80 to the I/O chip 72 where it becomes available to the microprocessor 74. The frequency of an oscillator (described below in conjunction with FIG. 2) in the LSI chip 76 is controlled by a crystal 118. After being reduced in frequency by dividers, the resulting signal Po is applied to the microcomputer 74 by way of a lead 110. The microcomputer utilizes this Po signal to generate the system clock signal P2. During one half cycle of the clock P2 the address bus 78 is actuated by the microcomputer 74 and during the next half cycle of the clock P2 data transfer takes place by way of the data bus 80. The microcomputer 74 generates a read-write R/W signal that is applied to the I/O chip 72 and the LSI chip 76 by way of leads 100 and 98 respectively. The R/W signal is used to control the transfer of data from the LSI chip 76 to the I/O chip 72 and to control the transfer of data to and from the microprocessor 74 and the I/O chip 72. The I/O chip 72 will generate a non-maskable interrupt NMI on a lead 96 to the microprocessor 74 whenever the I/O chip needs service from the microprocessor 74. The LSI chip 76 generates an interrupt IRQ (active low) signal on a lead 108 to the microprocessor 74. This interrupt signal IRQ is used to update the motor 10 winding energization signals W1-W4 during the course of moving the load 12 by the motor 10 under control of the processor system 18 program.

The internal organization of the LSI chip 76 is illustrated in block diagram form in FIG. 2. The chip includes a 3.58 MHz oscillator and frequency divider circuit 140. The frequency of the oscillations are closely controlled by the 3.58 MHz crystal 118. The frequency of the oscillations are divided by four to produce a 895 KHz signal P0 that, as described above, is utilized by the microcomputer 74 to produce a 895 KHz clock signal P2. The eleven bit position signals PIL0-PIL10 and the single bit direction DIR signal are temporarily stored in a twelve bit latch circuit 138 and are coupled to the processor system 18 data bus 80 by way of a bus 148 and a tri-state steering logic circuit 144. The encoder ENC1 and ENC2 are also coupled to the system data bus 80 by way of the steering logic 144. The clock pulses P2 on lead 112 are applied to a fifteen bit counter 134 which is used to time the motor 10 step motion in order to enable the speed, or angular velocity, of the motor 10 to be calculated by the processor system 18. The counter 134 counts the clock pulses P2 during one complete cycle of the ENC1 signal (FIG. 4), which corresponds to one complete step of the motor 10. The ENC1 signal is coupled to the counter 134 by way of a lead 152. At the end of the step, when ENC1 goes from high to low, the count in the counter 134 is transfered to a fifteen bit latch circuit 136 by way of a fifteen bit bus 146. In the event that the counter 134 were to count to a full count, a jam of the motor 10, or a motor 10 speed less than that allowed, would be indicated and the motor 10 would be automatically stopped in a manner as is described hereinbelow in detail. The count in the latch 136 is coupled to the processor system 18 data bus 80 by way of a bus 150 and the steering logic 144. The counter 134 is disabled during the time the count therein is transfered into the latch circuit 136 which requires a time interval equal to two clock pulses P2. Accordingly, the counter 134 is preset to a count of two before it is enabled to count the remaining time interval of the next ENCl cycle. The ENCl signal is also applied to an interrupt generator 142. Each time the ENCl signal makes a low to high transistion (FIG. 4) the interrupt generator 142 will produce an interrupt signal IRQ on the lead 108 that is utilized by the processor system 18 to update the driving signals W1-W4 of the motor 10. The interrupt generator 142 is reset under control of the processor system 18 program. The data stored within the latches 136 and 138 of the LSI chip 76 are selectively coupled to the system data bus 80 by the occurrence of the appropriate signals on the address bus 78 and the chip select signal on the lead 83 which are coupled to a gated AND function decoder 150, the output of which is coupled to the steering logic 144. The relationship between the address signals and their status (high=H, low=L) and the corresponding data they cause to be read out of the LSI chip 76 are illustrated in FIG. 10.

A full and detailed description of the processor system 18 including the LSI chip 76 is contained in the detailed program listing which is appended to and made part of this specification and the program flow charts illustrated in FIGS. 11-24.

Before consideration of the operation of the overall system illustrated in FIG. 1, it will be helpful to consider the various types of moves imparted by the processor system 18 to the motor 10 and the various routines and procedures that are performed by or in conjunction with the processor system 18. In accordance with the present invention, a type I move is imparted to the motor 10 whenever the motor 10 is to be moved less than a first predetermined number of steps, a type II move is imparted to the motor 10 whenever the motor 10 is to be moved more than the first predetermined number of steps but less than a second predetermined number of steps, and a type III move is imparted to the motor 10 whenever the motor 10 is to be moved more than the second predetermined number of steps. A type I move is made whenever the motor 10 is to be moved only a few steps and a type II move is made whenever the move is not long enough to make a type III optimal. In accordance with an embodiment of the present invention that was constructed, a type I move occurred when the motor 10 was moved eight steps or less, a type II move occurred when the motor 10 was moved from nine to ninety nine steps, and a type III move occurred when the motor 10 moved more than ninety nine steps.

The velocity versus time or distance of a type I move is illustrated by a curve 165 in FIG. 7. As shown, the motor 10 is initially accelerated slightly and then decelerated to a stop. This is accomplished by the processor system 18 activating the ZBYP signal and impressing a 15.degree. lead angle on the motor 10 windings to initiate the move. After the first ENCl transition, the lead angle is increased by 7.5.degree.. During the last two full steps of the move the lead angle of the motor 10 drive signals W1, W2, W3 and W4 is not changed. Rather, at the beginning of the last two steps of the move bias damping is initiated to stop the motor 10 at the desired location. Bias damping is described in detail hereinbelow. Once the motor 10 is stopped bias damping is removed leaving only the appropriate single motor 10 winding 156, 158, 160 or 162 energized, the single activated winding drive signal W1, W2, W3 or W4 will be chopped if the LPD signal is inactive but will constitute a full DC signal if the LPD signal is active, and the ACK signal will be active. During a type I move, the angular velocity of the motor 10 is prevented from exceeding six hundred full steps per second by the heavy damping when T5 is conducting. As will be apparent to those skilled in the art, this is accomplished by the programmed data processing system 18 determining the speed of the motor 10 by the time occurrence of the ENCl pulses and then controlling the motor 10 drive signals W1-W4 to insure that the motor 10 speed is controlled as desired.

The velocity versus time, or distance, of a type II move is illustrated by curves 167 and 169 in FIGS. 8A and 8B, respectively. As shown in FIG. 8A, the motor 10 is accelerated for a predetermined portion of the move after which the motor 10 is decelerated to a stop at the desired position. The entire move is controlled by the processor system 18 which causes the ZBYP signal to become inactive at the start of the move and causes the lead angle of the motor 10 drive signals W1-W4 to have a lead angle of 15.degree. to initiate the move of the motor 10. At each transition of the ENCl signal after the move is initiated, the lead angle is set to 26.25.degree.. At the high to low transition of the ENCl signal immediately preceding the point where the motor 10 position is five full steps before three fourths of the total move length, deceleration begins. The beginning of the actual deceleration of the motor 10 is indicated by the vertical line 166 in FIGS. 8A and 8B. When deceleration begins, the lead angle of the drive signals W1-W4 is switched to a lag angle of 3.75.degree. and at each ENCl transition 10 thereafter the lag angle changes from 11.25.degree. to 3.75.degree.. This resetting of the 11.25.degree. lag angle continues until the time between two ENCl transitions (the time of a half step of motor 10 motion) exceeds seven hundred fifty microseconds, at which point the motor 10 velocity is low enough to be brought to a complete stop at the desired position by executing a type I move as described above. The final position of the motor 10 is indicated by the vertical line 168 in FIGS. 8A and 8B. During acceleration, the motor 10 speed is prevented from exceeding two thousand one hundred ninety full steps per second. The velocity profile of FIG. 8A is that of a type II move during which the motor 10 velocity does not reach the maximum allowed velocity. The speed profile of a type II move during which the maximum motor 10 velocity is reached is shown by the curve 169 of FIG. 8B. Reference to FIG. 8B shows that at the time, or position, indicated by the vertical line 170, the motor 10 reached the maximum permissible velocity of 2,190 full steps per second. Thereafter the motor 10 speed remains constant, as shown by the flat portion of the curve 169, until the time 166 of deceleration is reached.

The velocity versus time, or distance, of a type III move is illustrated by curves 171 and 173 in FIGS. 9A and 9B, respectively. As shown in FIG. 9A, the motor 10 is accelerated, as in a type II move, for a predetermined portion of the move length after which the motor 10 is temporarily decelerated. During this temporary deceleration, the deceleration characteristics of the motor 10 and the load 12 are measured by the processor system 18 and the number of steps needed to decelerate the motor 10 to a stop from the motor 10 velocity existing just prior to the temporary deceleration is calculated. After the completion of the temporary deceleration, the motor 10 is accelerated to the velocity that existed just prior to the temporary deceleration after which the motor 10 velocity remains constant. The number of steps required to decelerate the motor to a stop is then calculated by the system. Once the steps remaining in the move are equal to the calculated number of deceleration steps needed to bring the motor 10 to a stop, the motor is decelerated to a stop in accordance with the calculated deceleration requirements. A type III move is accomplished under the control of the processor system 18 and includes inactivating the ZBYP signal and impressing a 15.degree. lead angle on the motor 10 driving signals W1-W4, to initiate the move. At each transition of the ENCl signal after the move is initiated, the lead angle is increased to 26.25.degree. and the motor 10 is accelerated. The system 18 will store the time duration of the complete ENCl cycle (one complete motor 10 step) immediately preceding the midpoint of the move which is indicated by the vertical line 180 of FIG. 9A. As discussed above, this time duration can be utilized to determine the speed of the motor 10. At the high to low transition of the ENCl signal immediately preceding the midpoint 180 of the move, the ZBYP signal is made high. During the next four full steps the motor 10 drive signal's W1-W4 lead angle is set at 26.25.degree. at each transition of the ENCl signal and the motor 10 is then temporarily decelerated by switching the lead angle to a lag angle. The motor 10 is decelerated for two full steps during which time the lag angle is set at 3.75.degree. at each transition of the ENCl signal. The processor system 18 stores the time duration of the first and second deceleration steps by storing the counts in the counter of 134 of FIG. 2 between the consecutive high to low ENCl signal transitions during these first two full steps of deceleration. The processor system 18 also compares the time duration of these two deceleration steps. If the time duration of the second full step of deceleration is greater, by a predetermined amount, than the time of the first full step of deceleration, the number of steps to decelerate the motor 10 to a complete stop from the velocity existing just prior to the temporary deceleration is calculated in a manner as set forth hereinbelow. If the time duration of the second full step is not greater than the first full step of deceleration, the processor 18 discards the time duration of the first step of deceleration and stores and compares the time duration of the third full step of deceleration with the second full step of deceleration. This storing and comparing continues until the time duration of a full step of motor 10 deceleration is greater than the preceeding full step of deceleration by the predetermined amount or until the motor 10 rotates eight full steps past the midpoint 180. In one embodiment of the present invention which was constructed, this predetermined amount of deceleration time difference constituted two counts of the fifteen bit counter 134 shown in FIG. 2. If the eight full steps of motor 10 rotation past the midpoint 180 takes place without the predetermined time difference between adjacent deceleration steps occurring, the motor 10 will be stopped by the processor system 18 activating the motor 10 drive signals W4, W1 and W2 and then waiting two seconds before activating the ERROR signal and the ACK signal, and turning off all drive signals W1-W4 to the motor 10 windings 162, 160, 158 and 156 respectively. When the motor 10 is stopped in this manner, the processor system 18 does not know the location of the motor 10 and the motor 10 must be returned to its home position before another motion request MR by the user can be executed.

If the predetermined time difference between adjacent full steps of deceleration does occur, the processor system 18 will calculate the number of steps NS of constant deceleration needed to bring the motor 10 to a stop from a velocity equal to the motor 10 velocity that existed just prior to the temporary deceleration, by the following equation ##EQU1## where T1 is the time duration of a full step of motor 10 deceleration that exceeds the time duration T0 of the preceding full step of deceleration by at least the predetermined amount. The constant N is a safety factor set equal to (8) eight to prevent overshoot of the motor 10 when it is brought to a stop.

As shown by the curve 171 of FIG. 9A, once the temporary deceleration has provided the data to enable the number of deceleration steps to be calculated, the motor 10 is again accelerated and the ZBYP signal inactivated. This is accomplished by the processor system 18 again setting the lead angle of the motor 10 drive signals W1-W4 to 26.25.degree. at each ENC1 signal transition. The motor 10 will be accelerated by the processor system 18 to the speed that existed just prior to the temporary deceleration. The time duration of the full step of motor 10 motion just prior to the temporary deceleration stored in the processor system 18 is utilized by the processor system 18 to maintain the speed of the motor 10 at the velocity that existed just prior to the temporary deceleration until the number of steps remaining in the move is equal to the calculated number of deceleration steps needed to stop the motor 10. When this point is reached the motor will be decelerated by the processor system 18 activating the ZBYP signal and switching the motor 10 drive signals W1-W4 to a lag angle of 3.75.degree. and at every half step thereafter (at every transition of the ENC1 signal) the lag angle changes from 11.25.degree. to 3.75.degree.. The beginning of the deceleration is indicated by the vertical line 182 in FIG. 9A. This continues until the time between any two ENC1 signal transitions (time for a half step) exceeds seven hundred fifty microseconds at which point the speed of the motor 10 is slow enough to enable the motor 10 to be stopped by a type I move. The motor 10 is thus stopped at the desired location at the end of the move indicated by the vertical line 184 in FIG. 9A.

As will now be apparent, the motor 10 receives substantially the same deceleration from the drive signals W1-W4 during the deceleration portion of a type II and type III move and during the temporary deceleration portion of a type III move. Additionally, when performing a type III move, the motor 10 is preferably accelerated to the velocity that existed just prior to the temporary deceleration before the motor 10 is decelerated to a stop in accordance with the calculated number of deceleration steps. As will also be apparent, a type III move is a real time adaptive motor 10 control method that measures specific, real time characteristics of the motor 10 and load 12 to calculate the appropriate number of deceleration steps NS and performs the necessary deceleration to stop the motor 10 at the desired position all within a single system displacement or move.

During the two motor 10 acceleration portions of a type III move, the motor speed is prevented from exceeding two thousand one hundred ninety full steps per second. The velocity profile of FIG. 9A is that of a type III move during which the motor 10 speed does not exceed the maximum allowed velocity. The speed profile of a type III move during which the maximum motor 10 speed is reached is shown by the curve 173 of FIG. 9B. Reference to FIG. 9B shows maximum allowable motor 10 speed prior to the time 180 by the flat portion of the curve 173 to the left of the vertical line 180 and maximum allowable motor 10 speed prior to the time 182 of deceleration to a stop by the flat portion of the curve to the left of the vertical line 182.

As described above, bias damping is utilized at the end of a type I, II and III move. This is done to damp any motor 10 oscillations that may exist to enable a smooth stop to be made at the final position. Bias damping is performed under control of the processor system 18 which, when the motor 10 has moved to within one full step of the final position, initially turns off all drive signals W1-W4 to the motor 10. When the next high to low transition of the ENC1 signal occurs, the winding 162, 160, 158, or 156 on which the motor 10 is to stop and the two windings adjacent to it are energized. This is maintained for ten milliseconds after which the adjacent windings are de-energized. The power applied to the single winding on which the motor is stopped is chopped, or is an uninterrupted DC signal depending upon the level of the LPD signal, as was described above.

As discussed above, the motor 10 velocity is prevented from exceeding a speed of two thousand one hundred ninety full steps per second during the acceleration portions of a type III and a type II move. This is accomplished by the processor system 18 detecting the time duration of the ENC1 signals and deactivating the motor 10 drive signals W1-W4 until the next high to low transition of the ENC1 signal whenever the speed of the motor 10 exceeds two thousand one hundred ninety full steps per second.

A STOP signal on the lead 46 to the processor system 18 will cause the motor 10 to be stopped. This is accomplished by the processor system 18 changing the motor 10 drive signals W1-W4 to a lag angle of 3.75.degree. and simultaneously activating the ZBYP signal. At every ensuing transition of the ENC1 signal the lag angle of the drive signals W1-W4 is set to 3.75.degree.. When the motor 10 slows to the point where the time between a high to low and low to high transition (one half step of the motor 10) exceeds seven hundred fifty microseconds, bias damping is turned on to stop the motor 10 and the ERROR and ACK signals are activated. The STOP signal is sensed by the processor system 18 during any acceleration of the motor 10 except during the first four steps of the homing procedure or when the HIE signal is active.

Each time power is applied to the stepper motor 10 control system illustrated in FIG. 1, the stepper motor 10 must be homed to a mechanical reference position, as discussed above, so that the processor system 18 can keep track of the load 12 by keeping track of the steps moved by the motor 10. In order to home the motor 10, the user controls 20 must supply a HR signal together with information concerning the direction the motor 10 is to be driven from its current position by means of the DIR signal. The A/I signal has no effect on the system when the motor 10 is being homed. The system will also ignore any motion request MR signals supplied by the user until the motor is homed. Once the user has located the motor 10 to within 165.degree. of motor 10 rotation of the desired home position, the user activates the HIE signal with the HI signal, that occurs once for each full rotation of the motor 10, indicates the location of the home position to the processor system 18.

When the homing procedure is first initiated, the processor system will step the motor 10 to position it to a known winding 162. As discussed above, this position occurs when the drive signal W1 is present and is applied to the motor 10 winding 162. If the DIR signal is low the motor 10 is stepped in a counter clockwise direction to position the disk 16 by sequentially energizing each of the winding drive signals W2, W3, W4, and W1 for 16 milliseconds. If the DIR signal is high, the motor 10 is stepped in a clockwise direction to position the disk 16 by sequentially energizing each of the winding drive signals W4, W3, W2 and W1 for sixteen milliseconds. The motor 10 is driven to position the disk 16 at a rate of sixteen milliseconds per full step after which the motor 10 is driven at an upper limit speed of one and seven tenths milliseconds per full step, or six hundred steps per second, until the HIE signal is activated by the user. The occurrence of the HIE signal causes the processor system 18 to activate the ZBYP signal and drive the motor forward at a rate of fourty six milliseconds per full step or substantially twenty two full steps per second until the HI signal becomes active due to the position of the disk 16 with regard to the light path 126. The simultaneous occurrence of the HIE and HI signals results in the motor 10 being stopped in the home position with the disk 16 in the position shown in FIG. 3 by application of bias damping and only the drive signal W1 remaining active. Once the motor 10 is stopped at the home position, bias damping is removed and the ACK signal becomes active. Once successfully homed, the motor 10 can be moved to any one of the possible two thousand fourty seven step positions by application of the proper user control signals MR, PIL0-PIL10, DIR and A/I.

The processor system 18 will respond only to a HR request signal and not to a MR request signal whenever power is turned on and the system resets but the homing procedure has not been carried out or when the homing procedure is not successfully completed after the HR signal is made active. A homing procedure is considered by the processor system 18 to be unsuccessful if the user supplied STOP signal becomes active before the motor 10 reaches the home position, the motor 10 moves more than twenty nine full steps after the HIE signal becomes active and the HI signal did not become active, the motor 10 becomes jammed, a half step takes longer than 20 milliseconds when HIE is inactive or a half step takes longer than one and thirty three hundredths of a second after the HIE signal becomes active and the home position is not reached. As will be apparent from the above, the user must insure, during the homing procedure, that the user supplied HIE signal is coincidental with the disk 16 generated HI signal when the motor 10 is in the home position.

The processor system 18 will monitor the motor 10 for a minimum predetermined speed of 25 full steps per second during any move except for the last full step of a move and except during the last steps of the homing procedure when the HIE signal is active but the HI signal does not become active. The total elapsed time during these last steps of the homing procedure when HIE only is active is limited to one and thirty three hundredths seconds after which the processor system 18 activates the drive signal W1 and causes the motor 10 to be stopped in accordance with the same procedure as described above when both the HIE and HI signals are active during the homing procedure. This will also cause the ERROR signal to be activated and the system will not respond to a MR signal until the homing procedure is successfully completed. During those moves when the motor 10 speed falls below the permissible low speed of twenty four full steps per second, the motor 10 will be stopped at the nearest energized single winding and the ZBYP, ERROR and ACK signals will be active.

The processor system 18 will generate the ACK signal whenever the motor 10 is stopped in response to a STOP signal, no change occurs in the state of the ENC1 signal for twenty milliseconds, or when the motor 10 reaches its final position. The ACK signal will remain low for ten milliseconds after the last full step of a move while motor 10 oscillations, if any, settle. The processor system 18 will generate the ERROR signal during a move when no change of state of the ENC1 pulse occurs for twenty milliseconds, when the STOP signal is activated, when the motor 10 rotates eight full steps past the midpoint during the midpoint temporary deceleration portion of a type III move, or when the motor 10 does not achieve the home position in twenty nine full steps after the HIE signal is activated during a homing procedure. The processor system 18 will generate the ZBYP signal whenever the motor 10 is being stopped or is stopped such as when the HIE signal is active during a homing procedure, a motion request or a homing procedure has been completed, the STOP signal is made active, the motor 10 is decelerated, during a type I move or when four full steps remain to the point of deceleration when a type III move is being made.

As will now be apparent from the description set forth hereinabove, each time power is applied to the stepper motor control system illustrated in FIG. 1, it is necessary to home the motor 10 to the mechanical reference position before the processor system 18 will accept a motion request MR signal from the user. Once homed and the motor 10 is stopped as evidenced by the ACK signal being active, the user may move the motor 10 load 12 to any one of the two thousand forty seven descrete positions by supplying a motion request MR signal, a direction DIR signal that indicates the desired direction of rotation of the motor 10, a plurality of position signals PIL0-PIL10 that identify the position the motor 10 is to be moved to, and an absolute/incremental signal A/I that indicates whether the position signals PIL0-PIL10 are an absolute address to which the motor 10 is to be moved or the number of steps the motor 10 is to be moved from the home position. Once the move has been completed, it is not always necessary to return the motor 10 to the home position before performing another move. For example when operating in the absolute mode, any number of successive absolute moves can be made without homing the motor 10 before each move. Also, when operating in the absolute mode, the mode of operation can be changed from absolute to incremental without returning the motor 10 to the home position. When operating in the incremental mode, any number of successive incremental moves may be made without returning the motor 10 to the home position. However, when operating in the incremental mode of operation, the mode of operation cannot be changed to the absolute mode without first returning the motor 10 to the home position. As long as power to the system has been uninterrupted, a user supplied home request HR signal will return the motor 10 to the home reference position from which a new move can be made. During any move, the motor 10 can be stopped by the occurrence of a user supplied STOP signal. Also, if the motor 10 jams or its speed is less than the predetermined low speed, the processor system 18 will automatically stop the motor 10. Generally, user generated motion signals are not accepted and/or have no effect on the system if they are made active while the motor 10 is in motion as evidenced by the ACK signal being low.

Each time a motion request is made, the processor system 18 will automatically check the number of steps in the move and will accelerate and decelerate the motor 10 in accordance with one of three types of motion procedures discussed above in detail. Type I moves are limited to motion requests of only a few steps and result in only a short duration of acceleration and deceleration being supplied to the motor 10. Type II moves occur when more than a few motor 10 steps are requested but less steps than required for a type III move. A type II move includes accelerating the motor 10 over a predetermined portion of the move followed by decelerating the motor 10 to a stop during the remaining portion of the move. Type III moves are involved when the number of steps in the move exceed a predetermined number. During a type III move the motor 10 is accelerated and then decelerated to a stop. Prior to being decelerated to a stop, however, the motor 10 is temporarily decelerated for a short period during which time the real time deceleration characteristics of the move are measured and the steps needed to decelerate the motor 10 to a stop are calculated as described in detail hereinabove. When the steps remaining in the move are equal to the calculated number of steps required to decelerate the motor 10 to a stop, the motor 10 is decelerated to a stop substantially in accordance with the calculated deceleration requirements. During any move the processor system 18 will prevent the motor 10 from exceeding a predetermined maximum angular velocity.

As discussed above, each complete ENC1 signal 128 (FIG. 4) corresponds to one complete step of the motor 10 and each half cycle of the ENC1 signal corresponds to a half step of the motor 10. As will be apparent to those skilled in the art, the motor 10 may effectively have twice the number of steps per complete revolution thereof as far as the processor system 18 is concerned, if each half cycle of the ENC1 signal is interpreted by the processor system 18 as a complete step of the motor 10. This would result in more accurate control of the motor 18 by the processor system 18.

Attached hereto and made part of this specification is a program listing of the computer program which was utilized with the system illustrated in FIG. 1 to obtain the results and operations discussed hereinabove. Programming instructions and characteristics of the MCS 6530 microprocessor 74 and I/O chip 72 are fully described in the "MCS Microcomputer Family Programming Manual" copyrighted 1976 by MOS Technology Inc., 950 Rittenhouse Road, Norristown, Pa. 19401 the contents of which are incorporated herein by reference. The format of the attached program listing is such that the far left column includes the program card number of the program statement. Going from left to right, this is followed by the address location for the program statement and then the computer 72 code for the program statement or instruction. The next column contains the program statement operation code in nemonic form and is followed by the operand and then additional program statement comments. In addition to the program listing, FIGS. 11-24 illustrate the attached program listing in the form of flow charts. The initial portion of the attached program listing is devoted to symbols used within the program together with their definition and addresses, if any, and are identified by program card numbers one through sixty eight. Various options and time constants are identified by program card numbers seventy through one hundred seven.

Once power to the system is turned on, it is necessary to set up all of the initial internal conditions within the system illustrated in FIG. 1. This routine is identified by program card numbers one hundred nine through one hundred thirty six in the program listing and is illustrated in FIG. 11. Once power has been turned on and the system has been reset, the system will look for a home request HR signal if it has not yet been homed or a motion request MR signal it the system has been homed. This monitoring routine is identified in the program listing by program card numbers one hundred thirty eight through one hundred eighty and is illustrated in FIG. 12. Once power is turned on and a HR signal is activated, the system can be homed to the mechanical reference position. This routine is identified in the program listing by program card numbers one hundred eighty two through three hundred thirty one and is illustrated in FIG. 13. The motor 10 can be stopped, as described above, by the occurrence of the user supplied STOP signal. This routine is identified in the program listing by program card numbers three hundred thirty three through three hundred thirty nine and is illustrated in FIG. 22. As discussed above, when the motor 10 is stopped in this manner, the system knows the location of the motor 10 and the load 12. When the motor is jammed or is unable to reach the predetermined minimum speed, the motor 10 will be automatically stopped by the processor system 18. This routine is identified in the program listing by program card numbers three hundred forty one through three hundred ninety three and is illustrated in FIG. 23. When the motor 10 is stopped in this manner, the system does not know the location of the motor 10 and the load 12 and the motor 10 must be returned to the home position before a motion request MR signal will be acted upon. Once the motor 10 has been homed and the MR signal is active, the motor 10 will be automatically moved in accordance with a type I, II or III move procedure. This routine is identified in the program listing by program card numbers three hundred ninety five through eight hundred ninety and is illustrated in FIGS. 14, 15, 16 and 17. The bias damping routine which is used to bring the motor 10 to a complete stop is identified in the program listing by program card numbers eight hundred ninety two through one thousand thirty nine and is illustrated in FIG. 19. When the motor is stopped a check is made to make certain that the motor 10 has not reversed direction. This routine is identified by program card numbers one thousand forty one through one thousand one hundred thirty one and is illustrated in FIG. 24. The routine that prevents the motor 10 from exceeding the predetermined maximum speed is identified in the program listing by program card numbers one thousand thirty two through one thousand two hundred eighteen and is illustrated in FIG. 20. When being decelerated to a stop, the motor 10 speed is reduced until the time between any two ENC1 signal transitions exceeds seven hundred fifty microseconds after which the motor 10 is automatically stopped during the next step. This routine is identified by the program card numbers one thousand two hundred twenty through two thousand two hundred twenty and is illustrated in FIGS. 18 and 21. Program card numbers one thousand two hundred seventy six through 1,303 identify the motor 10 winding 162, 160, 158 and 156 commutation for clockwise and counterclockwise rotation. Program card numbers one thousand three hundred and five through one thousand three hundred twelve identify the location of the interrupt vectors. The remainder of the program listing includes a table of the symbols used in the program.

Any deviation in the drawings or description contained herein from the system defined by the appended detailed program listing is inadvertent. Any such deviation or ambiguity is to be resolved by reference to the appended detailed program listing which is controlling as regards the operation of the apparatus of this invention. ##SPC1## ##SPC2## ##SPC3##