Phase-Shifting Multiplication Type FM Signal Demodulation Circuit

The present invention relates to a phase-shifting multiplication type FM signal demodulation circuit.

FIG. 1 is a circuit diagram showing a demodulation circuit of the above type. In the figure, reference numeral 1 denotes an input terminal for FM signal S.sub.1, 2 a local oscillation circuit, 3 a frequency mixer which functions to mix the FM signal S.sub.1 from the input terminal 1 with a signal S.sub.3 output from the local oscillator 2 thereby to produce an FM intermediate frequency signal S.sub.2 (10.7 MHz), and numeral 4 designates an amplifier for amplifying the intermediate frequency signal from the frequency mixer or converter 3. The amplifier 4 may be composed of a direct-coupling type differential amplifier having the function of limiting the amplitude of the intermediate frequency signal. The phase-shifting multiplication type demodulation circuit for demodulating the signal from the amplifier 4 is denoted generally by reference numeral 5 and includes a first differential switching circuit 120 A composed of paired transistors 121 and 122 and adapted to be switched by the FM intermediate signal S.sub.2 from the amplifier 4, a phase shifting element 220 designed to shift the phase of the FM intermediate signal, a phase-shifter apparatus 200 comprising a resonance circuit 210 for converting the phase or frequency of the FM intermediate signal S.sub.2 ' which has been phase-shifted by the phase shifting element 220, a second differential switching circuit 120B composed of paired transistors 123 and 124 and adapted to be switched by the phase-converted signal available from the phase-shifter circuit or device 200, a detector circuit 170 for detecting the signal appearing at the output stage of the second switching circuit, and an output resistance 300' for determining the magnitude of the demodulated output from the demodulation circuit. The major portion 100 of the FM demodulation circuit 5 as represented by broken lines is implemented in a form of an integrated circuit configuration. The resonance circuit 210 has a resonance resistor 213 which is provided as an externally accessible element so that the distortion of the demodulated output may be reduced. Numeral 6 denotes a low-pass filter and 7 a tuning indicator.

In the demodulation circuit shown in FIG. 1, the first switching circuit 120A is driven by the FM intermediate frequency signal S.sub.2 supplied to the input terminal 100 a of the demodulation circuit, while the second switching circuit 120B is adapted to be driven by the signal S.sub.2 ' phase-shifted through the phase shifter circuit 200. Accordingly, in the case where a constant current I.sub.130 from a constant-current supply source is allowed to flow through diodes (or resistors) 161 and 162 provided at the output of the second switching circuit 120B only for a period during which an input signal is present at the input of the second switching circuit 120B, and diodes (or resistors) 161 and 162 provided at the output stage of the second switching circuit 120B, a current signal having a pulse width corresponding to the phase difference between the signals S.sub.2 and S.sub.2 ' will flow through the diodes 161 and 162 and give rise to variation in the voltage across the diodes 161 and 162. The averaged value of such voltage variation is derived through a low-pass filter 400. In this manner, D.C. voltage variation corresponding to the phase difference described above can be obtained and thus an FM modulated input signal will be demodulated. Since the demodulating operation of the demodulation circuit 5 is based on the same principle as that of the demodulation circuit described hereinafter, detailed description of the demodulating operation is omitted at this point.

In connection with the demodulation circuit unit of the type described above, it is frequently demanded by the users that the magnitude of the demodulated output from the demodulation circuit could be conveniently or optionally changed in dependence upon the variety of amplifiers or the like circuits connected as a succeeding stage of the demodulation circuit. However, it is difficult to satisfy such demand in practice in the case of the demodulation circuits for the following reasons.

Namely, in the case of the demodulation circuit shown in FIG. 1, two means are conceivable for varying the magnitude of the demodulated output. The first means will be the externally accessible resonance resistor 213 of the resonance circuit 210 which can be so adjusted as to influence the distortion as well as the magnitude of the demodulated output. Another means may be provided by an output resistor 300' which is also provided as an externally accessible element at the time of manufacturing the major portion 100 of the demodulation circuit 5 in an integrated circuit so that the resistance value of the discrete output resistor 300' may be externally varied.

The first means is however disadvantageous in that distortion of the demodulated output will undergo changes as the output is varied. More particularly, when the resistance value R.sub.213 of the resonance resistor 213 is increased, then the frequency-versus-phase characteristic (FIG. 4) of the resonance circuit 210 will be changed with the inclination or slope of the characteristic curve being increased or steepened, which brings about an increase in the distortion along with the increased magnitude of the demodulated output. On the other hand, decreased resistance value R.sub.213 of the resonance resistor 213 will result in a small slope of the above characteristic curve, involving decrease in the magnitude and distortion of the demodulated output. Such phenomenon is generally known in the art. Further, the switching function of the second switching circuit 120B constituting the gate circuit 120 will tend to become imperfect. This is because the resonance resistor 213 operates also as the bias resistor for the second switching circuit 120B and decreased resistance value of the resistor 213 is inevitably accompanied with a decreased bias voltage applied to the second switching circuit 120B.

The second means described above is impractical in that the output resistor 300' can not be implemented as a discrete externally accessible element, because in such cases the demodulated output appearing at the output terminal will become non-uniform for the following reasons.

In general, in the case of the integrated circuits, deviation of resistance values of resistors can be retained in the range of .+-.5%. However, the deviation of resistance in the absolute value would amount to .+-.30%. By way of example, assuming that the individual resistors of the integrated circuit 100 are deviated from the desired or normal values for +30% and the resistance values become 1.3 times as great as the latter, the constant current I.sub.130 flowing in the constant-current source circuit 130 will be decreased to 1/1.3 as accompanied with correspondingly decreased current flow in various circuitries. The current flowing through the output resistor 300' will be of course decreased. Assuming again that the output resistor 300' has resistance value deviated for +30% as is in the case of the individual resistors of the integrated circuit 100 and has 1.3 times as great as the desired value, the voltage drop appearing across the output resistor 300', that is, the output signal of the demodulation circuit may remain uniform, so long as the resistor 300' is incorporated in the integrated circuit. However, if the output resistor 300' is provided as an external discrete element with a view to allowing the adjustment of the demodulated output, there will appear non-uniform or fluctuating signals at the output terminal of the demodulation circuit because the deviation of the resistance value of the discrete output resistor 300' will differ from those of the integrated resistors in addition to the fact that there is no correlation between the magnitude of the constant current I.sub.130 determined by the internal resistances of the integrated circuit and the deviation of the resistance value of the external output resistor 300'. For these reasons, the output resistor 300' could not be provided as the external discrete element in this demodulation circuit.

Accordingly, an object of the invention is to provide a phase-shifting multiplication type FM demodulation circuit of which the output resistor for determining the magnitude of the demodulated output can be composed of an externally provided discrete resistor without incurring unacceptable non-uniformity or fluctuations in the demodulated output.

Another object of the invention is to provide a phase-shifting multiplication type FM demodulation circuit in which the magnitude of the demodulated output therefrom can be optionally varied.

Still another object of the invention is to provide a phase-shifting multiplication type FM demodulation circuit which is suited to be implemented in an integrated circuit configuration.

A further object of the invention is to provide a phase-shifting multiplication type FM demodulation circuit in which demodulation of an amplitude-modulated signal (hereinafter referred to as AM signal) can be reduced.

With the above objects in view, the invention proposes that the resonance resistor which exerts influence on the demodulated output is formed in an integrated circuit together with the switching circuits, etc., while the output resistor is provided as an externally accessible discrete element.

According to an aspect of the invention, the deviation of the constant current of the constant-current source circuit and hence the deviation of the demodulated output as caused by deviation of resistance values of internal resistors implemented in the integrated circuit are compensated by the resonance resistor to suppress fluctuations or non-uniformity in the demodulated output signal.

Since fluctuation or non-uniformity of the demodulated output can be suppressed according to the teaching of the invention, the output resistor can be provided as an externally accessible discrete element. By virtue of this feature, the magnitude of the demodulated output signal of the demodulation circuit can be optionally varied by correspondingly selecting the resistance value of the output resistor.

FIG. 1 is a circuit diagram showing a phase-shifting multiplication type FM demodulation circuit.

FIG. 2 is a circuit diagram showing a phase-shifting multiplication type FM demodulation circuit in accordance with an embodiment of the invention.

FIG. 3 is a signal waveform diagram to illustrate the invention.

FIGS. 4a and 4b illustrate a frequency-versus-amplitude and a frequency-versus-phase characteristic of a resonance circuit for a better understanding of the invention, respectively.

FIG. 5 illustrates the characteristic relationship between a capacitance of a capacitor 230 and an amplitude-modulated signal attenuation for facilitating the understanding of the teaching of the invention.

FIG. 6 is a circuit diagram showing another embodiment of the phase-shifting multiplication type FM demodulator circuit according to the invention.

Now, the invention will be described more in detail with reference to the drawings showing exemplary embodiments of the invention. FIG. 2 is a circuit diagram showing a first embodiment of the invention. In the figure, same parts or elements as those of the circuit shown in FIG. 1 are denoted by like reference symbols.

Referring to FIG. 2, reference numeral 120 denotes a gate circuit adapted to be switched for the output signal S.sub.2 from the amplifier 4. The gate circuit 120 comprises a first switching circuit 120A composed of paired differential transistors 121 and 122, and a second switching circuit 120B composed of paired differential transistors 123 and 124. The common emitter of the paired transistors 121 and 122 is connected to a grounded terminal 100d through a constant-current source circuit 130. The base of the transistor 121 is connected to the amplifier 4 through an input terminal 100a and at the same time to the grounded terminal 100d through a resistor 141 and a bias voltage source 151. The collector of the transistor 121 is connected to the common emitter of the paired transistors 123 and 124. The base of the transistor 122 is connected to the grounded terminal 100d through a resistor 142 and a bias voltage source 151 while the collector thereof is directly connected to a supply source terminal 100e and to a source terminal 100c through a resistor 143. The base of the transistor 123 is connected to the grounded terminal 100d through a resistor 144 and a bias voltage source 152 and at the same time to a terminal 100f. The base of the transistor 124 is connected to the grounded terminal 100d through a resistor 145 and the bias voltage source 152. The constant-current source 130 includes a transistor 131, a supply source 132 and a resistor 133. The constant current I.sub.130 is determined by the supply source 132 and the resistor 133. Resistors 141, 142, 143, 144 and 145 constitute the bias resistors for the switching circuits 120A and 120B. The resistor 144 serves also as the resonance resistor of a resonance circuit 210 and the resistance value thereof is selected at the minimum value allowable in the range in which the stable operation of the switching circuit 120B can be assured. Numerals 161 and 162 denote diodes of which cathodes are connected to the collectors of the transistors 123 and 124, respectively. The anodes of these diodes are connected in common to the current source terminal 100c. Numeral 170 designates a differential amplifier circuit for detecting difference between the gate output signals appearing across the diodes 161 and 162. The differential amplifier circuit comprises a pair of transistors 171 and 172, a current source transistor 173 and a diode 174. The base of the transistor 171 is connected to the collector of the transistor 123 constituting a part of the switching circuit 120B, while the emitter of the transistor 171 is connected to the current source terminal 100c. The transistor 171 has a collector connected to the base of the transistor 173. On the other hand, the base of the transistor 172 is connected to the collector of the transistor 124 constituting the switching circuit 120B, while the emitter of the former is connected to the current source terminal 100c with the collector being connected to the collector of the transistor 173. The base of the transistor 173 is connected to the grounded terminal 100d through a diode 174, while the emitter thereof is directly connected to the terminal 100d. Numeral 200 denotes the phase-shifter circuit which comprises a phase-shifting coil 220 for shifting the phase of the FM intermediate frequency signal derived at the terminal 100e and a resonance circuit 210 for phase-shifting the phase-shifted frequency signal from the shifting coil 220 and feeding to a terminal 100f. The resonance circuit 210 is composed of a coil 211 and a capacitor 212 connected in parallel and has one end connected to the terminal 100f with the other end being grounded through a terminal 200a and a capacitor 230. In this connection, it will be appreciated that a ceramic filter or the like may be employed for the resonance or tuning circuit 210. With such arrangement that one end of the tuning circuit 210 is grounded, the terminal 200a which is supplied with voltage from the bias voltage source 152 through the resistor 144, terminal 100f and the resonance circuit 210 can be used as a reference voltage terminal. Thus, the terminal only for the integrated circuit 100 can be spared. The phase-shifting coil 220 has one end connected to the terminal 100f through a capacitor 240 and the other end connected to the terminal 100e. Reference numeral 300 denotes the output resistor connected between the terminals 100b and 200a. The output resistor 300 is composed of an external resistance element provided discretely from the integrated circuit 100. Provided in a succeeding stage of the output resistor 300 is a low pass filter 400 which serves to eliminate harmonic components of the output signal appearing across the output resistor 300 and supply the demodulated signal (sound signal) to the terminal 5b. Numeral 6 denotes another low-pass filter provided in a succeeding stage of the filter 400 and having a greater time constant than that of the latter. The filter 6 serves to take out the D.C. variation signal appearing at the terminal 5b and hence at the terminal 100b. A tuning indicator 7 is connected between the filter 6 and the terminal 200a. The tuning indicator 7 serves to detect a voltage difference between the terminals 100b and 200a and has a pointer adapted to swing in dependence on the magnitude of the detected level. Thus, the tuning indicator 7 can be utilized for setting distortion of the demodulated output signal. Numeral 8 denotes an automatic frequency control circuit (hereinafter simply referred to as AFC), and 9 designates an ON-OFF change-over switch for AFC. The stationary terminal OFF of the switch 9 is connected to the terminal 200a, while the other stationary contact ON is connected to the output terminal of the low-pass filter 6. The switch 9 has a movable contact connected to a local oscillator 2 through the AFC circuit 8.

Next, the demodulating operation of the FM demodulation circuit will be described.

When no input signal is present in the circuit shown in FIG. 2, the individual transistors of the first and the second switching circuits are in the conductive state or turned "on". The D.C. currents of the same amplitude (1/2 I.sub.130) will flow through the transistors 121 and 122, respectively. In a similar manner, D.C. currents of the same amplitude (1/4 I.sub.130) will flow through the transistors 123 and 124, and the diodes 161 and 162. The same D.C. currents as the ones flowing through the diodes 161 and 162 will flow through the transistors 171 and 172 of the differential amplifier circuit 170. In other words, arrangement is made such that no flow of D.C. signal to the output resistor 300 from the output terminal of the differential amplifier circuit or vice-versa may occur. Accordingly, the output terminal 100b is at the same potential as the voltage reference terminal 200a and no D.C. current will flow through the output resistor 300 connected between these terminals. The pointer of the tuning indicator 7 will not swing.

When a non-modulated FM intermediate frequency signal is supplied to the input terminal 100a, the input signal is derived at the output terminal of the amplifier 4 as the output signal S.sub.2 of a rectangular waveform as shown in FIG. 3A after having been amplified and undergone the amplitude-limiting operation by the amplifier 4. This signal S.sub.2 is supplied to the base of the transistor 121 constituting a part of the first switching circuit 120A. The transistor 121 will then be turned on and off for every 1/2 period of the signal S.sub.2. In a similar manner, the transistor 122 will also perform the ON-OFF switching operation for every 1/2 period of the signal S.sub.2 in response to the operation of the transistor 121. More particularly, the transistors 121 and 122 are alternatively turned or switched on and off for every half period of the signal S.sub.2. Such switching operations of both transistors are illustrated in the signal waveform diagram of FIG. 3. Refer to the waveforms B and C. The signal S.sub.2 is supplied also to the input terminal 100e of the phase-shifter device 200 through the transistor 122 of the first switching circuit 120A. The phase-shifter device 200 is so designed that, when the signal S.sub.2 resonates at the resonance frequency f.sub.o of the resonance circuit 210, the phase of the output signal from the device 200 becomes out of phase from the signal S.sub.2 by about .pi./2 (90.degree.). In the following description, it is assumed that the phase shifting through the device 200 amounts to .pi./2 (90.degree.), for the convenience' sake of description. When the frequency of the signal S.sub.2 is deviated from the resonance frequency f.sub.o of the resonance circuit 210, the phase shifting is effected in accordance with the frequency-versus-phase characteristic curve 210a of the resonance circuit 210 shown in FIG. 4b.

As will be appreciated from the foregoing description, when the signal S.sub.2 is at the resonance frequency f.sub.o of the circuit 210, the signal S.sub.2 supplied to the phase-shifter device 200 will be phase-shifted for .pi./2 (90.degree.) or delayed for .pi./2 (90 .degree.) as is represented by solid line waveform D in FIG. 3 and make appearance at the output terminal 100f of the phase-shifter 200. The delayed signal S.sub.2 ' is supplied to the base of the transistor 123 of the second switching circuit 120B from the terminal 100f. Then, the transistor 123 is turned on and off for every 1/2 period of the signal S.sub.2 ' with the counter-part transistor 124 being responsively turned off and on in a similar manner. In other words, the transistors 123 and 124 are alternatively turned on and off for every half period of the signal S.sub.2 '. Such switching operations of the transistors 123 and 124 are illustrated in FIG. 3 by waveforms E and F, respectively.

In the switching operation described above, when the transistor 121 of the first switching circuit 120A is turned on at the same time with the turn-on of the transistor 123 of the second switching circuit 120B, the current I.sub.161 of the waveform G shown in FIG. 3 will flow through the diode 161 for the duration corresponding to 1/4 period of the signal S.sub.2, which current I.sub.161 can be mathematically expressed as follows: ##EQU1##

On the other hand, when the transistors 121 and 124 of the first and the second switching circuits 120A and 120B are turned on, current I.sub.162 of the waveform H shown in FIG. 3 will flow through the diode 162 for the duration corresponding to one-fourth or 1/4 period of the signal S.sub.2. The current I.sub.162 can be given as follows: ##EQU2##

These currents I.sub.161 and I.sub.162 will then flow to the differential amplifier circuit 170. However, since these currents coincide with the ones flowing through the diodes 161 and 162 at the time when no input signal is present, as described hereinbefore, no current flow will occur at the output terminal of the subtraction circuit. The tuning indicator 7 will also remain as it is.

Next, it is assumed that a modulated FM intermediate frequency signal is supplied to the input terminal 100a and the frequency of the input signal is deviated for .DELTA.f from the resonance frequency f.sub.o of the resonance circuit 210 with the phase being shifted by .theta. as represented by the broken line waveform D in FIG. 3. Under these conditions, the switching operations of the transistors 121 and 122 of the first switching circuit 120A will be deviated in phase by the amount .theta. as represented by the waveforms E and F in FIG. 3. Accordingly, the time durations during which currents flow through the diodes 161 and 162 are such as shown by waveforms I and J in FIG. 3. The currents flowing through the diodes 161 and 162 at the time can be given by the following expressions: ##EQU3##

It will thus be appreciated that the current flowing through the diode 161 is decreased for an amount ##EQU4## due to the phase deviation .theta., while the current in the diode 162 is increased for the same amount.

In other words, averaged currents flowing through the diodes 161 and 162 will vary in proportion to the phase deviation .theta. or the frequency deviation .DELTA.f from the resonance frequency f.sub.o of the resonance circuit, as can be seen from the expressions (3) and (4). Such current variations ##EQU5## are fed to the subtraction circuit and processed in the following manner: ##EQU6## The signal resulting from the subtraction is supplied to the output resistor 300.

Then, current ##EQU7## will flow through the resistor 300. Thus, the output signal e can be obtained, which is given by ##EQU8##

When the output signal e is supplied to the low-pass filter 400 to thereby eliminate harmonic components, then a demodulated signal is available at the output terminal 5.

As will be understood from the equation (8), the magnitude of the demodulated signal is determined by the constant current I.sub.130 of the constant-current source circuit 130, the resistance value R.sub.300 of the output resistor 300 and the slope of the frequency-versus-phase characteristic curve of the resonance circuit 210. Accordingly, the magnitude of the demodulated output signal may be varied by making one of the above three parameters variable. However, since the constant-current source circuit 130 as well as the resonance resistor 213 having an influence to the frequency-versus-phase characteristic of the resonance circuit are intended to be implemented in the integrated circuit, it is impossible to adjust the magnitude of the demodulated output signal by utilizing these two parameters. Such being the case resort is made to the output resistor 300 in order to regulate the magnitude of the output signal e.

In the circuit configuration according to the invention as described above, it is possible to regulate or vary optionally the demodulated output signal by means of the output resistor 300.

It is assumed again that the internal resistances of the integrated circuitry 100 are deviated for +30% from the desired values and are 1.3 times as great as the latter, as is in the case of the circuit described hereinbefore in conjunction with FIG. 1. Then, the constant current I.sub.130 of the constant-current source circuit will be decreased to 1/1.3 I.sub.130, resulting in a correspondingly decreased current flow in the output resistor 300. The demodulated output signal e will of course tend to decrease. However, since the bias resistor 144 which serves also as the resonance resistor of the resonance circuit 210 has the resistance value deviated for +30% from the normal value, the slope of the frequency-versus-phase characteristic curve 210a of the resonance circuit 210 shown in FIG. 4 is correspondingly steepened and effective to increase the demodulated output. Thus, the tendency of the demodulated output signal to decrease is suppressed.

As is well known in the art, the slope of the frequency-versus-phase characteristic curve is proportional to the resonance resistance in the vicinity of the resonance frequency of the resonance circuit. Further, when the resistor 144 is connected in parallel to the resonance circuit 210 as shown in FIG. 2 and the resistance value of the resistor 144 is selected sufficiently small as compared with the resistance value of the tuning or resonance circuit itself, then the slope of the characteristic curve will be proportional to the resistance value of the resistor 144. In this connection, it is to be noted that the resistor 144 is selected at a small value according to the invention as described hereinbefore, and the slope of the frequency-versus-phase characteristic curve is proportional to the value of the resistor 144.

In this manner, in the circuit configuration according to the invention shown in FIG. 2, the possible deviation of the demodulated output signal due to the deviations of the internal resistances of the integrated circuit 100 in respect of the absolute values is corrected by the resistor 144 which is provided in the integrated circuitry 100 and serves also for the resonance resistor of the resonance circuit 210. Thus, it is possible to obtain a uniform demodulator output signal according to the invention.

For the above described reason, the output resistor 300 can be discretely provided independently from the integrated circuit portion, which in turn allows the optional regulation of the demodulated output signal by appropriately selecting the value of the output resistor 300.

Additionally, the small value of the resistance 144 will contribute to reduce the distortion of the demodulated output signal, since the slope of the frequency-versus-phase characteristic curve of the resonance circuit is also made small.

In the above described embodiment, the reference voltage in the integrated circuitry 100, i.e. the voltage of the bias source 151 is supplied through the terminal 100f of the integrated circuitry 100 and the resonance circuit 210. By virtue of such arrangement, the number of terminals for the integrated circuit can be decreased by one. Thus, the circuit configuration according to the invention is advantageously suited for the implementation in a form of the integrated circuit.

It has been observed that, when the demodulation circuit described above is applied to a radio receiver. AM signals (500 KHz to 2.6 MHz) will sometimes be inputted to the input terminal 5a of the amplifier 4 in addition to the FM intermediate frequency signal (10.7 MHz). Such phenomenon becomes more remarkable when an FM signal is to be received in the area near to a broadcasting station sending out AM signal.

In this connection, it is noted that, if an incoming AM signal is of a relatively high amplitude, the AM component, will be effectively suppressed due to the amplitude limiting operation of the amplifier 4. On the other hand, when an AM signal has such a small amplitude as is immune to the amplitude limiting operation of the amplifier 4, then the latter will operate as a linear amplifier, whereby the AM signal will be inputted to the first switching circuit 120A. Since the first switching circuit 120A functions as a differential amplifier for a small amplitude signal, the AM signal will be amplified by the switching circuit 120A. The amplified AM signal will then flow to the diodes 161 and 162 by way of the differential transistors 123 and 124 of the second switching circuit 120B and also to the resistor 143.

Now, description will be made to the case where the AM signal appearing across the resistor 143 is grounded through the phase-shifter device 200 as is in the case of the demodulation circuit shown in FIG. 1.

When the transistor 123 and the diode 161 are balanced with the transistor 124 and the diode 162, the AM signals of the same amplitude and phase will flow through the transistors 123 and 124 and then are reduced to zero through the operation of the succeeding subtraction circuit, resulting in the non-appearance of any demodulated AM signal at the output terminal 100b. Thus, the AM signal appearing across the resistor 143 can be by-passed to ground, as described above.

However, in practice, it is improbable that the transistor 123 and diode 161 are functionally balanced with the transistor 124 and the diode 162. It is rather usual that unbalanced states prevail among these elements.

Under such conditions, AM signals of different amplitudes will flow through the transistors 123 and 124. Subtraction of these AM signal at the subtraction circuit will produce a difference signal representative of the amplitude difference between the AM signals, as a result of which the AM signal will be domodulated and appear at the output terminal 100b.

On the other hand, it will be noted that in the circuit arrangement according to the invention shown in FIG. 2, the AM signal appearing across the resistor 143 is inhibited from flowing to the ground through the impedance of a capacitor 230 which connects one end of the resonance circuit 210 to the ground. The capacitance value of the capacitor 230 is so selected that the impedance thereof is sufficiently small as compared with the resonance resistance value of the resonance circuit 210 for the FM signal (carrier), while the capacitor 230 may provide an impedance of an appropriately large value for preventing the AM signal from flowing toward the ground. For example, a capacitor having a capacitance value in the range of 100 to 900 pF may be employed. By way of example, it is assumed that the capacitor of 100 pF is used. Then, the impedance 8 provided by the capacitor 230 is given as follows: ##EQU9## when f = 1 MHz and C = 100 pF, then ##EQU10## Under these conditions, the AM signal appearing across the resistor 143 is inhibited from flowing to the ground by the capacitor 230 and applied to the base of the transistor 123 of the second switching circuit 120B. Such an input signal is effective to increase the base voltage of the differential transistor 123 thereby to increase, for example, the collector current of the transistor 121 of the first switching circuit 120A. When the collector currents of the differential transistors 123 and 124 tend to increase in proportion to the collector current of the transistor 121, the increased current will flow to the transistor 123 since the forward base bias therefor is selected greater than that of the transistor 124. In this way, the AM signal is processed as a negative feedback signal of the differential transistor 124.

Accordingly, when the initial operating points of the paired transistors 123 and 124 are previously deviated slightly from each other, e.g. when the amplitude of the collector output of the transistor 123 is set smaller than that of the transistor 124, the amplitudes of AM signals flowing through the collectors of the paired differential transistors 123 and 124 tends to become equal to each other. Then, the subtraction circuit will operate to cancel these AM signals to each other, whereby the demodulation of AM signal at the output terminal 100b can be significantly suppressed.

The circuit arrangement for reducing the AM signal demodulation described above can be equally applied to the phase-shifting multiplication type FM demodulation circuit which is so arranged that FM demodulated signal may be derived only from the one transistor 124 of the second switching circuit 120B.

FIG. 5 shows graphically attenuation of the AM demodulated output in dependence upon the capacitive values of the capacitor 230 in the range of 100 to 900 pF. The conditions for measurement of the characteristics shown in FIG. 5 are selected as follows:

In FIG. 5, 0 (db) along the ordinate represents the FM demodulation output at the FM modulation degree of 100%.

It will be understood from the characteristic graph of FIG. 5 that there is a proper value for the capacitance of the capacitor 230. The best results could be obtained when the capacitance of the capacitor is selected at a value in the range of 300 to 400 pF. However, since AM signal has a frequency range of 500 KHz to 2.6 MHz, it will be unsafe to say that the capacitance value should be selected definitely in the above range. The selection should be preferably made in consideration of the receiving conditions of AM signals.

In the demodulation circuit described above, when D.C. voltage variation ocurring at the output terminal 100b when output signal flows through the output resistor 300 is taken out through the low-pass filters 400 and 6 and applied to one end of the tuning indicator 7 which has its other end applied with the reference voltage from the reference voltage terminal 200a, the indicator 7 will give an indication in dependence on the difference between the D.C. voltage variation and the reference voltage. Such indication, therefore, represents that the input FM intermediate signal is not tuned with the resonance circuit 210.

When the oscillation signal of the local oscillator 2 shown in FIG. 2 drifts under the influence of some environmental conditions and as a consequence the input signal to the FM intermediate frequency signal input terminal 5a is deviated from the resonance frequency f.sub.o of the resonance circuit 210, incurring an increased distortion in the demodulation output, then the D.C. signal derived through the low-pass filter 6 is applied to the local oscillator 2 through the switch 9 and AFC circuit 8 thereby to control the oscillation frequency of the oscillator 2. Distortion of the demodulated output signal can be thus corrected. Usually, the switch 9 is changed over to the contact OFF and the local oscillator 2 is supplied with reference voltage from the terminal 200a in the stabilized state.

FIG. 6 shows a modification of the demodulation circuit shown in FIG. 2. In FIG. 6, the input terminal 100a of the integrated circuitry 100 is on one hand connected to the base of the switching transistor 121 of the switching circuit 120A' of the gate circuit 120 and on the other hand connected to the base of the switching transistor 123 of the switching circuit 120B through the terminal 100e, phase-shifter device 200, capacitor 240 and the terminal 100f. In other words, in the case of the circuit arrangement shown in FIG. 6, the switching circuit 120A and the constant-current source circuit 130 of FIG. 2 is replaced by the single switching transistor 121', the collector current of which is adapted to be switched in response to the FM intermediate frequency signal of the rectangular waveform supplied to the switching circuit 120B through the phase-shifter device 200. With respect to the other circuit elements and the demodulating operation, the circuit shown in FIG. 6 is the same as that of FIG. 2. The same circuit portions and elements are denoted by the same reference symbols as indicated in FIG. 2. The embodiment shown in FIG. 6 exhibit similar advantages as those of the demodulation circuit shown in FIG. 2.