Background of the Invenion
1. Field of the Invention
The present invention relates to a timing signal generating device, and particularly to a timing signal generating device adapted to generate timing signals for operating each of plural operating devices for a predetermined time period during every rotation of a rotation member.
2. Description of the Prior Art
Heretofore, there have been known coin treating machines such as coin counting and wrapping machines as shown in U.S. Pat. Nos. 3,416,291 and 3,469,365. In such machines, many operations such as the operations of stacking a predetermined number of coins in a stacking cylinder assembly, gripping the stacked coins and removing the same from the stacking cylinder assembly by opening the assembly, carrying the coin stack to the wrapping rollers while gripping the coin stack, holding the coin stack by means of the wrapping rollers, and supplying a wrapping web to the wrapping rollers so as to cause the coin stack to be tightly wound by the wrapping web, are sequentially performed with predetermined timing. Timing and sequence information for these operations are given from plural microswitches pushed by the associated cams which are mounted on a rotating cam shaft adapted to cause each operating section in the wrapping machine to complete its one cycle of operation during every rotation of the shaft.
In such a machine, however, it has been difficult to make the timing of the ON and OFF of each microswitch consistent with the desired timing. Particularly, it was very difficult to make the timing of the ON of one microswitch consistent with that of the OFF of another microswitch. Namely, accurate timing information could not be obtained. This is because of the difficulty in accurately working the cam surface of each cam and inaccuracy in mechanical operation of the microswitch per se. Further, in the case that many operational sections are sequentially operated, there are required microswitches in a number equal to that of the timing information required and a corresponding number of cams each having a configuration shaped to give the required timing information. In this case, it was very difficult to accurately mount the cams on the cam shaft and locate the microswitches in accurate position thereto.
Furthermore, if the rotation speed of the cam shaft is increased for the purpose of elevating the rate of operation, error in timing information will become a large problem, and consequently it has been impossible to elevate the speed of operation.
It is, therefore, one object of the present invention to provide a timing signal generating device in which the above mentioned problems are eliminated.
Another object of the present invention is to provide a timing signal generating device capable of giving accurate timing information.
A further object of the present invention is to provide a timing signal generating device in which the number of mechanical operating portions such as cams and microswitches is minimized so that error caused by the mechanical operating portions, which is inevitable in the conventional devices, is minimized or eliminated.
A still further object of the present invention is to provide a timing signal generating device having no cam and no microswitch.
The above and other objects of the present invention are accomplished by a timing signal generating device constructed in accordance with the present invention, which comprises a rotating member mounted on a rotating shaft to rotate therewith and having a plurality of marks located on the periphery thereof, and detecting means for detecting the marks on the rotating member to generate pulse signals in response to detection of the marks. Counting means is connected to the detecting means to count the pulse signals therefrom. Gate means is connected to said counting means to generate timing signals in response to a predetermined condition of the counting means. The counting means may be preferably a shift register, and each of the logic means has inputs each connected to a predetermined stage of the shift register, so as to generate a timing signal having information including starting time and terminating time of operation.
The above and other objects and effects of the present invention will be apparent from the following detailed description of preferred embodiments of the present invention in conjunction with the accompanying drawings.
Brief Description of the Drawing
FIG. 1 is a front view of a rotating disc used in the present invention for generating timing information;
FIG. 2 is a longitudinal sectional view of rotating disc such as that shown in FIG. 1, but having magnetic pole pieces on the disc as timing marks;
FIG. 3 is a sectional view similar to FIG. 2, except that the disc has through-holes as timing marks;
FIG. 4 is a block diagram of an electric circuit used in a timing signal generating device according to the present invention; and
FIG. 5 is a graph showing the waveform of a signal represented at each point in the electric circuit shown in FIG. 4.
Description of the Preferred Embodiments
Referring to FIG. 1, there is shown a rotating disc 1 fixedly mounted on a rotating shaft 2 angular displacement of which serves as reference for timing of each operation. The rotating disc 1 has a reference mark 3 positioned thereon apart from the shaft 2 by a suitable distance. The rotating disc 1 also has a plurality of timing marks 4a, 4b, 4c . . . 4h positioned apart from one another on a circle having a radius different from the distance between the reference mark 3 and the rotating shaft 2. Mark detectors 5 and 6 are located opposite one face of the disc 1, on which the marks 3 and 4a, 4b . . . 4h are provided, so as to detect these marks.
The marks 3 and 4a, 4b . . . 4h may be, respectively, magnetic pole pieces 7 and 8 bound on one surface of the disc 1 as shown in FIG. 2, while the detectors 5 and 6 may also be, respectively magnetic heads 9 and 10. As shown in FIG. 3, alternatively, the marks 3 and 4a, 4b . . . 4h may be holes 11 and 12, respectively, perforated through the rotating disc 1, while the detectors 5 and 6 may also be, respectively, photodetectors such as phototransistors 13 and 14 adapted to receive light rays passing through the holes from light emitting means such as light emitting diodes 15 and 16 which are located at the side of the disc opposite to the side at which the phototransistor 13 and 14 are located. Otherwise, the marks may be of other types such as projections or metal pieces, and the detectors may also be of other types such as microswitches or proximity detectors.
The output of the reference mark detector 5 is connected to the input of an inverter 17 whose output is connected to a clear terminal of each of flip-flops 18 to 25, as shown in FIG. 4. These flip-flops 18 to 25 are series-connected in such a manner that Q and Q outputs of the flip-flop of a preceding stage are connected respectively to set and reset terminals S and R of the flip-flop of the following stage, so as to constitute counting means such as a shift register 26. The output of the timing mark detector 6 is connected through an inverter 27 to a clock or trigger terminal T of each flip-flop. The set terminal S of the first stage of flip-flop 18 is connected to the output of an inverter 28 whose input is earthed, while the reset terminal R of the first stage is directly earthed. As shown in FIG. 4, the Q output terminal of each flip-flop is connected to a suitable input terminal of logic gates such as a inverter 29 and AND gates 30 to 35.
Now, the operation will be explained assuming that the reference and timing marks 3 and 4a, 4b, 4c . . . 4h are located as shown in FIG. 1 and that the shift register 26 is connected to the logic gates 29 to 35. Assume that the rotating disc 1 is roated in the direction of arrow 36. When the reference mark 3 reaches just below the detector 5, this detector 5 detects it and generates a reference signal having a pulse wide of .tau..sub.0 as shown in FIG. 5, which is in turn supplied to the inverter 17. The inverted pulse signal from the inverter 17 is fed to the clear terminal of all of the flip-flop 18 to 25 so as to bring them into such a clear condition that each Q output is of a low level while each Q output is of a high level.
With further rotation of the disc 1, the detector 5 detects in sequence the timing marks 4a, 4b, 4c . . . 4h and generates timing pulses t.sub.1, t.sub.2, t.sub.3 . . . t.sub.8 having a pulse width of .tau. as shown in FIG. 5. These timing pulses are sequentially fed through the inverter 27 to the trigger terminal T of the first stage flip-flop 18. Since a high level voltage is ceaselessly applied to the set terminal S of the flip-flop 18 by the inverter 28 while a low level voltage is also ceaselessly applied to the reset terminal R thereof, the flip-flop 18 is set by the first timing pulse t.sub.1 and kept in a set condition with all of the subsequent timing pulses t.sub.2 to t.sub.8. Since the flip-flop 18 to 25 are connected in series as shown in the drawing, the condition of the first stage flip-flop 18 is sequentially shifted to the subsequent flip-flops 19 to 25 by the subsequent timing pulses t.sub.2 to t.sub.8. Therefore, the condition of the Q output of each flip-flop becomes as shown in FIG. 5.
Therefore, the inverter 29 which is connected to the Q output of the first stage of flip-flop 18 generates a timing signal P.sub.1 having a pulse width of .tau..sub.a as shown in FIG. 5. The AND gate 30 having a non-inverting input connected to the Q output of the flip-flop 18 and an inverting input connected to the Q output of the flip-flop 22, generates another timing signal P.sub.2 having a pulse width of .tau..sub.b as shown in the drawing. The other AND gates 31 to 35 generate, respectively, timing signals P.sub.3 to P.sub.7 having a pulse width of .tau..sub.c, .tau..sub.d, .tau..sub.e, .tau..sub.f and .tau..sub.g respectively, as shown in FIG. 5. The output of each of the logic gates 29 to 35 is connected to a corresponding driving circuit (not shown) for an associated operating device (not shown). The timing signal outputted from each logic gate may be used in such a manner that the leading edge thereof represents the time at which the associated operating device should start its operation, while the trailing edge thereof represents the time at which the associated operating device should terminate its operation.
When the detector 5 detects the reference mark 3 again by the rotation of the disc 1, the detector 5 supplies the reference signal pulse signal to each flip-flop so as to clear them, and then the above mentioned operation will be repeated in the manner mentioned above.
As will be apparent from the above explanation of the embodiment of the present invention, a desired number of timing signals each having a desired pulse width can be obtained by suitably selecting the number of timing marks and their angular arrangement and by suitably connecting the shift register with each logic gate.
As seen from the above, according to the present invention, it is possible to make the trailing edge of one timing signal accurately consistent with the leading edge of another timing signal. Furthermore, many and different required timing signals can easily be obtained without requiring many accurately worked cams. Since the number of mechanical portions is minimized, a series of timing signals can be obtained at a high speed with no error only by rotating the rotating shaft at a high speed, whereby enabling high speed operation of each operating device. Further, since the angular displacement of the rotating disc is ceaselessly synchronized precisely with the timing signals, the timing signals have a high degree of accuracy and reliability.