Programmable Calculator Employing a Read-Write Memory Having a Movable Boundary Between Program and Data Storage Sections Thereof

Background of the Invention

Summary of the Invention

Description of the Drawings

Description of the Preferred Embodiment

General Description

System Clock

Central Processing Unit

Read-Only Memory

Read-Write Memory

Peripheral Interface Adaptor

Input Buffer

Keyboard

Display

Printer

Peripheral Input/Output

Magnetic Tape Cassette Unit

Power Supplies

Calculator Firmware

Detailed Listing of Routines and Subroutines of Instructions

Calculator Operation

General Description

Keyboard Operations

Printer Control

Programming

Tape Operations

Error Messages

Plotter Plug-In I/O ROM

Plug-In General I/O ROM

This invention relates generally to calculators and improvements therein and more particularly to programmable calculators that may be controlled both manually from the keyboard input unit and automatically by a stored program loaded into the calculator from the keyboard input unit or an external magnetic record member.

Computational problems may be solved manually, with the aid of a calculator (a dedicated computational keyboard-driven machine that may be either programmable or nonprogrammable) or a general purpose computer. Manual solution of computational problems is often very slow, so slow in many cases as to be an impractical, expensive, and ineffective use of the human resource, particularly when there are other alternatives for solution of the computational problems.

Nonprogrammable calculators may be employed to solve many relatively simple computational problems more efficiently than they could be solved by manual methods. However, the keyboard operations or language employed by these calculators is typically trivial in structure, thereby requiring many keyboard operations to solve more general arithmetic problems. Programmable calculators may be employed to solve many additional computational problems at rates hundreds of times faster than manual methods. However, the keyboard language employed by these calculators is also typically relatively simple in structure, thereby again requiring many keyboard operations to solve more general arithmetic problems.

Many programmable calculators constructed according to the prior art have employed step oriented memories and have handled memory transfer of conditional or unconditional transfer statements through the use of absolute step references. This technique leaves the user with sole responsibility for statement address modification in the event a transfer statement is edited, thus increasing the user's workload, as well as the chances for introduction of errors, during program editing operations. In addition, these prior art calculators rarely include language features useful in performing iterative looping functions encountered in programming complex problems.

These earlier step oriented calculators produced printed program listings that were very difficult to read because information syntactically representing a single statement was generated by several separate key actuations and then listed in a similar fashion with the information associated with each key being listed on a separate line.

Conventional programmable calculators are limited as to the complexity of the problems they are able to solve because of memory capacity limitations. Magnetic tape storage has been employed in some calculators to store program segments and data for use during execution of a program, thereby effectively increasing the size of the calculater read-write memory. These magnetic tape storage systems have been of limited usefulness, however, because of the relatively long access times involved.

Conventional programmable calculators in the low cost range have presented a communication problem for the user in that they typically have not employed output printers with fully formatted alphanumeric printing capabilities. It would be advantageous in calculators of this type to provide a low cost thermal printer, for example, that may be called upon by the user to print a variety of characters and numeric data according to a format designated by the user.

Conventional programmable calculators have been arranged to respond to power turn on by entering a standby mode, after which the user may enter a program from the keyboard or from a magnetic tape cassette, for example, for execution by the calculator. This arrangement is disadvantageous in that it requires of the user a considerable degree of knowledge regarding operation of the calculator. It would be advantageous to provide a programmable calculator that automatically responds to application of operating power by loading a program from an external magnetic record member into the calculator memory and by subsequently automatically initiating execution of that program.

The principal object of this invention is to provide an improved programmable calculator that has more capability and flexibility than conventional programmable calculators, that is smaller, less expensive, and more efficient in evaluating elementary mathematical functions than are conventional computer systems, and that is much easier for the untrained user to operate than either conventional programmable calculators or computer systems.

Another object of this invention is to provide a programmable calculator that employs a magnetic tape cassette unit for storing a program and in which the user may select an auto start mode of operation for automatically initializing the calculator, loading into calculator memory a program from the magnetic tape cassette unit, and executing that program, all in response to application of operating power by the user.

Another object of this invention is to provide a programmable calculator that automatically adjusts addresses designated in absolute branch statements in accordance with any program editing performed by the user.

Another object of this invention is to provide a programmable calculator that may be coupled to an X-Y plotter and in which the user may employ keys on the calculator to move the plotter pen to a desired point for obtaining a readout from the calculator of the coordinates of that point.

Another object of this invention is to provide a programmable calculator in which the user may employ a single general input/output read-only memory to couple a variety of peripheral input/output units to the calculator.

Another object of this invention is to provide a programmable calculator in which syntax and execution errors are directly communicated to the user, thereby eliminating the need for an error look up table.

Another object of this invention is to provide a programmable calculator employing a user read-write memory having a movable boundary between a program storage section thereof and a data storage section thereof and in which the location of that boundary may be defined by the user.

Another object of this invention is to provide a programmable calculator employing a user read-write memory including a program storage section and a separate data storage section and in which the user is prevented from writing program information into the data storage section and vice versa.

Another object of this invention is to provide a programmable calculator in which the user may assign one of two meanings to every key of an entire block of keys of a keyboard input unit by actuating a single switch.

Another object of this invention is to provide a programmable calculator including an output printer and in which the user may obtain formatted output from the printer without the use of a format statement.

Another object of this invention is to provide a programmable calculator employing reverse polish notation language in which certain combinations of key actuations are associated with a single internal instruction.

Another object of this invention is to provide a programmable calculator in which the user may designate an absolute step location in memory or a label number to be used by the calculator as a memory destination location in association with a transfer statement.

Another object of this invention is to provide a programmable calculator in which the user may select a normal print mode of operation to enable printing during program entry but to suppress printing during manual execution.

Another object of this invention is to provide a programmable calculator in which the user may call for a bit-by-bit comparison between information transferred between the calculator memory and a magnetic record member.

Another object of this invention is to provide a programmable calculator employing a magnetic tape cassette unit and in which old files on a magnetic tape are automatically erased when new files are being marked.

Another object of this invention is to provide a programmable calculator employing a magnetic tape cassette unit in which the current tape position is stored in memory to enable high speed accessing of tape files.

Another object of this invention is to provide a programmable calculator in which programs stored in a memory unit may be listed on an output printer unit in more than one column to facilitate more efficient use of printer paper.

Another object of this invention is to provide a programmable calculator in which the user may write a program involving plug-in read-only memory commands without a plug-in read-only memory present, may later plug a read-only memory into the calculator, and may then obtain a listing of that program including the previously chosen commands associated with that plug-in read-only memory.

Another object of this invention is to provide a programmable calculator employing a dual track magnetic tape cassette unit and in which the specification of all files on a magnetic tape includes a track designation.

Another object of this invention is to provide a programmable calculator employing a thermal dot matrix output printer and in which dots are selectively printed to reduce the power requirements of the printer.

Another object of this invention is to provide a programmable calculator in which the user is given a continuous indication of the amount of available program storage during a program entering mode of operation.

These objects are accomplished in accordance with the preferred embodiment of this invention by employing a keyboard input unit, a magnetic tape cassette reading and recording unit, a gas discharge output display unit, a 16-character thermal printer unit, a peripheral interface adaptor (PIA), a memory unit, and a central processing unit (CPU) to provide an adaptable programmable calculator having manual operating, automatic operating, program entering, magnetic tape reading, magnetic tape recording, and numeric display and alphanumeric print modes.

The keyboard input unit includes a group of numeric data keys for entering data into the calculator, a group of data manipulation keys, a group of function keys for selecting various mathematical functions and operators, a group of memory control keys for controlling the program and data storage areas of the calculator memory, another group of control keys for controlling the operation of the magnetic tape cassette reading and recording unit, and a group of user-definable keys. Many of these groups of keys are useful in both the manual and programmable operating modes. In addition, each of the keys of the user-definable group assumes a secondary meaning during program entry to automatically provide functions that are unnecessary when executing commands manually from the keyboard.

The magnetic tape cassette reading and recording unit includes a reading and recording head, a drive mechanism for driving a magnetic tape past the reading and recording head, and reading and recording drive circuits coupled to the reading and recording head for bidirectionally transferring information between the magnetic tape and the calculator as determined by keyboard commands or commands which are part of a stored program.

The memory unit includes a modular random-access read-write memory having a dedicated system area and a separate user area for storing program statements and/or data. The user portion of the read-write memory may be expanded without increasing the overall dimensions of the calculator by the addition of a read-write memory module. Additional read-write memory made available to the user is automatically accommodated by the calculator, and the user is automatically informed of the number of available program storage locations and when the storage capacity of the read-write memory has been exceeded.

The memory unit also includes a modular read-only memory in which routines and subroutines of assembly language instructions for performing the various functions of the calculator are stored. The routines and subroutines stored in the read-only memory may be expanded to provide routines required to interface various peripheral input/output units to the calculator and to provide some additional functions oriented toward the specific needs of the user. This is accomplished by simply plugging additional read-only memory modules (ROMs) into either or both of two receptacles provided in the rear panel of the calculator housing. Added read-only memory modules are automatically accommodated by the calculator and are accessed by the calculator through a series of select codes.

Plug-in ROMs include, for example, a plotter ROM, a typewriter control ROM, a general input/output ROM, a binary-coded-decimal input/output ROM, and an ASCII bus interface ROM. Additional read-only memory modules may be added to a printed circuit board inside the calculator to allow printing characters of foreign languages on both the 16-character thermal printer unit and on an output typewriter that has the desired foreign language character set.

The gas discharge output display unit features 16-character seven segment numeric output with a minus sign, a decimal point, and the capability of displaying commas in selected locations within displayed data.

The 16-character thermal printer unit can print out messages to the user such as error conditions, listings of the user's program and any other message selected by the user that may be formed from the character set available in the calculator. Some alphanumeric data formatting can also be accomplished in the printed output of a single line of information.

The peripheral interface adaptor (PIA) may comprise, for example, a Motorola MC6820 PIA. The PIA operates in conjunction with the central processing unit of the calculator and is capable of dual 8-bit parallel input/output with associated flag, control, handshake, and interrupt hardware that enables the calculator central processing unit to communicate with the above-mentioned internal input/output units that include the keyboard, printer, display, and magnetic tape cassette units. The PIA also has the capability of enabling the calculator to communicate with a plurality of external or peripheral input/output units such as paper tape readers and punches, X-Y plotters, typewriters, and various types of measurement and data gathering instrumentation. This external input/output capability is available to the user through either or both of two input/output connectors located on the rear panel of the calculator that connect the external input/output unit to the PIA through some input/output interface circuitry.

The central processing unit (CPU) may comprise, for example, a Motorola MC6800 8-bit parallel processor with a 1-megahertz clock rate and 65K addressability. This processor includes two 8-bit accumulators, a 16-bit index register, a 16-bit stack pointer, and a 6-bit condition code register.

In the run mode of operation, the calculator is controlled by keycodes received sequentially from the keyboard input unit resulting from key actuations by the user. These keycodes are examined within the calculator immediately upon receipt from the keyboard input unit and are checked for proper syntactical meaning as required by the calculator language. An internal instruction code is generated by the calculator from these keycodes to represent the keyboard instruction desired by the user. This instruction code is then used as a pointer to the address of the routine stored in the read-only memory that is responsible for the execution of the selected instruction.

In the program mode of operation the internal instruction codes generated by the calculator during program entry are stored in the program storage area of the user read-write memory at an address specified by the current value of a user program pointer. These stored instructions constitute a program that may be automatically executed upon request by the user. During program entry, the output printer may be commanded, by means of a keyboad switch, to provide a printed listing of the keyboard commands selected by the user together with the corresponding program address at which the associated internal instruction code is stored. Since several key actuations may result in generation by the calculator of a single internal instruction code and since the calculator executes only these internal instruction codes, a complex stored program can be executed by the calculator very efficiently and in a short period of time.

An autostart mode of operation may be switchably selected by the user to automatically enter into the calculator and execute a program stored on a magnetic tape. This feature allows the use of the calculator by persons unfamiliar with the details of its operation and provides a means for restoring the calculator to working condition in the event a power failure occurs at a time when the calculator is unattended by the user or is attended by an unskilled user.

FIG. 1 is a front perspective view of a programmable calculator according to the preferred embodiment of this invention.

FIG. 2 i= a rear perspective view of the programmable calculator of FIG. 1.

FIG. 3 is a plan view of the keyboard input unit employed in the programmable calculator of FIG. 1.

FIG. 4 is a simplified block diagram of the hardware associated with the calculator of FIG. 1.

FIG. 5 is a simplified block diagram of the firmware associated with the calculator of FIG. 1.

FIG. 6 is a simplified block diagram showing the ROMs 1-6 and the system control ROM of FIG. 5.

FIG. 7 is a simplified block diagram showing the typical format of I/O ROMs 1 and 2 of FIG. 5.

FIG. 8 is an overall memory map showing system and user read-write (R/W) memory, basic and optional ROM, and plug-in U/O ROM of FIGS. 4 and 5.

FIG. 9 is a detailed memory map of the system read-write memory of FIGS. 4, 5, and 8.

FIG. 10 is a detailed memory map of the user read-write memory of FIGS. 4, 5, and 8.

FIGS. 11A-B are a detailed schematic diagram of the system clock generator and divider and cycle steal blocks of FIG. 4.

FIG. 12 is a timing diagram illustrating waveforms associated with the system clock generator and divider circuitry of FIGS. 4 and 11A-B.

FIG. 13 is a detailed schematic diagram of the central processing unit (CPU) of FIG. 4.

FIG. 14 is a detailed schematic diagram of a portion of the address and chip select block of FIG. 4.

FIG. 15 is a timing diagram illustrating waveforms associated with address and chip select circuitry of FIGS. 4 and 14.

FIG. 16 is a detailed schematic diagram of the basic read-only memory and optional read-only memory of FIG. 4.

FIG. 17 is a timing diagram illustrating waveforms associated with the basic and optional read-only memories of FIGS. 4 and 16.

FIG. 18 is a detailed schematic diagram of the basic read-write memory of FIG. 4.

FIG. 19 is a detailed schematic diagram of the optional read-write memory of FIG. 4.

FIG. 20 is a detailed schematic diagram of the peripheral interface adaptor (PIA) and system peripheral control select unit of FIG. 4 together with some associated buffer and timing circuitry. FIG. 21 is a timing diagram illustrating selected waveforms associated with the system peripheral control select unit of FIGS. 4 and 20.

FIG. 21 is a timing diagram illustrating selected waveforms associated with the system peripheral control select unit of FIGS. 4 and 20.

FIG. 22 is a detailed schematic diagram of a portion of the address and chip select block of FIG. 4 relating to the peripheral interface adaptor and input buffer of FIG. 4.

FIG. 23 is a detailed schematic diagram of the input buffer of FIG. 4.

FIG. 24 is a detailed schematic diagram of a portion of the display circuit of FIG. 4.

FIG. 25 is a detailed schematic diagram of another portion of the display circuit of FIG. 4.

FIGS. 26A-B are detailed schematic diagrams of driver circuitry and paper sense circuitry, respectively, employed in the thermal printer of FIG. 4.

FIG. 27 is a detailed schematic diagram of the keyboard circuitry of FIG. 4.

FIG. 28 is a timing diagram illustrating selected waveforms associated with the keyboard circuitry of FIGS. 4 and 27.

FIG. 29 is a diagram showing the unique keycode associated with each one of the keys of the keyboard of FIG. 3.

FIG. 30 is a block diagram of a portion of the circuitry associated with the magnetic tape cassette unit of FIG. 4.

FIG. 31 is a block diagram of another portion of the circuitry associated with the magnetic tape cassette unit of FIG. 4.

FIG. 32 is a detailed schematic diagram of the gating circuitry of FIG. 30.

FIG. 33 is a detailed schematic diagram of the tach preamplifier and second stage tach amplifier of FIG. 30.

FIG. 34 is a detailed diagram of the frequency detector of FIG. 30.

FIG. 35 is a detailed schematic diagram of the multiplexer of FIG. 30.

FIG. 36 is a detailed schematic diagram of the bilateral current source of FIG. 30.

FIG. 37 is a detailed schematic diagram of the gain selector of FIG. 30.

FIG. 38 is a detailed schematic diagram of the filter, direction sense, and clamp circuits of FIG. 30.

FIG. 39 is a detailed schematic diagram of the voltage gain and current gain circuits of FIG. 30.

FIG. 40 is a detailed schematic diagram of the antimation circuit of FIG. 30.

FIG. 41 is a detailed schematic diagram of the magnetic tape cassette handshake circuitry of FIG. 30 and the track selector circuitry of FIG. 31.

FIG. 42 is a detailed schematic diagram of the hole detector of FIG. 30.

FIG. 43 is a detailed schematic diagram of the write and switch control circuitry and the analog switches of FIG. 31.

FIG. 44 is a detailed schematic diagram of the current source and write protect circuitry of FIG. 31.

FIG. 45 is a detailed schematic diagram of the differential preamplifier of FIG. 31.

FIG. 46 is a detailed schematic diagram of the second stage amplifier/filter of FIG. 31.

FIG. 47 is a detailed schematic diagram of the integrator of FIG. 31.

FIG. 48 is a detailed schematic diagram of the DC tracking circuit of FIG. 31.

FIG. 49 is a detailed schematic diagram of the comparator and frequency doubler of FIG. 31.

FIG. 50 is a detailed schematic diagram of some I/O control and handshake circuitry forming part of the I/O control block of FIG. 4.

FIG. 51 is a detailed schematic diagram of some I/O data output latches forming part of the I/O output block of FIG. 4.

FIG. 52 is a detailed schematic diagram of the optional plug-in I/O ROM of FIG. 4 together with some input buffers associated with the I/O input block of FIG. 4.

FIG. 53 is a detailed schematic diagram of an I/O data input latch and some output buffers forming part of the I/O input and I/O output blocks of FIG. 4.

FIG. 54 is a detailed schematic diagram of the raw power supply employed in the calculator of FIG. 1.

FIG. 55 is a detailed schematic diagram of the +5 volt switching regulator power supply employed in the calculator of FIG. 1.

FIG. 56 is a detailed schematic diagram of the +12 and +15 volt power supplies employed in the calculator of FIG. 1.

FIG. 57 is a detailed schematic diagram of the -5 and -12 volt power supplies employed in the calculator of FIG. 1.

FIG. 58 is a detailed schematic of the -100 volt power supply employed in the calculator of FIG. 1.

FIG. 59 is a detailed schematic diagram of a power on and power off detection circuit employed in the calculator of FIG. 1.

FIG. 60 is a flow chart of a power on routine comprising one of the supervisor routines of FIG. 5.

FIGS. 61A-E are a flow chart of a supervisor control routine comprising one of the supervisor routines of FIG. 5.

FIG. 62 is a flow chart of a keyboard interrupt routine comprising one of the supervisor routines of FIG. 5.

FIG. 63 is a flow chart of a display driver routine comprising one of the supervisor routines of FIG. 5.

FIG. 64 is a flow chart of the error routine of FIG. 5.

FIGS. 65A-L are a flow chart of the alpha routine of FIG. 5.

FIGS. 66A-G are a flow chart of the printer driver routine stored in ROM 3 of FIG. 6.

FIGS. 67A-Z are a flow chart of a portion of the cassette driver routines stored in ROM 3 of FIG. 6.

FIGS. 68A-J are a flow chart of another portion of the cassette driver routines stored in ROM 3 of FIG. 6.

FIGS. 69A-M are a flow chart of the program list routine stored in ROM 4 of FIG. 6.

FIGS. 70A-G are a flow chart of the numeric formatting routine stored in ROM 4 of FIG. 6.

FIGS. 71A-X are a flow chart of the program list routine stored in ROM 4 of FIG. 6.

FIGS. 72A-B are a flow chart of the I/O calling routines stored in ROM 5 of FIG. 6.

FIG. 73 is a flow chart of the binary program routines stored in ROM 5 of FIG. 6.

FIGS. 74A-X are a flow chart of X-Y plotter routines that may be stored in one of the I/O ROMs of FIG. 5.

FIG. 75 is a diagram showing the character set that may be generated when an X-Y plotter is employed with the calculator of FIG. 1.

FIGS. 76A-Z are a flow chart of a portion of some general I/O routines that may be stored in one of the I/O ROMs of FIG. 5.

FIGS. 77A-F are a flow chart of another portion of some general I/O routines that may be stored in one of the I/O ROMs of FIG. 5.

Referring to FIG. 1, there is shown a programmable calculator including both a keyboard 10 for entering information into the calculator and for controlling the operation of the calculator and a magnetic tape cassette reading and recording unit 12 for recording information stored within the calculator onto one or more external tape cartridges and for loading information stored on these magnetic tape cartridges back into the calculator. The calculator also includes a seven-segment gas discharge display for displaying data entered into the calculator, the results of computations, and selected alphanumeric messages. The calculator further includes a 16-column alphanumeric thermal printer 16 for printing computation results, program listings, messages generated by the calculator system and the user, and error conditions encountered during use of the calculator. All of these input/output (I/O) units are included within the calculator itself.

As shown in FIG. 2, the calculator includes two input/output (I/O) receptacles 18 for accepting I/O interface connectors 20 each of which includes a read-only memory (ROM) module. These interface connectors serve to couple the calculator to various selected peripheral I/O units such as X-Y plotters, typewriters, photoreaders, paper tape punches, digitizers, BCD-compatible data gathering instruments such as digital voltmeters, frequency synthesizers, and network analyzers, and a universal interface bus for interfacing to most bus-compatible instrumentation.

The overall operation of the calculator hardware may be understood with reference to the block diagram of FIG. 4. The hardware includes a central processing unit (CPU) 100, basic read-write memory 102, optional read-write memory 103, basic read-only memory 104, optional read-only memory 105, and optional plug-in I/O ROM 110. Support hardware for CPU 100 and the above-listed memories includes a clock generator and divider 112, cycle steal circuitry 114, and address and chip select circuitry 116. Also included are a display circuit 118, a thermal printer 120, a keyboard 122, a magnetic tape cassette unit 124, system I/O circuitry 126, a peripheral interface adaptor (PIA) 106, a system peripheral control select unit 128, and input buffer circuitry 130.

CPU 100 may comprise, for example, a Motorola MC6800 microprocessor. The CPU interfaces with basic read-write memory 102, optional read-write memory 103, basic read-only memory 104, optional read-only memory 105, and PIA 106 via an 8-bit bidirectional tri-state instruction-data bus 108. CPU 100 is capable of directly addressing 64K of memory via a 16-bit address bus. However, since the calculator employs only 32K of addressable memory, a 15-bit address bus 110 is provided. A first interrupt port IRQ on CPU 100 is used by the keyboard 122, and a second interrupt port NMI is employed by the magnetic tape cassette unit 124 via the PIA 106. Two clock phases and instruction-data synchronization on bus 108 are required by CPU 100 for dynamic operation.

The basic ROM 104 and optional ROM 105 comprise the firmware necessary for providing data and instructions to CPU 100. These ROMs are 16,384 bits deep, organized 2048 .times. 8. The coincidence of two signals is necessary to initiate a ROM access. First, the address bus 110 is decoded to provide a ROM chip select signal, and then a start memory signal synchronized with a phased clock signal .PHI..sub.2 is provided to synchronize a group of tri-state buffers inside the ROMs to allow accessed information to be gated onto the instruction-data bus 108. One or two optional plug-in I/O ROMs 110 may be plugged into the calculator to provide additional firmware for driving peripheral I/O units. These plug-in I/O ROMs are accessed by the calculator through a buffered input port that also multiplexes data from peripheral I/O units onto the instruction-data bus 108.

The basic read-write memory 102 and optional read-write memory 103 comprise static NMOS random access memories (RAMs) organized 256 .times.4. The basic calculator read-write memory 102 includes a 256 .times. 8 base page portion employed by the calculator system and a 512 .times. 8 user portion available for program and data storage. The base page portion or system read-write memory is employed by the calculator firmware as a scratchpad memory. Optional read-write memory 103 may be added to the calculator to increase the size of the user portion of the basic read-write memory 102 by 1536 program steps.

Data is transferred between the CPU 100 and the various I/O units during CPU read and write cycles at designated memory locations. In order to take advantage of the fastest instruction addressing mode of CPU 100, four locations within the base page portion of basic read-write memory 102 are used to transfer data to and from PIA 106. Two other locations on the base page are employed to input data via input buffer 130 from the various internal and peripheral I/O units to the CPU instruction-data bus 108. PIA 106 outputs twelve bits of data on a bus 132 and four control bits on a bus 134. The PIA also provides four handshake lines on a bus 136 over which a system handshake between the CPU 100 and the various I/O units is accomplished.

Various signals referenced in the following detailed descriptions of the individual hardware blocks of FIG. 4 may be understood by examination of the corresponding Boolean logic definitions set forth in Table 1 below.

Operation of the system clock generator and divider 112 and cycle steal circuitry 114 of FIG. 4 may be understood with reference to the detailed schematic diagram of these circuits shown in FIGS. 11A-B. The basic clock oscillator shown in FIG. 11A employs positive feedback and is constructed using linearly biased TTL circuitry. A 4-megahertz crystal filters all but the fundamental frequency to generate a 4-megahertz clock signal that is divided by four to produce the 1-megahertz system clock signal. This 1-megahertz system clock signal is then separated into two non-overlapping phases of equal period. These phased clock signals are designated .PHI..sub.1 and .PHI..sub.2, and their relative timing is illustrated in the waveform diagram of FIG. 12. Also illustrated in FIG. 12 and accomplished by way of the circuitry of FIG. 11A is a cycle steal feature employed during read-write memory access because the memory access time is greater than the 500-nanosecond period of clock signal .PHI..sub.2. The 1-megahertz system clock signal is divided as shown in FIG. 11B to provide signals required for clocking and synchronizing the various internal I/O units.

Operation of CPU 100 and its associated circuitry shown in FIG. 4 may be understood with reference to the detailed schematic diagram of FIG. 13. The 8-bit instruction-data bus 108 is unbuffered and is connected, as shown in FIG. 4, to read-write memories 102 and 103, read-only memories 104 and 105, PIA 106, and a tri-state input buffer 130. Fifteen of the sixteen available address lines provided by CPU 100 are buffered by a group of tri-state, non-inverting buffers 138 to form the address bus 110 connected as shown in FIG. 4.

The two phased clock signals .PHI..sub.1 and .PHI..sub.2 are received by a pair of clock drivers 140 that in turn provide clock signals having voltage levels and rise and fall times as required by CPU 100. A start memory signal, STM1, is generated as shown in FIG. 13 using one of the phased clock signals .PHI..sub.2, a signal VMA from CPU 100, and a system reset/restart (master power on) line MPWO. For test purposes, a HALT line provided by CPU 100 along with signals associated with the tri-state buffers 138 are made available as a line TSC. The interrupt lines NMI and IRQ available at CPU 100 are provided with external pull up resistors for improved noise immunity. A read-write line R/W also available at CPU 100 is buffered and connected to the PIA 106 and basic and optional read-write memories 102 and 103.

Operation of the basic read-only memory 104 and optional read-only memory 105 of FIG. 4 may be understood with reference to the detailed schematic diagram of FIG. 16. ROMs 0-6 comprise basic read-only memory 104 and ROM 7 comprises optional read-only memory 105. ROMs 0-7 are accessed by decoding the address bus 110 to generate a ROM chip select signal. The chip select signal is buffered by the particular ROM accessed and is used to turn on a power pulse transistor that applies +12 volts to that ROM. When one of the ROMs 0-7 has been chip selected and a start memory signal STM1 occurs, the information stored in the addressed cell is gated onto the instruction-data bus 108. ROMs 0-7, as opposed to other portions of calculator memory, may be selected only when bit A14 of address bus 110 is high.

The timing relationship of selected signals associated with the various read-only memories employed in the calculator is illustrated in the waveform diagram of FIG. 17.

Operation of the basic read-write memory 102 and optional read-write memory 103 of FIG. 4 may be understood with reference to the detailed schematic diagrams of FIGS. 18 and 19. All read-write memory in the calculator comprises static NMOS 256 .times. 4 RAM chips. Six of these chips are connected as shown in FIG. 18 to form the basic read-write memory 102, and twelve of the chips are connected as shown in FIG. 19 to form the optional read-write memory 103. Basic read-write memory 102 is divided into a 256 .times. 8 base page or system portion employed as a scratch pad memory and a 512 .times. 8 user portion. The twelve 256 .times. 4 RAM chips connected according to FIG. 19 to form optional read-write memory 103 brings the total user read-write memory to 2048 .times. 8 words. The calculator employs part of the user read-write memory as system storage registers and as an I/O temporary scratch pad.

The read-write cycle steal timing is shown in FIG. 12, and the RAM chip select circuitry is shown in FIG. 14. A base page chip select line R0 is pulled low during access of read-write memory addresses 6-255, inclusive. Line R0 and a cycle steal initiator line RAM are inhibited during a PIA access or an input buffer port access by a line CSTNOT. A line R8 is decoded separately from the remaining RAM chip select lines R1-R7 because address bit A11 is high during access of the corresponding RAM chip but is low during access of all other RAM chips. As seen in FIG. 14, the status of line R8 is dependent on a signal RRAM from the ROM chip select circuitry. All RAM chip selects are synchronous with phased clock signal .PHI..sub.2 through start memory signal STM1 and all initiate a cycle steal, as shown in FIG. 12, bgy pulling the line RAM low.

The timing relationship of selected signals associated with RAM chip select cycles is illustrated in the waveform diagram of FIG. 15. During a write cycle, a chip select signal CS is removed 500 nanoseconds before the falling edge of phased clock signal .PHI..sub.2 to insure data hold time for the RAM chips.

Referring again to FIG. 14, a line ADHL, synchronous with the address bus 110, is employed as a chip select line to the PIA 106. Like line R8, line ADHL is also dependent on line A11 of address bus 110. Decoding of line ADHL and a line BPC differs only in that BPC is synchronous with phased clock signal .PHI..sub.2 while ADHL is dependent only on the state of the address bus 110, as shown in Table 1 above.

Operation of peripheral interface adaptor (PIA) 106 of FIG. 4 may be understood with reference to the detailed schematic diagram of FIG. 20. PIA 106 may comprise, for example, a Motorola MC6820 peripheral interface adaptor and is employed to output I/O control information and data and to handshake with the various internal I/O units as well as any peripheral I/O units that may be connected to the calculator. Although the two 8-bit peripheral data buses internal to PIA 106 are bidirectional, the only input to CPU 100 during a PIA read cycle is handshake information stored in the control registers of PIA 106. When the calculator is turned on, PIA 106 is reset by the master power on line MPWO. The calculator firmware programs the peripheral data buses PA0-PA7 and PB0-PB7 as outputs, and all subsequent PIA read or write cycles to addresses 0-3 of the base page portion of basic read-write memory 102 are made to the A data, A control, B data, and B control registers, respectively, of PIA 106.

All eight bits of the B data register and the four most significant bits of the A data register form a 12-bit peripheral data output bus 132 comprising lines DO0-DO11. The four least significant bits of the A data register are decoded into fourteen peripheral select lines 142 by the system peripheral control select unit 128. Because of propagation delays and bit skewing through PIA 106, these four bits are latched 1 microsecond after each PIA access to prevent false peripheral select line transitions.

The timing relationship of selected signals associated with the hardware of FIG. 20 is shown in the waveform diagram of FIG. 21. All CPU data transfers to the PIA 106 are referenced to the trailing edge of the phased clock signal .PHI..sub.2 that also serves as an enable line for PIA 106. The chip select lines for the PIA 106 are decoded synchronously with address bus 110 and the VMA line from the CPU 100 to provide chip select set-up time for PIA 106, as shown in FIGS. 14 and 22. The handshake functions of PIA 106 are accomplished through the A and B control registers and the four handshake lines CA1, CA2, CB1, and CB2 associated with the PIA. Lines CA1 and CB1 are input handshake lines used by the peripheral I/O and magnetic tape cassette units. Line CB1 activates the output line IRQB of the PIA 106 that is connected to the NMI interrupt request port of CPU 100. This arrangement allows the CPU to quickly respond to an end-of-tape handshake associated with magnetic tape cassette unit 124. Lines CA2 and CB2 are programmed through the calculator firmwave to be output lines. Line CA2 is employed exclusively as a control line in connection with peripheral I/O units, and line CB2 is employed as a system data strobe line. Line CB2 clocks data to printer 16, controls a comma in display 14, and clocks data to any peripheral I/O units that may be connected to the calculator.

A line CSTNOT, encoded as shown in FIG. 22, is the logical OR of a PIA chip select signal PIA and an input buffer chip select signal. Line CSTNOT inhibits line RAM from cycle stealing the clock signals during a PIA access or an input buffer across and is asynchronous with phased clock signal .PHI..sub.2, being derived directly from address bus 110.

Operation of the input buffer 130 of FIG. 4 may be understood with reference to the detailed schematic diagram of FIG. 23. Instructions and data from the optional plug-in I/O ROMs 110 and data from the I/O inputs of system I/O circuitry 126 are multiplexed onto a tri-state 8-bit data bus 144 comprising lines DM0-DM7. Data from the various internal I/0 units of the calculator is multiplexed onto an 8-bit open collector bus 146 comprising lines DI0-DI7. The DM bus 144 and the DI bus 146 are in turn multiplexed onto the cpu instruction-data bus 108. The DM bus 144 is accessed by either an optional plug-in I/O ROM access or an I/O data read at base page address 5 of basic read-write memory 102. The decoding for an optional plug-in I/O ROM access select signal STM2 is illustrated in FIG. 22. Line STM2 generates the necessary tri-state control signals for the optional plug-in I/O ROMs 110 and the I/0 inputs within system I/0 circuitry 126. The DI bus 146 is accessed as a peripheral data read cycle at read-write memory base page address 5. A signal IN, encoded as shown in FIG. 22, enables either the DM bus 144 or the DI bus 146 to become active on the CPU instruction-data bus 108.

Operation of the keyboard 10 shown in FIG. 4 may be understood with reference to the detailed schematic diagram of FIG. 27. The master power on signal MPWO initializes the keyboard scan circuitry, and the phased clock signal .PHI..sub.1 counts up a key scan counter KS and a key detect counter KD. The outputs of the KS counter are decoded into eight lines labelled KS0-KS7 that are connected to a keyboard switch matrix. The outputs of the KD counter are connected to a key detect multiplexer 148 whose eight input lines KD0-KD7 are received from the keyboard switch matrix. The keyboard circuitry continuously scans the keyboard switch matrix until a switch closure is detected on a KD line, as illustrated in the waveform diagram of FIG. 28. The KD line gates the phased clock signal .PHI..sub.2 to a one-shot debouncer that in turn triggers a flip-flop to inhibit the CU line and requests an interrupt of the CPU 100 via line IRQ. When the interrupt has been granted by the calculator firmware, a line KCEN enables the state of the KS and KD counters to be read to CPU 100 on lines DI2-DI7 of bus 146. The state of the KS and KD counters generates an octal keycode in accordance with FIG. 29 to identify the key that has been actuated. Lines DI5, DI6, and DI7 form an octal word having DI5 as its least significant bit and DI7 as its most significant bit. This octal word corresponds to the most significant digit of the octal keycode of the key that has been actuated. Similarly, lines DI2, DI3, and DI4 form an octal word having DI2 as its least significant bit and DI4 as its most significant bit. This octal word corresponds to the least significant digit of the octal keycode of the key that has been actuated. Calculator firmware acknowledges receipt of a key code by removing signal KCEN. The keyboard scan is restored only if the calculator firmware has accepted the key code and if the one-shot debouncer has indicated that the key switch is open. The calculator firmware periodically updates the status of the two toggle switches located on the far right-hand side of keyboard 10. A line SWEN enables the state of these toggle switches to be read to CPU 100 on lines DI7, DI6, DI5, and DI0 of bus 146.

Operation of the display circuit 14 of FIG. 4 may be understood with reference to the detailed schematic diagrams of FIGS. 24 and 25. A display readout 150 comprises a 16-digit high voltage gas discharge display unit. Each of the characters is formed by selectively energizing seven bar segments, a decimal point, and a comma. By enabling each of the sixteen character positions and simultaneously energizing the appropriate bar segments, a desired character is displayed. A strobing technique is employed to enable only one character position at a time. However, because of the high scan speed involved, all energized character positions appear to glow at the same time.

When the display circuitry is enabled, a line DEN allows character position information carried on lines DO8-DO11 to be applied to a decoder 152. The calculator firmware permutes these inputs in a binary fashion, thereby enabling one of three digit drivers 154 at a time. The output of digit drivers 154, normally at -45 volts, is pulled to ground when enabled.

Lines DO0-DO7 and CB2, all shown in FIG. 25, supply segment information. Initially, a bank of segment drive transistors 156 is turned on, thus allowing a bank of segment capacitors 158 to charge to -55 volts with respect to the off character positions. This voltage is insufficient to cause ionization within readout 150, and so no visible glow appears. When one of the segment drive transistors 156 is turned off, the corresponding segment capacitor 158 immediately applies -200 volts to the associated segment. Since cathode segments for all character positions are connected together, this negative voltage is present on the corresponding segment of each character position. Ionization and resultant glow discharge will only occur between segments at -200 volts and anodes at ground. Although all like cathode segments are at -200 volts, no discharge occurs at those anoes held to -45 volts.

A calculator busy signal comprising minus signs at each character position of display 14 occurs when the calculator is performing extensive calculations or program operations. During this time, line DEN is at logical one, and the character scan is applied to decoder 152 by square wave signals of 5, 2.5, 1.25, and 0.625 kilohertz, as shown in FIG. 24. All character segments except the minus sign are disabled by holding the segment capacitors 158 to -100 volts, and a 10-kilohertz square wave signal simultaneously drives the minus sign segment. Thus, minus signs appear across the entire display. A multivibrator 160 shown in FIG. 25 inhibits the busy signal if the calculator is busy for less than 140 milliseconds.

Operation of the thermal printer 16 of FIG. 4 may be understood with reference to the detailed schematic diagram of FIGS. 26A-B. Printer 16 comprises a printer chip 162 that includes eighty thermal print elements, a paper advance circuit 164, and a paper out circuit 166. Printed characters are formed within a 5 .times. 7 dot matrix. The eighty thermal print elements on printer chip 162 are arranged in a horizontal line. A line of printed characters is built up by printing all the dots on each of the seven matrix rows in sequence by incrementally advancing the paper past the horizontal line of thermal print elements. The thermal print elements are arranged in four groups of twenty elements each, each of the groups being controlled by one of the select lines S1-S4 shown in FIG. 26A. A 20-bit shift register within printer chip 162 is loaded via a PDATA line and a CLK line. Each bit of the shift register then controls one of the print elements.

The paper advance circuit 164 comprises a Darlington switch controlled by a PEN line. This switch draws current through a printer bobbin that in turn cocks and fires the advance mechanism of the printer.

The paper out circuit 166 shown in FIG. 26B comprises a light emitting diode 168, a photo transistor 170, and some detection circuitry. When paper is present in the printer, light from diode 168 is reflected to photo transistor 170 that produces current flow in resistor 172. This current is detected by an operational amplifier 174. Information regarding the presence of a paper supply is available to CPU 100 on a line D11 when a switch enable line SWEN is high.

Operation of the system I/O circuitry 126 and an optional I/O interface card 176 of FIG. 4 may be understood with reference to the detailed schematic diagrams of FIGS. 50-53. System I/O circuitry 126 includes channel select latch circuitry, handshake circuitry, and input bus enable circuitry, all of which circuitry is shown in detail in FIG. 50.

I/O receptacles 18 shown in FIG. 2 allow connection of two peripheral I/O units to the calculator. These two receptacles are variously referred to in the following detailed description as slot A or channel A and slot B or channel B. As shown in FIG. 51, I/O channels A and B output data on an I/O data output bus 178 and an I/O data output bus 180, respectively. These buses each comprise twelve bits of latched data, represented as lines AD0-AD11and BD0-BD11, respectively. Data is latched by a line CB2 applied through some logic circuitry to a group of data latches 182. When power to the calculator is turned on, these latches are cleared, and a channel select latch 184 is reset by the master power on line MPWO, as shown in FIG. 50. Referring again to FIG. 50, the channel select latch 184, a channel A flag sense flip-flop 186, and a channel B flag flip-flop 188 are set by a line IO7 through the calculator firmware. After selection of the proper channel, either a channel A control flip-flop 190 or a channel B control flip-flop 192 is set by a line IO5. The selected peripheral I/O unit responds on either an AFLG or a BFLG line. This response sets the appropriate one of flag sense flip-flops 186 and 188, clears the previously set one of control flip-flops 190 and 192, and drives a line CA1 that is interrogated by the calculator firmware.

Referring now to FIG. 52, there is illustrated a portion of the I/O interface card 176 of FIG. 4. This circuitry is shown for one of the two peripheral I/O channels and is merely duplicated for the other channel. The 8-bit data bus 144 is controlled by a pair of lines ATS1 and ATS2 that are generated by an input bus enable decoder 194 of FIG. 50. Channel select latch 184 of FIG. 50 may be cleared with a line IO6 or by setting a null select code in the latch through line IO7. FIG. 52 also illustrates the plug-in I/O ROM 110 that stores routines and subroutines of instructions necessary for interfacing the calculator to the associated peripheral I/O unit. The plug-in I/O ROM associated with the selected I/O channel is enabled through a decoder 196 when the proper address is placed on selected lines of the 15-bit address bus 110.

Referring now to FIG. 53, there is shown another portion of the I/O interface card 176 of FIG. 4. FIG. 53 includes an input data latch 198 that receives data directly from the attached peripheral I/O unit. Also included is a bank of data output buffers 200 for buffering data received on bus 178 before it is transmitted to the attached peripheral I/O unit. The circuitry of FIG. 53 is shown in connection with I/O channel A. This circuitry is merely duplicated for I/O channel B. Input data from latch 198 and a flag line carrying status information regarding the attached peripheral I/O unit are enabled onto bus 144 through a bus enable circuit 202 that is controlled by lines ATS1 and ATS2. This is done to prevent multiple data sources on bus 144 at the same time. Data output line AD8 of bus 178 performs a special function in the event two peripheral I/O units employing identical plug-in I/O ROMs are connected to the calculator at the same time. Jumpered as shown in FIG. 53, this bit serves to disable one of the ROMs to prevent simultaneous access to both ROMs.

Operation of the magnetic tape cassette unit 12 of FIG. 4 may be understood with reference to the detailed block diagrams of FIGS. 30 and 31 and the detailed schematic diagrams of FIGS. 32-49.

Referring to FIG. 30, there is shown a detailed block diagram of a motor speed control system employed in the magnetic tape cassette unit 12. This system is configured as a frequency locked electronic servo loop whose output signal is locked to a reference input signal. The motor speed control system employs calculator system clock generator and divider 112, described hereinabove, to generate, through a gating circuit 204, shown in detail in FIG. 32, two reference frequency signals F.sub.r and F.sub.f. F.sub.r is associated with a signal FST, and F.sub.f is associated with a signal FST. F.sub.r is a 62.5-kilohertz signal that provides a magnetic tape search speed of approximately 60 inches/second. Data transfer is accomplished at 10 inches/second using F.sub.f, a 10.4-kilohertz signal. The appropriate reference frequency is gated into the servo loop as F.sub.r under control of CPU 100 via line DO9 of the data output bus 132.

A servo motor 206 is provided for driving a tape capstan. Capstan motion is translated into frequency feedback information F.sub.f by means of a 1000-line optical tachometer 208 coupled to the motor shaft. The circuitry associated with optical tachometer 208 includes a tach preamplifier and second stage amplifier 210, shown in detail in FIG. 33. The tach preamplifier comprises a photo transistor driving a current-to-voltage converter. An amplified analog signal ATC is AC coupled into a voltage comparator to provide a TTL signal F.sub.f. Positive feedback is employed to insure that F.sub.f is a clean waveform.

The reference signal F.sub.r and the feedback signal F.sub.f are applied to a frequency detector 212, shown in detail in FIG. 34. Frequency detector 212 dynamically compares F.sub.r and F.sub.f to produce two TTL error correction bits Q.sub.r and Q.sub.f. Frequency coincidence or mismatch is determined on the basis of the rising edges of F.sub.r and F.sub.f. If two rising edges of F.sub.r are detected without an intervening rising edge of F.sub.f, then F.sub.r < F.sub.f and an appropriate error condition is set. Similarly, if multiple rising edges of F.sub.f occur without an intervening rising edge of F.sub.r, then F.sub.r > F.sub.f and another error condition is set. Thus, frequency coincidence is determined for alternating rising edges of F.sub.r and F.sub.f. Frequency detector outputs are created and sustained solely on the basis of frequency data, independent of phase information. A summary of the possible combinations of logic states of Q.sub.r and Q.sub.f together with interpretive information is shown in Table 2 below. In this table logic levels are positive true, a logical zero being .ltoreq. 0.4 volts and a logical one being .gtoreq. 2.4 volts.

Bidirectional tape motion is employed in magnetic tape cassette unit 12. Tape direction is specified by a line DO10 of data output bus 132. A signal DO10 indicates forward tape motion and its complement indicates reverse tape motion. Line DO10 mulitplexes Q.sub.r and Q.sub.f onto selected ones of a number of control lines associated with a multiplexer 214, shown in detail in FIG. 35. A line FWD couples Q.sub.r to a source control input line SRC and Q.sub.f to a sink control input line SNK. A line REV gates Q.sub.r and Q.sub.f to the SNK and SRC lines, respectively. Lines SRC and SNK are control inputs to a bilateral current source 216, shown in detail in FIG. 36. Bilateral current source 216 responds to the condition of line SRC being a logical one and line SNK being a logical zero by sourcing current on a line OA into a filter 218. This condition forces a transistor 220 and a transistor 222 of FIG. 36 to cutoff. For the condition wherein lines SRC and SNK are both at logical zero, no corrective action is indicated because frequency coincidence exists. For this condition, line OA forces the output of bilateral current source 216 into a tri-state mode, and a line TRIST is set to a logical one. The tri-state mode also applies for the condition wherein lines SRC and SNK are both at logical one.

A basic function of filter 218, shown in the detailed schematic diagram of FIG. 38 along with a direction sense circuit 224 and a clamp circuit 226, is to remove noise and high frequency components from the error current signals on line OA. It is also important in determining the stability and dynamic performance of the servo loop. The bilateral current source 216 pumps charge on and off the capacitors within filter 218, thereby creating a dynamic voltage signal that is applied to direction sense circuit 224. This signal completes a digital-to-analog conversion from frequency detector 212.

The analog control signal on line OA is amplified and buffered by an operational amplifier comprising a voltage gain circuit 228, shown in detail in FIG. 39. Voltage gain circuit 228 drives a class B current gain circuit 230 is drive servo motor 206. Servo motor 206 may be characterized as a fractional horsepower DC permanent magnet motor. A 1-microfarad capacitor 232 is mounted across the motor terminals to restrict high frequency brush noise to the grounded motor housing.

Operation of the motor speed control system may be divided into an acceleration mode, a servo lock or steady state mode, and a deceleration mode.

During the acceleration mode, the servo loop is closed but is not locked to the reference frequency signal. In order to avoid excessive stress on the tape, servo motor, power supplies, and other components of the magnetic tape cassette unit, the gain of the servo loop is reduced. Loop gain is directly proportional to the value of the current on line OA from bilateral current source 216. The magnitude of this current is determined by a gain selector 234, shown in detail in the schematic diagram of FIG. 37. The state of a D flip-flop 236 switches a transistor 238 from cutoff to saturation. If transistor 238 is saturated, a high gain condition exists, and the current from bilateral current source 216 is at a maximum. On the other hand, if transistor 238 is at cutoff, a low gain condition exists, and the current from bilateral current source 216 is reduced. Before the acceleration mode is entered, a signal from PIA 106 on a STOP line selects the low gain condition.

When the servo loop has locked to the reference frequency signal, the acceleration mode has been completed. At this point it is desirable to increase the bandwidth of the servo loop by increasing its gain. The high gain condition is restored by pulling a line Q.sub.f high, signifying that F.sub.f > F.sub.r. The high gain condition remains until the deceleration mode is initiated.

During the deceleration mode the low gain condition is again selected by pulling the STOP line low. For controlled deceleration, a capacitor 240 in FIG. 38 is sensed to determine whether it is charged positively or negatively and is then linearly discharged or charged via bilateral current source 216 toward ground. Direction sense circuit 226 provides a 2-bit low power TTL-compatible output FWD.sub.A and REV.sub.A. If the voltage on capacitor 240 is greater than +0.3 volts, FWD.sub.A = 0 and REV.sub.A = 0. If the capacitor voltage is less than -0.3 volts, FWD.sub.A = 1 and REV.sub.A = 1. If the capacitor voltage lies within these limits, then FWD.sub.A = 1 and REV.sub.A = 0. Pulling the line STOP to logical zero forces both Q.sub.r and Q.sub.f to logical zero, as shown in FIG. 34. This condition also gates the FWD.sub.A and REV.sub.A lines into mulitplexer 214 to control the SRC and SNK lines, as shown in FIG. 35. Thus, the bilateral current source 216 is enabled to either charge or discharge capacitor 240 of FIG. 38 toward ground. When the capacitor voltage is reduced to lie within the range of +0.3 volts to -0.3 volts so that FWD.sub.A = 1 and REV.sub.A = 0 the TRIST line is pulled high, and capacitor 240 is clamped to ground until the STOP line is pulled low to enter the acceleration mode. Regardless of the load presented to motor 206 by a particular tape cartridge at any time during the steady state mode, the stopping distance remains nearly constant. This results from the fact that a heavy load requires a higher voltage at the motor for servo lock. In addition, a heavier load means that the motor will stall at a higher voltage level. Hence, tape movement will halt in an approximately constant distance independent of load and voltage levels.

An antimotion circuit 242 prevents servo motor 206 from moving during the power turn-on and turn-off cycles of the calculator. This circuit is shown in the detailed schematic diagram of FIG. 40. Motion is inhibited as long as line MPWO is held to logical zero.

General tape position information exists as a punched hole configuration in the magnetic tape. These holes are detected by means of a hole detection circuit 244, shown in detail in the schematic diagram of FIG. 42, basically comprising an incandescent light source 246 and a photo transistor 248. Photo transistor 248 drives a passive low pass filter, the voltage at which is related to a fixed threshold at the differential inputs of an operational amplifier 250. The operational amplifier 250 is configured as a comparator with positive feedback. Some logic circuitry following operational amplifier 250 generates a TTL-compatible logic signal HOL. The line HOL, a cartridge status line CIN, and a write prevent line WPR are inverted and presented on lines D12, D10, and D11, respectively, of data input bus 146. These signals are issued in response to a signal CSEN, by cassette handshake circuitry 252, shown in detail in the schematic diagram of FIG. 41. If a tape cartridge is ejected from magnetic tape cassette unit 12, line CIN is pulled low. If a hole is detected in the magnetic tape, line HOL is pulled high. In the event either of these conditions exists, a signal is issued on an interrupt line CB1.

Referring now to FIG. 31, there is shown a detailed block diagram of read-write circuitry associated with the magnetic tape cassette unit 12. A dual track, dual center tapped magnetic head 254 is employed for information transfer. A current source and write protect circuit 256, shown in detail in the schematic diagram of FIG. 44, drives magnetic head 254. A transistor 258 serves as the current source. Writing occurs when one of the head lines is switched from an open condition to a low condition. Current, as set by current source 256, is then allowed to flow from the center tap to the selected head line, thus setting up a flux field in the head gap. At some later point in time, the second head line associated with the selected track is switched from an open condition to a low condition. At the same time, the previously switched head line returns to an open condition. Current now flows from the center tap to the head line that is being held low. The flux field at the head gap is reversed, and the magnetic tape is saturated in the opposite polarity. A flux reversal is said to have been written on the tape. Information is written on the tape by alternately producing low and open conditions on the head lines associated with a selected track.

A group of analog switches 260 performs the function of switching the magnetic head lines. These switches and associated logic circuitry are shown in detail in the schematic diagram of FIG. 43. A binary-to-decimal decoder 262 with high voltage open collector outputs is arranged to decode an incoming data stream on line DO11 of data output bus 132. Decoder 262 also decodes a track select line TKB and a write line WRT. Current source 256 is turned off when power turn-on or turn-off occurs in the calculator or when line WRT is pulled low, as shown in FIG. 44.

A read operation uses the full track width of the magnetic head 254 for maximum signal strength. The center tap of the head is not used. Analog switches 260 gate the magnetic head signals of the selected track to the inverting and non-inverting inputs of a differential preamplifier 264, shown in detail in the schematic diagram of FIG. 45. As in write operations, the binary-to-decimal decoder 262 of FIG. 43 controls the analog switching. Preamplifier 264 is configured differentially to maximize common mode rejection. The gain of this preamplifier is adjusted to compensate for differences in individual head characteristics. Flux reversals previously written on the moving tape produce current reversals in the magnetic head. These current reversals appear as positive and negative voltage pulses on an output line AHD of differential preamplifier 264. The nominal signal level on line AHD is 136 millivolts peak to peak.

A second stage amplifier/filter 266 applies an additional voltage gain factor of twenty to read signal. Circuit details of second stage amplifier/filter 266 are shown in the schematic diagram of FIG. 46. A low impedance input is provided for better noise immunity. Amplifier/filter 266 is configured to provide equal gain for the signal on line AHD and for signals appearing at an inverting input to improve the common mode rejection. A single pole filter at approximately 40 kilohertz provides high frequency attenuation. The signal on an output line AHD2 of amplifier/filter 266 is nominally 2.6 volts peak to peak.

The output of second stage amplifier/filter 266 is connected to an integrator 268, shown in detail in the schematic diagram of FIG. 47. The inverting input of an operational amplifier 270 is at virtual ground. Thus, the voltage on an integrating capacitor 272 relative to ground is dynamically adjusted to be proportional to the area of the signal on input line AHD2. A resistor 274 provides a feedback path for DC biasing purposes. A capacitor 276 blocks the DC offset of previous amplifier stages and allows only unity DC gain for integrator 268. This arrangement serves to attenuate low frequency noise. Integraror 268 also attenuates high frequency noise because of the fact that integrators inherently respond to signal area. As the magnetic tape accelerates or decelerates, the level of the signal at the magnetic head, as well as its frequency, increases or decreases. Hence, the area of the voltage pulses remains relatively constant, and the integrator can track speed variations with small peak to peak variations from the nominal level of the output signal on a line INT.

Because the integrator is sensitive to input signal area, changes in area produce dynamic variations in the DC component of the signal on line INT. This condition is compounded by the loss introduced by biasing resistor 274. To alleviate this problem, the signal on line INT is sampled both above and below ground level and a CD tracking circuit 278, shown in detail in the schematic diagram of FIG. 48. Germanium diodes are employed because of their low voltage turn-on characteristics and so that the sampling signal is in phase with the signal on input line INT. A pair of capacitors 280 retains the sampled voltage levels. Two resistors 282 are employed as summing inputs for an operational amplifier 284 configured as a voltage follower. These resistors are also required for charging and discharging capacitors 280 to enable sampling of subsequent voltage peaks.

A comparator 286, shown in detail in the schematic diagram of FIG. 49, receives line INT from integrator 268 and a line DCL from DC tracking circuit 278. Since the signal on line DCL should track the DC component of the signal on line INT, comparator 286 functions basically as a relative zero crossing switch with a TTL-compatible output. To create some effective hysteresis for noise immunity, positive feedback is provided through inverters to each of the inputs of comparator 286. Voltage division is employed to determine the amount of voltage hysteresis.

A frequency doubler 288 in FIG. 31 is also included in the circuitry of FIG. 49. A resistor 290 and a capacitor 292 provide a slight time dealy at one of the inputs to an exclusive OR gate 294. The other input is not delayed. Thus, each rising or falling edge of the signal on a comparator output line results in a pulse at the output of exclusive OR gate 294. The rising edge of each of these pulses is coincident with an edge of the output signal of the comparator. The rising edge becomes a falling edge at line CA1 that is fed to PIA 106.

Operation of the power supplies that power the calculator hardware may be understood with reference to the detailed schematic diagrams of FIGS. 54-59. When a power switch 22 of FIGS. 1 and 54 is placed in the "on" position, AC line voltage is supplied to the primary of a transformer 298 through a pair of switches on the primary side of transformer 298. These switches are arranged to accept any one of four AC line voltages. These may be 100, 120, 220 or 240 volts. Secondary filtering is employed to reduce interference on the AC line. A full wave bridge rectifier is employed to provide both positive and negative raw voltages of approximately 25 volts on a pair of lines +RAW and -RAW.

Referring now to FIG. 55, there is shown a detailed schematic diagram of a switching regulator for deriving +5 volts from line -RAW.

Referring now to FIG. 56, there is shown a detailed schematic diagram of circuitry for supplying regulated voltages of +12 and +15 volts from line +RAW. The +15 volt supply employs a series pass regulator 300 that includes a current limit circuit. A resistor 302 may be adjusted to set the output voltage between 14.7 volts and 15.9 volts.

Referring now to FIG. 57, there is shown a detailed schematic diagram for supplying -5 and -12 volts from line -RAW. This circuitry employs series pass regulators.

Referring now to FIG. 58, there is shown a detailed schematic diagram of a -100 volt power supply and an associated pulse shaping circuit 304. Pulse shaping circuit 304 receives a 20-kilohertz square wave from system clock generator and divider 112 and produces a 20-kilohertz train of narrow pulses for use by the -100 volt power supply. The -100 volt supply is controlled by a timer 306. The negative pulses from pulse shaping circuit 304 are applied at pin 2 of timer 306. These pulses trigger the timer, resulting in charging a capacitor C1 through a resistor R1. At the same time, pin 3 is pulled high and turns on a transistor Q1. Timer 306 remains on until the voltage at pins 7 and 6 reaches the internal level or the feedback voltage on pin 5. At that point in time, the output at pin 3 is turned off, and pins 6 and 7 are clamped to ground, thus discharging the capacitor C1. These conditions remain until the next negative pulse appears at pin 2.

When transistor Q1 is turned on, 15 volts is applied across coil L1. Because of a 4:1 turns ratio on coil L1, the voltage applied to a capacitor C3 is 60 volts.

Timer 306 switches before the core of coil L1 saturates, thus generating a high flyback voltage across coil L1. As the voltage at the collector of transistor Q1 increases, the voltage at capacitor C3 decreases until a diode D3 becomes forward biased. This clamps the ringing voltage and dumps the energy into a capacitor C4. A diode D1 is employed to clamp the output voltage of transistor Q1 so that the negative ringing does not destroy the transistor. When the output voltage appearing across a capacitor C4 reaches -100 volts, a diode D4 begins to conduct. This begins to pull pin 5 of timer 306 lower than the internal reference. As the voltage on pin 5 decreases, the on time of timer 306 also decreases. This reduces the energy stored in the coil L1 and results in stabilizing the output voltage near -100 volts. A resistor R3 is employed to limit the charging current to a feedback capacitor C2.

Referring now to FIG. 59, there is shown a power on detection circuit employed to sense whether operating power has been applied to the calculator by interrogating the line +RAW. A pulse is generated on the line MPWO by an RC time constant after the +5 volt power supply reaches its operating voltage. When operating power to the calculator is turned off, the line +RAW is the first of the power supply lines to die. This condition is detected, and another pulse on line MPWO is generated. The line MPWO is used by various portions of the calculators hardware for initialization purposes.

Operation of the calculator firmware may be understood with reference to FIGS. 5-10, the calculator firmware listing of routines and subroutines stored within the calculator read-only memory, and the flow charts of these routines and subroutines illustrated in FIGS. 60-77F.

Referring to FIG. 5, there is shown a simplified block diagram of the calculator firmware. Included are ROMs 0-6 comprising basic read-only memory 104 of FIG. 4, ROM 7 comprising the optional read-only memory 105 of FIG. 4, and the two I/O ROMs comprising the optional plug-in I/O ROMs 110 of FIG. 4.

ROM 0, also referred to as the system control ROM, contains a group of supervisor routines, a linkage table, and syntax tables, as shown in FIG. 6. ROMs 1-6 contain various ROM execution routines also shown in FIG. 6. ROM 7 is available for storing routines and subroutines of additional instructions to expand the capability of the calculator. Optional plug-in I/O ROMs 1 and2 of FIG. 5 contain routines and subroutines of instructions for interfacing various peripheral I/O units to the calculator.

A detailed listing of the routines and subroutines of instructions stored in ROMs 0 and 3-6, together with a listing of the routines and subroutines that may be stored in two typical plug-in I/O ROMs, is provided hereinafter. In addition, detailed flow charts of these routines and subroutines are variously shown in FIGS. 60-77F. No listing of the floating point math routines stored in ROM 1 or the cordic math alogorithm routines stored in ROM 2 is provided since these routines are well known and may be readily implemented by those persons skilled in the art of computer logic.

Referring now to FIG. 7, there is shown a memory allocation diagram of the optional plug-in I/O ROMs illustrating their format by hexadecimal addresses.

Referring now to FIG. 8, there is shown a map illustrating the allocation, by hexadecimal addresses of the entire calculator memory.

Referring now to FIG. 9, there is shown a detailed memory map of the base page or system read-write portion of the basic read-write memory 102 of FIG. 4. This base page is employed for storing several words of information used by the calculator firmware. It includes a status storage area used by the calculator firmware, a subroutine vector stack for storing return addresses associated with user subroutines, a temporary read-write or scratch pad memory, a buffer register used by the calculator and printer, a user operational stack including X, Y, Z, and T registers, a keycode buffer register, five user data storage registers A-E, pointers associated with the plug-in I/O ROMs, and various other pointers used by the calculator firmware.

Referring now to FIG. 10, there is shown a detailed memory map of the user portion of basic read-write memory 104 of FIG. 4. This map illustrates a pointer EOPM separating a program storage portion of user read-write memory from a data storage portion. This boundary pointer EOPM may be moved within the user read-write memory at the discretion of the user by execution of an instruction from the keyboard or under program control, as described in detail hereinafter. This arrangement results in more efficient use of the calculator read-write memory by allowing the user to quickly and easily adjust the respective sizes of the program and data storage portions thereof to suit his present needs.

A complete assembly language listing of all of the routines and subroutines of instructions employed by the calculator is given below. The listing includes all routines and subroutines stored in ROMs 0 and 3-6 of the basic read-only memory 104 of FIG. 4 as well as all the routines and subroutines stored in a general purpose plug-in I/O ROM and a plotter plug-in I/O ROM. Each page within the listing is numbered at the upper left-hand corner, and its page number within the specification as a whole is indicated at the bottom of the page. Each line of each page is separately numbered in the first column from the left-hand side of the page. This numbering arrangement facilitates reference to different portions of the listing. Descriptive headings are also provided throughout the listing to identify routines, subroutines, groups of constants, linkage tables, optional plug-in I/O ROM routines and subroutines, etc. Each instructiom of each routine or subroutine and each constant stored in the ROMs of the basic read-only memory or the optional plug-in I/O ROMs is represented in hexadecimal form by two, four or six characters in the third and fourth columns from the left-hand side of the page. Each of these instructions may be understood in detail by referring to published literature associated with the Motorola MC6800 microprocessor. The hexadecimal address of the ROM location in which each such instruction or constant is stored is given in the second column from the left-hand side of the page. By comparing the hexadecimal address given in the listing for a particular instruction to the addresses associated with the various ROMs shown in FIG. 6, it can be seen in which of the ROMs 0-6 that instruction resides.

Mnemonic labels serving as symbolic addresses or names are given in the fifth column from the left-hand side of the page. A mnemonic code for each of the instructions is given in the sixth column from the left-hand side of the page. In the case of those instructions involving a reference to one of the two accumulators within CPU 100, either the letter A or the letter B appears in the seventh column from the left-hand side of the page to designate the appropriate accumulator. Operands that may be either labels or literals associated with each of the instructions are located in the eighth column from the left-hand side of the page. Explanatory comments are given in the remaining portion of each page.

In addition, symbol tables are included following various sections of the listing to relate various mnemonic labels to their hexadecimal values. ##SPC1## ##SPC2## ##SPC3## ##SPC4## ##SPC5## ##SPC6## ##SPC7## ##SPC8## ##SPC9## ##SPC10## ##SPC11## ##SPC12## ##SPC13## ##SPC14## ##SPC15## ##SPC16## ##SPC17## ##SPC18## ##SPC19## ##SPC20## ##SPC21## ##SPC22## ##SPC23## ##SPC24## ##SPC25## ##SPC26## ##SPC27## ##SPC28## ##SPC29## ##SPC30## ##SPC31## ##SPC32##

All operations performed by the calculator may be controlled or initiated by the keyboard input unit and/or by keycodes entered into the calculator from the keyboard input unit, the magnetic tape cassette unit, or peripheral I/O units and stored, in modified form, as program steps in the program storage section of the read-write memory. An operational description of the calculator is therefore now set forth with specific reference to the perspective view of the calculator as shown in FIG. 1 and the plan view of the keyboard as shown in FIG. 3, except as otherwise indicated.

The calculator employs reverse polish notation (RPN) language that involves the use of an operational stack of four registers referred to herein as the X, Y, Z and T registers. Simple arithmetic operations are performed by placing data in the X and Y registers and then actuating one of the arithmetic operator keys. The calculated result is placed in the X register.

The 16-character display 14 shows each number entered from the keyboard 10 and each calculated result. The 16-column thermal printer 16 can be called upon to print the data currently displayed. In addition, the display 14 and printer 16 are valuable programming aids.

The dynamic range of the calculator is from -9.999999999 .times. 10.sup.99 through 9.999999999 .times. 10.sup.99. When a calculated result lies outside this range, the message OVERFLOW is printed. All calculations are to twelve places, but the accuracy depends upon the function performed. Ordinary arithmetic functions are accurate to one count in the 12th digit.

In addition to the four working registers X, Y, Z, and T comprising the operational stack, the basic calculator includes ten permanent data storage registers and a 472-step program memory. The program memory may be expanded to 2008 program steps by adding read-write memory to the calculator, as discussed hereinabove. Additional data storage registers may be assigned by the user when needed.

The calculator may be operated by means of a program stored on an external magnetic tape cartridge placed into the magnetic tape cassette reading and recording unit 12. External magnetic tape cartridges can store either pre-recorded factory programs or programs written by the user.

By inserting optional plug-in I/O ROMs into one or both of the slots provided therefor on the rear panel of the calculator, the calculator may be interfaced to one or more peripheral I/O units. These include, for example, the Hewlett-Packard 9862A X-Y Plotter the Hewlett-Packard 9863A Paper Tape Reader, the Hewlett-Packard 9884A Paper Tape Punch, the Hewlett-Packard 9864A Digitizer, and the Hewlett-Packard 9866A Page Printer. In addition, the calculator may be interfaced to most BCD-compatible instrumentation and, through the use of a universal interface bus manufactured by Hewlett-Packard Company, to nearly all bus-compatible instrumentation.

FIG. 3 illustrates the layout of the calculator keyboard and includes the mnemonic designation or designations associated with each of the keys. Many of the keys have both a primary function designated by the mnemonic inside the key outline and a secondary function designed by the mnemonic above the key outline, with the exception of an ENTER .uparw. key, a DECIMAL POINT key, and a group of keys A-O located in the lower left-hand corner of the keyboard, all of whose alternate functions are designated by mnemonics below the key outline. With the exception of keys A-O, these alternate functions may be entered by prefacing actuation of the desired key by actuation of a blank key located in the upper right-hand portion of the keyboard (hereinafter referred to as the BLANK key). The alternate functions indicated below keys A-O all represent programming functions that are entered by merely actuating their associated keys whenever the calculator is in a program mode of operation. No preceding actuation of the BLANK key is required in connection with this group of functions.

Some of these and other keys of the keyboard are associated with characters located below the key outline. These characters may be printed and are automatically entered into the calculator by actuation of their associated keys when the calculator is in an ALPHA mode of operation, described in detail hereinafter.

The two switches on the far right-hand side of the keyboard are used to select the various printer and calculator operating modes. The printer switch is set to the ALL position to automatically print each keyboard operation. To conserve paper, the printer switch may be placed in the OFF position. The printer switch may be placed in the NORMAL position to enable printing during program entry but to suppress printing during execution of functions. The NORMAL position is useful to avoid manually switching the printer off to suppress oftentimes undesired printing during function execution. The calculator will print various messages regardless of the setting of the printer switch. These include messages indicative of peripheral I/O unit status and error messages indicative of incorrect operations. A list of printed error messages is included hereinafter. The operating mode switch is placed in the RUN position when executing functions from the keyboard of when running a program stored in read-write memory.

The 16-character display indicates a calculator busy condition during lengthy keyboard or program executions by displaying a hyphen at each character position of the display. A displayed number may be printed at any time by simply actuating the PRINT key.

The number entry keys of the keyboard are arranged as on an adding machine. Numbers are entered into the calculator one digit at a time from left to right and may include a decimal point. Before entering a second number into the calculator, the first one is saved by actuating the enter .uparw. key. To enter a negative number into the calculator, the + - key is actuated after keying in the number. The + -key may simply be actuated to change the sign of a calculated result. Large numbers may be entered in scientific notation by actuating the E EX key operationsl entry of the mantissa and the exponent.

The X register may be cleared anytime during number entry by actuating the CLX key. All four registers of the operaational stack may be cleared by actuating the CLEAR key. The RESET key may be used to clear a key sequence that has not been completed.

Calculations involving two numbers and one arithmetic operator are performed by keying in the first number, saving it in the Y register by actuating the ENTER .uparw. key, keying in the second number, and finally actuating the selected arithmetic operator key. The result, appearing in the X register, is displayed.

Calculations involving more than one arithmetic operation are performed by keying in the first number and saving it and then keying in subsequent numbers each followed by the appropriate arithmetic operator. Only the first number keyed in need be saved by actuating the ENTER .uparw. key. Each subsequent number keyed in after actuation of an arithmetic operator key is automatically saved.

The last number entered into the calculator before actuation of an operator key is automatically stored in a location called LAST X. That number may be recalled into the X register and used after actuation of that operator key by actuating the BLANK key followed by the LAST X key. Such a recall also causes an automatic ENTER .uparw. just like keying in a number after actuation of an arithmetic operator key. The LAST X location is not cleared by actuation of either the CLEAR or CLX keys.

Simple arithmetic operations like those discussed above require the use of only the X and Y registers of the operational stack. More complicated functions require the use of either or both of the Z and T registers of the operational stack. The four registers of the operational stack may be thought of as being arranged vertically, the X, Y, Z, and T registers being stacked from bottom to top, respectively. Numbers entered from the keyboard are automatically placed in the X register. A subsequent, actuation of the ENTER .uparw. key duplicates that number in the Y register while moving the number previously stored in the Y register to the T register. The number previously stored in the T register is lost. Actuation of the ENTER .uparw. key thus moves the contents of the stack registers up. Similarly, when an arithmetic operator key is actuated, the result of the operation is placed in the X register and the previous contents of the Z and T registers are moved down to the Y and Z registers, respectively.

The contents of the stack registers may be manipulated by some control keys of the keyboard. The X Y key exchanges the contents of the X and Y registers without disturbing the Z and T registers. The R .dwnarw. key rolls the contents of each stack register down to the next register, the contents of the X register being placed in the T register. A similar operation is performed in the up direction by the R .uparw. key. Actuation of the BLANK key followed by the STACK key prints the contents of each of the stack registers in sequence from T to X.

Printed and displayed numbers normally appear in a fixed format with two digits to the right of the decimal point. To select another fixed format, the BLANK key is actuated and is followed by actuation of the FIX key and one of the numeric keys 0 through 9. The numeric key indicates the number of digits to the right of the decimal point. When a calculated result of a number entered from the keyboard is too large for the present fixed format, a scientific format is automatically selected by the calculator. The user may select either a standard scientific format or a special scientific format for displayed and printed numbers. The standard scientific format is selected by actuating the BLANK key followed by the SCI key followed by one of the numeric keys. As in the case of a fixed format, the numeric key indicates the number of digits to the right of the decimal point. The special scientific format is selected by actuating the BLANK key followed by the SCI3 key followed by a numeric key. When this format has been selected, printed and displayed numbers appear with exponents that are always even multiples of three.

Ten fixed data storage registers are automatically provided the user for storing numbers representing, for example, intermediate results of calculations. Each of these registers can store one number and is accessed for storage and recall by actuating the STO and RCL keys followed by one of the keys A through J that designate each of the registers. Additional data storage registers may be assigned by the user as needed.

All data storage registers are automatically cleared when the calculator is turned on. To clear fixed data storage registers A through J, without disturbing other registers, the STO key is actuated and is followed by actuation of the CLEAR key. Additional data storage registers assigned by the user are cleared by storing zero in them or by using a clear routine set forth hereinafter.

Arithmetic operations may be performed directly on the contents of the X register and a data storage register without first recalling the stored number. The result is placed in the data storage register without disturbing the contents of the X register. These operations are performed by actuating the STO key followed by the desired arithmetic operator key followed by the key or keys designating the desired storage register.

Indirect store and recall operations may be performed by specifying a register designation that contains the designation of the register in which the desired data is stored. These operations are performed just like direct store and recall operations, except that the RCL key is actuated before the key designating the intermediate register is actuated. Only the absolute integer value of the contents of the intermediate register is used as the indirect register number. The sign and any fractional part are ignored.

The above-described register arithmetic and indirect storage operations may be combined to perform indirect register arithmetic. The general key sequence is the STO key followed by the desired arithmetic operator key followed by the RCL key followed by the storage register designation key. In each case, the chosen arithmetic operation is performed on the contents of the X register and the contents of the register designated by the contents of the register designated in the key sequence. The result is placed in the register designated in the key sequence and the X register remains unchanged.

Additional data storage registers may be assigned by the user as required. These data storage registers are formed from the portion of user read-write memory not already filled with program instructions. The additional data storage registers are assigned by actuating the numeric keys representing the desired number of additional data storage registers followed by the BLANK key followed by the STO key. If the unfilled portion of user read-write memory is not large enough to accept a particular data storage assignment, an error message MEMORY OVERFLOW will be printed, and the attempted assignment will be ignored. Additional data storage registers remain assigned until the assignment is either changed or the calculator is turned off. The contents of previously assigned data storage registers are not altered by a subsequent assignment so long as they lie within the subsequent assignment. If there is not enough program memory available to accept a specified register assignment, an error message MEMORY OVERFLOW will be printed, and the assignment will be ignored. The user may assign up to 250 additional data storage registers when the calculator is configured with the optional read-write memory 103 shown in FIG. 4. These registers are labelled from 000 through 249. The portion of user read-write memory not assigned as data storage registers is available for storing program steps. This arrangement results in more efficient use of the read-write memory than is possible in those calculators and computers having separate fixed areas for program and data storage. The above key sequence for assigning additional data storage registers may be executed either manually or from program control, thus giving the user flexibility in reconfiguring the user read-write memory to accommodate his specific requirements at any point in time. This eliminates the often encountered problem in prior art calculators and computers of having too much program storage and not enough data storage or vice versa. In addition to providing this memory definition flexibility for the user, the calculator provides complete protection for each storage area. That is, the calculator prevents the user from storing data into a storage register that has not been previously assigned as a data storage register and similarly prevents him from storing program steps into the assigned data storage registers. If the user attempts to store data into a data storage register that has not previously been assigned, an error message ILLEGAL ADDRESS will be printed.

A block of assigned data storage registers may be cleared by first deleting the block and by then reassigning it. For example, if data storage registers 000 through 024 have been assigned and it is desired to clear registers 010 through 024, this may be accomplished by first assigning registers 000 through 009 and by then assigning registers 000 through 024. The result is that assigned data storage registers 010 through 024 are cleared while registers 000 through 009 remain unaltered.

In addition to the four simple arithmetic functions previously discussed, there are twenty-four scientific functions represented by keys on the keyboard. These keys are grouped in a block and are located near the right-hand side of the keyboard just to the left of the printer and control switches. Each of these scientific function keys has primary, alternate, and inverse functions associated with it. A primary function is designated by merely actuating the desired key. The alternate function associated with a particular key, indicated by nomenclature above the key, is selected as discussed above by first actuating the BLANK key. The inverse function is designated by first actuating the f.sup.-1 key.

Functions involving angles, such as trigonometric functions and angular conversions, may be performed in either decimal degrees, radians or metric grads. The calculator is automatically set to accept angle values in degrees when it is turned on. Thus, the user may specify any of the three units to angular measurement by actuating the BLANK key followed by the numeric keys, 1, 2, and 3 for degrees, radians, and grads, respectively.

A conversion from decimal angular units to degrees, minutes, and seconds is available from the keyboard by actuating the BLANK key followed by the .fwdarw. D.MS key. A conversion from degrees, minutes, and seconds to the equivalent decimal form of the angular units currently selected is available by actuating the BLANK key followed by the D.MS .fwdarw. key. When performing the conversion from decimal degrees, radians or grads to degrees, minutes, and seconds, the result returned to the X register includes the decimal portion of seconds.

An ALPHA mode of operation may be selected by actuating the CALL ALPHA key twice. This key is also used, by actuating it just once, to access control of peripheral I/O units connected to the calculator. After actuating this key twice, the message ALPHA appears in the display to indicate that the ALPHA mode has been selected. The user may then selectively actuate the various alphanumeric keys of the keyboard to form a desired message. After the last alphanumeric character of the message has been keyed in, the ALPHA mode may be terminated and the message printed by actuating the CALL ALPHA key once more. In the event the desired message is sixteen or more characters in length, printing will automatically occur as every sixteenth character is keyed in.

A number of keys of the keyboard take on control functions in the ALPHA mode of operation. For example, the ENTER .uparw. key becomes a NEW LINE control key. Actuation of this key causes the calculator to print all alphanumeric characters that have been keyed in and to then advance the printer paper to the next line. Successive actuations of the NEW LINE key cause the calculator to advance the printer paper one line at a time. The X Y key becomes a SPACE control key during the ALPHA mode of operation and is used to insert spaces into an alphanumeric character message. Actuation of the PRINT key at a selected position within an alphanumeric message causes the calculator to print the number currently stored in the X register at that position within the alphanumeric message. The number appears right justified on the line unless alphanumeric characters follow the number. It is also printed in the particular fixed or scientific number format currently selected. This feature is useful for printing labels and calculated results on the same line. The printed number always appears on the same line as the alphanumeric message, provided there is sufficient space for it within the 16-column print field. If the space available is too small, the entire number is printed on the next succeeding line of print. In the event the user makes an error while keying in an alphanumeric message, the ALPHA mode may be cancelled without printing the message by placing the control switch in the lower right-hand corner of the keyboard in the PRGM position and then back to the RUN position. This switch movement has no effect on the numbers stored in the four registers of the operational stack or on the calculator memory.

In addition to manual execution of commands entered from the calculator keybard, the calculator may also be operated automatically by a program stored in the user read-write memory. The program is stored in the form of a modified version of the keycodes associated with each of the keys, as shown in FIG. 29. Unlike some calculators in which only a portion of the keys are programmable, the present calculator permits the user to include within a program every key sequence associated with manual operation of the calculator. In addition, the calculator keyboard includes a block of keys representing program control functions. These include subroutine branching and labelling keys, qualifier keys, and looping keys for repeating program segments automatically. These program control keys are located in the left-hand third of the keyboard area. They include the alternate functions shown below keys A through O. The basic read-write memory has capacity for storing 472 program steps at locations 0000 through 0471. By adding an optional read-write memory, program storage can be increased to 2008 program steps. Each step comprises one program instruction that may be either a single key actuation such as the + key or the PRINT key or a combined key sequence such as the STO key followed by the A key or the BLANK key followed by the SIN key. Appropriate key sequences are combined automatically as a program is entered, and a single instruction code representing the entire sequence is stored in user read-write memory. This instruction code is built internally by a series of firmware syntax tables. These tables define a number of key sequences that are valid at any given time along with their corresponding instruction codes. This arrangement is unlike prior art calculators in which each key actuation occupies a separate storage location in memory. The arrangement in the present calculator is advantageous in that a larger program may be stored in the same amount of memory. It is also advantageous in that program execution is more efficient because less syntax checking is required at that time. This results from the fact that a partial syntax check has, in effect, been performed at the time the program was entered to recognize those key sequences resulting in a single internal instruction code.

The program storage portion of the user read-write memory of the calculator may be cleared before entering each new program without altering the contents of any of the data storage registers or the operational stack registers. This is accomplished by placing the control switch in the PRGM position and sequentially actuating the K and N keys. The calculator may be turned off to clear the entire read-write memory.

The calculator includes an internal program counter for determining which program step is displayed, printed or executed. Many programming keys and instructions control the operation of the program counter, allowing the user to enter, edit, run, and record programs. The program counter may be set to any desired step when the calculator is in the PRGM mode by actuating the GO TO key followed by numeric keys representing the program step location in memory. Just as in specifying assigned data storage registers, only the significant digits representative of the memory location need by keyed in if those key actuations are immediately followed by actuation of a non-numeric key or the DECIMAL POINT key. For example, to set the program counter to location 0025, the calculator is placed in the RUN mode and the key sequence GO TO 25. is entered, or the key sequence GO TO 0025 is entered. The calculator is then placed in the PRGM mode, and the current step location 0025 together with the number of step locations between the current step location and the end of the program storage portion of the user read-write memory are displayed. The program counter may be manually incremented or decremented while entering a program by actuating the STEP and BKSTEP keys. The program counter is automatically incremented as each program step is entered. It is automatically set to step location 0000 whenever the END key is actuated while the calculator is in the RUN mode, whenever the calculator is turned on, and whenever the program storage portion of user read-write memory is erased.

A program is entered by setting the program counter to the desired beginning step location and by then placing the calculator in the PRGM mode and keying in the program. As each program step is entered the printer lists the step instruction and prints the next step location. The last step instruction of each program must be END.

The printer automatically lists each step location and step instruction during program entry if the printer switch is in the NORM position. When the calculator is in the PRGM mode, the printer also lists each step location as the program counter is manually incremented or decremented. Any portion of a stored program may be listed by setting the program counter to the desired beginning step location and actuating the LIST key. The listing may be stopped by actuating the RUN STOP key. Listing automatically stops when an END step instruction is encountered.

After the program has been entered, it may be executed by placing the calculator in the RUN mode, setting the program counter to the beginning of the program, and actuating the RUN STOP key. Program execution continues until either a STOP or END instruction is encountered. The user may halt program execution at any time by actuating the RUN STOP key.

Labels may be used as a program aid to name a location in a program. The label instruction is located immediately before the program area to which it refers. The program counter may then be set to the label location by an appropriate branching instruction such as GO TO. Labelling provides a method of addressing program segments independent of step location in memory. A time-saving technique often used when entering and debugging programs is to use labels whenever possible for branching. Then, as program steps are inserted or deleted the branching instructions do not need to be altered. Once the program is operating satisfactorily is the labels originally used in connection with the branching instructions may be replaced with absolute step locations in memory.

A label may be entered by actuating the LABEL key followed by one or more alphanumeric keys to designate the label. For example, if it is desired to establish a label 01 located at step location 0050, the program counter is first set to that step location and the key sequence LABEL 01 is entered. A labelled program segment may be executed under program control manually from the keyboard. To execute a program segment labelled 06 from the keyboard, it is only necessary to enter the key sequence GO TO LABEL 6 RUN.

Execution of a branching instruction sets the program counter to a designated step location in memory. Program execution then automatically continues from that step location. Both absolute and computed branching instructions are available to the user. An absolute branching instruction causes the program counter to be set to a fixed step location that may be specified as a label. Actuation of the GO TO key followed by a numeric step location or actuation of the GO TO key followed by the LABEL key followed by alphanumeric keys representative of a label are exemplary of absolute branching instructions.

A computed branch instruction results in the program counter being set to a step location indicated by the current contents of the X register. Depending upon the branching instruction, the absolute integer portion of the contents of the X register indicates either a step location or a numeric label. The general sequence for entering computed branching instructions is GO TO X or GO TO LABEL X. This arrangement for computed branching statements represents an advantage over prior art arrangements wherein the user was required to predefine a limited set of destination addresses for each computed branching instruction used and then compute the one address of the set to be used at a given point in time. In the present calculator, the user merely places the destination step location in the X register in advance of execution of the branching instruction. In addition, the user is given added flexibility in that the branch may be to either a computed fixed step location or to a computed label.

IF instructions cause the calculator to make logical comparisons between the contents of the X and Y registers or the current state of some program flags described hereinafter. If the comparison is true, the next program step instruction is executed. However, if the comparison is false, the next program step instruction is skipped. The program step instruction next following an IF instruction usually, but not necessarily, is a branching instruction. Eight IF instructions and their corresponding key sequences are shown in Table 3 below.

A subroutine is a sequence of program instructions that may be used repeatedly, perhaps in several different programs, yet need be stored only once in the memory. A program can branch to, or call, a subroutine at any time through use of a GO SUB instruction. Then, after the subroutine has been executed, a RETURN instuction located at the end of the subroutine causes execution to resume at the step instruction next following the GO SUB instruction. The GO SUB instruction calls a subroutine by specifying either a step location or a label, or it can be in computed branch form similar to the computed GO TO instruction. Subroutines may be nested to a depth of seven. Returns are made on a last in, first out basis, so the returning order is always opposite of the calling order.

FOR-NEXT instructions permit the repetition of any instruction sequence. The FOR and NEXT instructions form a loop with the instruction sequence to be repeated located between them. Each FOR-NEXT instruction is associated with a pair of data storage registers. Data register pairs A & F, B & G, and C & H are available for this purpose. The first register of each pair is specified in the FOR instruction and is the loop counter. The second register of each pair holds the final value. When register pairs A & F an B & G are used, the loop counter is incremented by unity each time the loop is executed. When register pair C & H is used, however, the loop counter is incremented as specified by the contents of register D. FOR-NEXT instructions may be nested but, since there are only three register pairs available, they may be nested only three deep.

Flags may be employed as programmable indicators to allow the calculator to make decisions or to advise the user of certain program conditions. Each of the flags is either set or cleared, and each may be set or cleared either manually from the keyboard or under program control. In addition, all flags are cleared by actuating the END key, by executing an END instruction within a program or by turning the calculator on. Eight flags are available in the calculator. Flags 1 through 4 are for general program use, while flags 5 through 8 have dedicated functions. As generally used, a flag is set by some program sequence or event. Then, later in the program, the state of the flag can be checked to determine a subsequent activity. Flags 1-4 may be set by actuating the SFG CFG key once followed by a numeric key to designate the flag. Those flags may be cleared by actuating the SFG CFG key twice followed by the appropriate numeric designation. Flags 5 and 6 are used to intercept certain error messages. When flag 6 is set, the suppressable error messages such as OVERFLOW will not be printed. Instead, flag 5 is automatically set whenever a suppressable error occurs. Flag 7 is automatically set whenever a STOP instruction is executed. If data is entered before program execution is continued, flag 7 is cleared. However, if no data is entered before program execution is continued, flag 7 remains set. Flag 8 may be toggled from the set to clear states by successive actuations of the SFG CFG key during program execution.

Several of the keys on the calculator keyboard are useful in performing editing functions on a program stored in the user read-write memory. When a program does not run as expected, the first step usually taken by the user is to examine a listing of the program. To list an entire program, the program counter is set to the first step location of the program, and the LIST key is actuated. A portion of a program may be listed by setting the program counter to the desired step location and then actuating the LIST key. The RUN STOP key may be actuated to halt the listing.

One method often used to check a defective program is to execute it, one instruction at a time. This may be done, while the calculator is in the RUN mode, by setting the program counter to the first step location of the program and then successively actuating the STEP key. Each time the STEP key is actuated, the current instruction is executed, the program counter is advanced to the next step instruction to be executed, and the executed result is displayed.

To change a program step instruction, the program counter is set to the desired step location, the PRGM mode is selected, the new instruction is entered from the keyboard, and the calculator is returned to the RUN mode. If the new instruction requires two program steps, while the old instruction required only one step, the calculator will automatically shift the remainder of the program by one step to accommodate the new instruction and will automatically renumber any affected branching instructions. Similarly, if the new instruction requires only one step, while the old instruction required two steps, the calculator will shift the remainder of the program by one step and renumber any affected branching instructions.

Program instructions may be deleted by setting the program counter to the step location of the unwanted instruction, placing the calculator in the PRGM mode, and then actuating the DELETE key. The calculator automatically moves the remainder of the program to fill the empty step and renumbers any affected branching instructions. An entire block of instructions may be deleted by setting the program counter to the first unwanted step, placing the calculator in the PRGM mode, and then actuating the DELETE key once for each instruction in the sequence. Each time an instruction is deleted the new instruction moved by the calculator to that step location will be printed unless the printer is turned off.

One or more instructions may be inserted into a program by first setting the program counter to the step location at which the first new instruction is to be placed. The calculator is then placed in the PRGM mode, the INSERT key is actuated, and the desired new instruction is keyed in. The insertion operation is terminated by placing the calculator in the RUN mode or actuating any one of the editing keys except MEMORY or DELETE. The calculator automatically renumbers any branching instructions affected during the insertion operation.

The program storage portion of user read-write memory may be cleared by placing the calculator in the PRGM mode and sequentially actuating the MEMORY and DELETE keys. This operation fills the program area with NOP instructions, which designate no operation. An NOP key is available on the keyboard for allowing the user to enter NOP instructions in his program. This arrangement is desirable, for example, in cases wherein the user wishes to presently reserve a step location for possible subsequent entry of an executable instruction.

Instructions forming an alphanumeric message to be printed may also be edited using the various keys just described. The only difference is that the calculator must first be placed in the ALPHA mode of operation, as described in the section above entitled PRINTER CONTROL. One exception is that the calculator must not be in the ALPHA mode when the user is attempting to delete alphanumeric instructions. Otherwise, actuation of the DELETE key will enter the alpha character O.

The magnetic tape cassette unit 12 built into the calculator allows the user to make permanent records on an external magnetic tape cartridge of his programs and data blocks. Each such program or data block may be subsequently read back into the calculator memory as often as desired. Five keys, all programmable, for controlling the operation of magnetic tape cassette unit 12 are provided on the left-hand portion of keyboard 10. Their primary functions are labelled LOAD, REWIND, RECORD, LIST, and L. Each external tape cartridge has capacity for about 96,000 program steps or the contents of about 12,000 data storage registers. A RECORD slide located on each tape cartridge may be positioned to prevent accidental erasure of information stored on a cartridge by inhibiting execution of a RECORD instruction.

The magnetic tape cassette unit routinely checks to insure that all the information being loaded into the calculator memory from an external tape cartridge corresponds exactly to the information originally recorded. If an error is detected during a data loading or program loading operation, an attempted reloading is made. If the information cannot be successfully loaded after three such automatic attempts, the loading operation is halted and an error message CHECKSUM ERROR is printed. Typical causes for such an error are badly worn or partially erased tapes or a dirty tape head.

Before programs or data can be recorded onto a blank tape cartridge, the cartridge must be initialized by performing one or more MARK TAPE instructions. Each MARK TAPE instruction records a block of empty files onto one track of the tape. Two tracks are available on each tape cartridge, and each track may be initialized and used for information storage and retrieval independent of the other. A primary track may be used by specifying a positive file number in each tape instruction. A secondary track may similarly be used by specifying a negative file number. A blank area is associated with the beginning of each file to serve as a file separator. A file identifier includes information relating to a particular file such as a file number, a file type, an absolute file size, a current file size, etc. A portion of each tape file called the file body is used for actual program or data storage. The absolute file size specified in the MARK TAPE instruction determines the size of this file body.

Each MARK TAPE instruction, entered by sequentially actuating the BLANK key and the MARK key, initializes one track of a tape cartridge by storing a block of empty files together with appropriate file identifiers. The integer portion of numbers stored in the Z, Y, and X registers specifies, respectively, the size of each file, the number of files in the block, and the number designator for the first file. The size of each file is expressed in program steps. To determine the file size in program steps needed to hold a desired number of data storage registers, the number of data storage registers is merely multiplied by eight.

After the specified number of files has been marked, an extra file is automatically marked, and the tape is positioned in front of the extra file. The extra file is marked to facilitate marking additional files at a later time and hence has no file body. Programs or data may now be stored in each file marked, or more files may be marked beginning with the extra file. Files are marked and designated in numerical order, beginning with file 0 for files marked on the primary track or file -0 for files marked on the secondary track.

The MARK TAPE instruction has the same format for both new and used tape cartridges. However, when marking files on a used tape, it is important to mark over, or erase, all old files. This will prevent unexpected results. Old files may be erased by simply marking new files in sufficient quantity or sufficient size to extend beyond the old files. Or, they may be erased by specifying a negative number of files in any MARK TAPE instruction. For example, if -1 is stored in the Y register at the time a MARK TAPE instruction is executed, a single file will be marked and the remainder of the specified track will automatically be erased.

An IDENTIFY instruction, entered by sequentially actuating the BLANK key and the Indent key, transfers the file identifier information associated with a designated file into the registers of the operational stack. The number of the desired file is stored in the X register prior to execution of the instruction. Following execution of the instruction, a number corresponding to the file type is stored in the T register, the number of steps in use is stored in the Z register, the originally marked file size is stored in the Y register, and, of course, the file number remains stored in the X register. The various file types and their corresponding number designators are shown in Table 4 below.

For the user's convenience, the contents of the four registers of the operational stack together with the alpha labels FILE, TYPE, USED, and MAX are automatically printed when an IDENTIFY instruction is executed from the keyboard.

Execution of a RECORD instruction, entered by actuating the RECORD key, records the contents of the program storage portion of user read-write memory, from a current step location through an END instruction, on a designated tape file. If no END instruction is encountered, the remainder of the program storage portion of user read-write memory is recorded. Before execution of the instruction, the desired beginning step location should be stored in the Y register, and the number of the desired file should be stored in the X register. If the designated file is too small or the tape is protected, the RECORD instruction is cancelled, and an error message is printed.

Execution of a LOAD instruction, entered by actuating the LOAD key, loads programs or data from a desired tape file into the user read-write memory. The file type determines whether programs or data will be loaded. Before execution of a LOAD instruction, the desired beginning step location in memory should be stored in the Y register, and the number of the desired tape file should be stored in the X register. If the file is of the wrong type or there is not enough read-write memory available, the LOAD instruction is cancelled, and an error message is printed.

A LOAD & GO instruction, entered by actuating the LD & GO key, provides a programmable method for automatically loading and executing a specified program. Before execution of the instruction, the beginning step location in memory should be stored in the Y register, and the number of the desired file should be stored in the X register. An extremely long program may be separated into segments, each segment being recorded into a separate tape file. A LOAD & GO instruction may be added to the end of each program segment to automatically call and execute the program segments in succession.

Execution of a RECORD DATA instruction, entered by sequentially actuating the BLANK and RECORD keys, records the content of a block of numbered data storage registers into a specified tape file. Before execution of the instruction, the number of data storage registers to be recorded should be stored in the Z register, the first register number should be stored in the Y register, and the file number should be stored in the X register. If the specified registers have not previously been assigned, if the file is too small or of the wrong type, or if the tape is protected, the RECORD DATA instruction is cancelled, and an error message is printed.

As stated above, the LOAD instruction is used for loading both data and programs into the calculator. The file type determines whether programs or data will be loaded. Before loading data, the starting data storage register number should be stored in the Y register, and the file number should be stored in the X register. The data is loaded, register-by-register, beginning with the starting register. If the file is of the wrong type or if an insufficient number of data storage registers has been assigned, the instruction is cancelled, and an error message is printed.

Execution of a VERIFY instruction, entered by sequential actuation of the BLANK and VERIFY keys, compares the information recorded on a tape file with the program or data presently stored in the calculator memory. To verify a program file, the starting step location should be stored in the Y register and the file number be stored in the X register. To verify a data file, the number of the data storage register should be stored in the Y register and the file number should be stored in the X register. The VERIFY instruction is most easily executed directly after a loading or recording operation, since the proper numbers are already stored in the X and Y registers. If the information in the file is not identical to that stored in the user read-write memory, one of the error messages VERIFY FAILED or CHECKSUM ERROR is printed. Neither of these two errors will cause program execution to halt when flag 6 is set. In that case, program flag 5 is automatically set by either error.

A RECORD SECURED instruction, entered by sequentially actuating the CALL and RECORD keys, provides a method for recording private programming on tape. Execution of the instruction records a program into a specified file, like the RECORD PROGRAM instruction, except that the file type is designated as type 1. Before execution of the instruction, the starting step location should be stored in the Y register, and the number of the desired file should be stored in the X register. Execution of the RECORD SECURED instruction does not affect the contents of memory. A secured program can be loaded back into the calculator just as any other program and then executed in the normal manner. However, once a secured program has been loaded into the calculator, any attempt to list, record, or edit the program will result in the error message SECURED MEMORY being printed. When a secured program has been loaded into the calculator memory, all other programs stored in the memory are automatically secured. Data storage registers, however, are not affected. The secured memory may be cleared by erasing the memory or by turning the calculator off.

An AUTOSTART mode of calculator operation is provided to automatically load a program stored in tape file 0 into the calculator memory and initiate execution of that program, all in response to placing the calculator power switch 22 in the ON position. The AUTOSTART mode of operation is selected by positioning the calculator mode switch located in the lower right-hand corner of the keyboard in the AUTOSTART position. This switch is interrogated by the calculator firmware. If the switch is found to be in the AUTOSTART position, the tape is searched for file 0 and the file type is interrogated. If file 0 is of type 0 or 1, the file is automatically loaded into the calculator memory and execution is initiated at step location 0000. If any errors occur during loading of this file, the AUTOSTART mode is cancelled, an error message is printed, and the calculator is returned to the RUN mode. The AUTOSTART mode is advantageous in that it provides automatic memory definition without intervention on the part of a possibly unskilled user. In addition, it provides automatic resumption of execution of a program after restoration of operating power following, for example, a power blackout.

The group of keys A through O comprises a group of special function keys that may be defined to call and execute functions defined by the user. Each such defined function is, in effect, a subroutine beginning with a label and ending with a RETURN instruction. Blank overlays are provided for this group of keys to allow the user to identify each identified function. Each defined function may be executed from the keyboard by merely actuating the desired key, or it may be called during program execution through use of a GO SUB instruction.

Each special function key is defined by entering the instructions comprising the defined function into the calculator memory. Each defined function includes a label and a RETURN instruction, just as in the case of subroutines as discussed hereinabove. Each defined function may be stored, beginning at any chosen step location, in the user read-write memory. Special functions may be nested to a depth of seven. Before nested functions are called, the END key should be actuated to reset the nesting counter.

Improper data entries, improper key or program instruction syntax, and improper calculations are all indicated to the user through printed error messages. Unlike prior art calculators that employed numeric error notes and required the use of a look-up table to convert a numeric error note to a meaningful description of the error, the error messages printed by the present calculator are in themselves descriptive of the error that is indicated, thus eliminating the need for a user look-up table. ASCII characters corresponding to each possible error message are stored in the calculator memory. Upon detection of an error and selection of a corresponding error number by the ROM execution routines, an error output routine transmits the ASCII characters forming the error message associated with the selected error number to the printer. A list of the possible error notes that may result from various improper calculator operations together with the corresponding sources of error is provided in Table 5 below. An asterisk to the left of an error message indicates that it may be suppressed through use of the calculator flags described hereinabove.

*overflow -- number or result exceeds calculating range.

*SQRT OF NEG #

*division by zero

*log of #--.phi.

*no i/o device -- peripheral I/O unit not connected.

Illegal address -- improper step location or storage register specified.

Illegal argument -- mathematically incorrect function argument specified.

Memory overflow -- program instruction, data storage register assignment, or program or data loaded from tape exceeds available memory.

Label not found

go sub overflow -- more than seven subroutines or special functions nested.

Missing go sub

key not defined -- special function just called is not defined.

Improper syntax

missing for stmt

*checksum error -- unrecognizable information being read from tape.

File too small

*verify failed -- program or data in tape file is not identical to that stored in memory.

*WRONG FILE TYPE

File not found

end of tape -- end of tape or tape break has been detected during execution of a MARK FILE instruction.

Cartridge out -- the magnetic tape cassette unit contains no tape cartridge.

Protected tape -- the cartridge RECORD slide is positioned to prevent MARK and RECORD operations.

Secured memory -- an attempt has been made to list, edit or record a secured program.

Paper out --.ltoreq.0 printer paper supply is exhausted.

By means of a plotter I/O ROM that may be plugged into one of the two peripheral I/O receptacles 18 on the rear panel of the calculator, an X-Y plotter, such as the Hewlett-Packard 9862A, may be interfaced to the calculator. The combination of the calculator and an X-Y plotter provides a system capable of producing hard copy graphic solutions to sophisticated problems. The functions of the plotter are controlled by the calculator through the use of instructions that may be executed from the keyboard or under the program control. The plotter may be used in conventional ways to plot curves representing mathematical functions, to draw histograms or charts, and to draw alphanumeric and special characters. In addition, the plotter/calculator combination may be used as a digitizer to perform functions not previously available in calculator/plotter systems. In the digitizer mode of operation, the calculator/plotter system may be used to digitize lines and figures into scaled coordinate values.

In the digitizer mode of operation, the user may position the plotter pen over various points on the plotter bed by way of calculator keyboard instructions. Once the plotter pen is precisely positioned over the desired point, the plotter transmits the coordinates of that point to the calculator. This information may then be used by the calculator to compute line length, closed area, or other parameters requiring scaled point data.

The plot area, as set by the graph-limit controls on the plotter and a SCALE instruction, is divided into 1000 scaled units in each coordinate direction. For example, a 10-inch square scaled plot has a digitizing resolution of 0.01 inches. The coordinate values resulting from digitizing a point are stored in the registers of the calculator operational stack and are referred to the origin chosen in the SCALE instruction.

The SCALE instruction establishs the full-scale values, in user units, for a given plot area. X.sub.min, X.sub.max, Y.sub.min, and Y.sub.max correspond exactly to the respective horizontal and vertical limits of the plotting area established through adjustment of the graph-limit controls on the plotter. This instruction also establishes the point, on or off the plot area, where the origin of the coordinate system is located.

In preparation for executing the SCALE instruction, the chosen values of X.sub.min, X.sub.max, Y.sub.min, and Y.sub.max should be stored in the T, Z, Y, and X registers, respectively. The SCALE instruction may then be executed by sequentially actuating the CALL, 1, and F keys. The scale values selected by the user will remain in effect until either a new SCALE instruction is executed or the calculator is turned off. It is important to be certain that the values X.sub.min, X.sub.max, Y.sub.min, and Y.sub.max are entered into the proper stack registers. If they are not, the error message ILLEGAL ARGUMENT will be printed. When the calculator is turned on, an automatic value assignment is made so that X.sub.min = Y.sub.min = 0 and X.sub.max = Y.sub.max = 9999. These automatic limit values may, of course, be altered by subsequent execution of a SCALE instruction.

The digitizing mode of operation may be selected by executing any one of four pen direction key sequences that include CALL 1 E, CALL 1 J, CALL 1 N, and CALL 1 O. Once the digitizing mode has been selected, it is only necessary to actuate any one of the direction keys E, J, N or O to move the plotter pen up, down, left or right, respectively. Each time one of these direction keys is actuated, the plotter pen moves an incremental distance equal to one user unit in the direction specified. By not releasing a direction key the pen may be moved in multiple increments at an increasing speed to more efficiently position the plotter pen over the desired point.

The digitizing mode of operation may be cancelled by actuating either the M key or the RUN STOP key. At this time the coordinate values of the current pen position are entered by the calculator/plotter system into the X and Y registers. In the event the digitizing mode was selected under program control, actuation of the M key restarts the program. Actuation of the RUN STOP key halts execution of the program.

An EXIT instruction, entered by sequentially actuating the CALL, 1, and M keys, enters the coordinate values of the current pen position into the X and Y registers. This instruction is independent of the digitizing mode of operation but is useful whenever the current X and Y coordinates of the pen position are needed for reference.

The digitizer mode of operation may be understood in detail with reference to the flow charts of FIGS. 74O-Q and the corresponding portions of the firmware listing. The main routine of FIG. 74O has five entry points, called by keys E, J, M, N, and O. These entry points build the equivalent key code for future reference and serve to initialize various pointers. In the event the routine is entered by the M key (EXIT instruction), the routine immediately calculates the X and Y coordinates of the current pen position from information in the plotter registers and returns control of the calculator without altering the status of a flag RSFLG. If entry was via one of the keys E, J, N or O, the plotter pen is lifted, and the operational stack is moved up so that calculations can be done internally in the X register. A routine SETUP is called to set the pen stepping increment to ten plotter absolute units, the initial wait time to about 0.5 seconds, the direction of the step as determined from the key code, and various flags internal to the routine. The SETUP routine then checks for either release of the entry key or a new key actuation. If the key is held down long enough to overcome the 0.5 seconds of wait time then the step increment is added to the current pen position, the wait time is increased to approximately one second, and a count of the number of steps in the chosen direction is started. After 25 steps in the same direction, the step increment is increased to 100 units or 1 percent of the plot area, the pen is moved to a new position, and the loop is continued for as long as the key is held down. If a given step will result in the pen moving out of the plot area, an appropriate boundary coordinate is substituted. When the key is released, the input buffer is cleared, and the routine waits for another direction key actuation. If the next key actuation is the RUN STOP key, the current pen coordinates are calculated and stored in the X and Y registers.

A general I/O ROM may be plugged into one of the receptacles 18 on the rear panel of the calculator to provide an 8-bit parallel, character serial interface for connecting a wide variety of peripheral I/O units to the calculator. This ROM transfers data in a half-duplex fashion and provides buffer storage for each character or byte of data. Although the calculator itself handles only ASCII-coded information, the general I/O ROM can transfer data in any 8-bit binary code. These codes are then converted to ASCII code by means of a conversion program.

Several instructions that may be executed either from the calculator keyboard or under program control are associated with the general I/O ROM. These instructions comprise routines and subroutines stored within the general I/O ROM itself and may be understood in detail with reference to pages 187-220 of the calculator firmware listing. The reader may also wish to refer to FIGS. 4, 20-23, and 50-53 together with their associated detailed descriptions hereinabove as an aid to understanding the cooperative relationship between the instructions associated with the general I/O ROM and the remainder of the calculator hardware. Each optional plug-in I/O ROM that may be plugged into the rear panel of the calculator is associated with a separate numeric select code that must be specified in each I/O instruction relating to that I/O ROM. The select code associated with the general I/O ROM is 2. This select code may be altered by those persons skilled in the art.

A DATA instruction, entered into the calculator by sequential actuation of the CALL, 2 and O keys, is employed for selecting either positive true or negative true logic for the I/O data lines. This selection is made by appropriately setting the sign of a number stored in the X register prior to execution of the DATA instruction. Negative true logic is automatically selected when the calculator is turned on.

A FLAG instruction, entered, into the calculator by sequential actuation of the CALL, 2, and N keys, is employed for setting the logic level and handshake mode for the calculator FLG line. A handshake control line ECH may be disabled by entering zero in the X register and executing the FLAG instruction. Similarly, the ECH line may be enabled by placing the number one in the X register and executing the FLAG instruction. Line ECH is automatically disabled when the calculator is turned on. The logic level of the FLG line is set by the sign of the number entered into the X register prior to execution of the FLAG instruction. Negative true logic is automatically selected when the calculator is turned on.

A WRITE instruction, entered into the calculator by sequential actuation of the CALL, 2, and C keys, is employed for transmitting the sign, digits, and decimal point of the number currently stored in the X register to the peripheral I/O unit. The number appears right justified in a field set by the current number format of the calculator. Carriage return and line feed characters are automatically transmitted following the number.

A WRITE X, entered into the calculator by sequential actuation of the CALL, 2, and A keys, performs the same function as the WRITE instruction except that transmission of the carriage return and line feed characters is suppressed.

The carriage return and line feed characters together with a space are employed as delimiters in connection with WRITE instructions. The space characters are used to fill the data field, and the carriage return and line feed characters are used to terminate the data field.

A FIELD instruction, entered into the calculator by sequential actuation of the CALL, and D keys, is employed to set the data field width in effect for WRITE and WRITE X instructions. This data field width is automatically set to sixteen characters when the calculator is turned on. A field width of 1 through 127 characters may be selected by entering the field width into the X register and executing the FIELD instruction. If the number transmitted by a WRITE or WRITE X instruction is too large to be accommodated within the designated field, a field of $ characters is transmitted.

A WRITE ALPHA instruction, entered into the calculator by actuating the CALL key followed by the 2 key followed by the CALL key followed by desired character keys followed by the CALL key, is employed to select an I/O ALPHA mode similar to the ALPHA mode that may be selected when the calculator is operating alone. The ASCII equivalents of the characters specified in the WRITE ALPHA instruction are transmiteed to the peripheral I/O unit.

A READ X instruction, entered into the calculator by sequential actuation of the CALL, 2, and B keys, is employed to input a number from the peripheral I/O unit to the X register. The number can appear in a free field format or with delimiters specified in a DELIM instruction.

A DELIM instruction entered into the calculator by sequential actuation of the CALL, 2, and E keys, allows the user to specify any three ASCII characters as delimiters associated with data input to the calculator via the READ X instruction. The specified delimiters, labelled 1 through 3, must be placed in the X, Y, and Z registers, respectively. When less than three delimiters are specified, the unused stack registers must be filled with zeros. Delimiter 1 performs the additional function of setting program flag 4. Prior art calculators have had very limited data input capabilities because of the restriction of fixed delimiters. By allowing the user to specify delimiters, considerably more flexibility and control over numeric data input is obtained. Since recognition by the calculator of delimiter 1 sets program flag 4, the user may input blocks of data of unknown length by simply separating the blocks with that delimiter. This avoids, for instance, delays in calculation while waiting for data that is not available.

A WBYTE instruction, entered into the calculator by sequential actuation of the CALL, 2, and F keys, is employed to output the 8-bit binary equivalent of an integer number stored in the X register. The integer number must lie between 0 and 255.

An RBYTE instruction, entered into the calculator by sequential actuation of the CALL, 2, and F keys, is employed to input one 8-bit binary character from a peripheral I/O unit and place its decimal equivalent in the X register.

An AND instruction, entered into the calculator by sequential actuation of the CALL, 2, and H keys, is employed to combine the 8-bit binary equivalent of the numbers in the X and Y registers by performing a logical AND operation. The result is converted to decimal form and is placed in the X register.

An OR instruction, entered into the calculator by sequential actuation of the CALL, 2, and I keys, is employed to combine the 8-bit binary equivalent of the numbers in the X and Y registers by performing a logical OR operation. The result is converted to decimal form and is placed in the X register.

A ROTATE instruction, entered into the calculator by sequential actuation of the CALL, 2, and J keys, is employed to rotate the bits of the 8-bit binary equivalent of the number stored in the X register one place to the right. The result is placed in the X register in decimal form.

A DUMP PROGRAM instruction, entered into the calculator by sequential actuation of the CALL, 2, and M keys, outputs program instructions stored in the program portion of the user read-write memory, starting at the step location indicated by the number stored in the X register and ending when an END instruction is encountered.

A LOAD PROGRAM instruction, entered into the calculator by sequential actuation of the CALL, 2 and L keys, is employed to input program instructions from a peripheral I/O unit to the calculator memory, starting at the step location indicated by the number stored in the X register and continuing until an END instruction is encountered. When the LOAD PROGRAM instruction is executed under program control, the calculator automatically continues execution of that program at the next instruction following the LOAD PROGRAM instruction after the new program has been loaded from the peripheral I/O unit.

A LIST instruction, entered into the calculator by sequential actuation of the CALL, 2, and K keys, is employed to output a program listing starting at the step location indicated by the current location of the program counter and ending when an END instruction is encountered. The listing is formatted into four 50-step columns for use with a page-width line printer. This listing halts every 200 steps to allow the operator to insert more printer paper. The listing may then be continued by actuating the K key. The LIST instruction may only be executed from the keyboard and is not programmable.

A REMOTE mode of operation may be selected by entering .+-.2 into the X register followed by sequential actuation of the CALL, 2, and N keys. This mode is useful because it causes the calculator to wait at each I/O instruction for the peripheral I/O unit to begin the instructed operation. Normally, the calculator issues an I/O instruction and then waits for the peripheral I/O unit to signal completion of the operation. Completion of the operation is indicated by the peripheral I/O unit pulling the FLG line low. This means that the peripheral I/O unit is always waiting for instructions from the calculator. The REMOTE mode is useful in a system involving the use of the one calculator for gathering data and another calculator for performing calculations involving the data. The calculators may be connected via general I/O ROMs and the data gathering calculator would be set to the REMOTE mode each time it is ready to transfer data to the other calculator. This "two-processor" arrangement, with one calculator controlling the I/O operations between them, offers an extremely fast and flexible system for gathering and reducing data.