Aluminum Arsenide Eutectic Gallium Arsenide Solar Cell

The field of the invention is in the solar cell art.

P doped aluminum arsenide deposition by liquid phase epitaxial growth on a gallium arsenide substrate to provide solar cells and photocathodes are known. Such devices are disclosed by J. M. Woodall in U.S. Pat. No. 3,675,026, and M. C. Rowland et al. in U.S. Pat. No. 3,932,883. Crystal growing techniques and structures suitable for solar cells are well known. Chou H. Li in U.S. Pat. Nos. 3,500,135 and 3,765,956 teaches this art. Vertical junction solar cells are known. J. F. Wise and D. L. Kendall et al. teach these structures in U.S. Pat. Nos. 3,690,953 and 3,969,746 respectively.

An improved gallium arsenide solar cell is disclosed that has a much lower series resistance and higher conversion efficiency than prior art devices. By improving the efficiency of gallium arsenide cells to make their usage more practical, the natural resistance to damage effects from particulate radiation damage to gallium arsenide over the prior art silicon devices may now be utilized. A unique feature of the invention is the creation of horizontal junctions on plural vertical junction substrate material with an aluminum arsenide-gallium arsenide P+ layer providing a common connection to all P regions in the gallium arsenide cell body, which itself contains many closely spaced PN junctions (typically with a micrometer separation), which are perpendicular to the top and bottom surfaces of the cell body. An N+ layer formed by ion implantation on the bottom of the cell provides a common connection to all N regions within the cell body.

FIG. 1 is a schematic diagram of a section of a typical prior art gallium arsenide crystal with vertical PN junctions;

FIG. 2 is a schematic diagram of a typical section of an embodiment of the invention; and

FIG. 3 is a representative band gap diagram, at zero bias, through the cell at the location shown in FIG. 2.

FIG. 1 illustrates schematically a section of a typical prior art crystal wafer grown using conventional techniques to form an ingot of eutectic gallium arsenide with a plurality of photovoltaic PN junctions formed parallel to the crystal growth axis 11. Wafers are conventionally cut perpendicular to the crystal growth axis and conventionally prepared for liquid phase epitaxial deposition of P doped GaAs and Al.sub.x AsGa.sub.l-x. Suitable P dopants are zinc or beryllium. An Al.sub.x AsGa.sub.1-x layer is then grown at the top of the crystal wafer to an optimum thickness relative to usage with sunlight in space or terrestrial use. (Typically 0.2 micrometer for space and 2 to 3 times as thick for terrestrial use, to reduce series resistance.) In the embodiment of FIG. 2, which is fabricated from a conventional plural vertical junction eutectic GaAs wafer as just described, the Al.sub.x AsGa.sub.1-x layer 21 provides a surface for top contact metallization 22. The Al.sub.x AsGa.sub.1-x layer 21 is frequently referred to as the cell window.

Prior to growth of layer 21, however, a P+ layer 29 is fabricated by conventional liquid phase epitaxial growth of P doped GaAs on the top upper surface 12 of said conventional plural vertical PN junction substrate, followed by liquid phase epitaxial deposition of the Al.sub.x AsGa.sub.1-x layer 21. As a result horizontal P.sup.+ N junctions 23, 24, 25, etc., are formed with the N type vertical regions 26, 27, 28, etc.

The chemical composition of layer 21 is represented by Al.sub.x AsGa.sub.1-x where "x" is the fractional amount of aluminum occupying lattice sites that would otherwise be occupied by gallium. A typical suitable value for "x" resulting from the liquid phase epitaxial growth is 0.98, (i.e., 98% Al; 2% Ga). The P+ deposited region 29 is substantially depleted of aluminum, i.e., x is approximately zero in this region.

After growing the P doped gallium arsenide and aluminum arsenide layers forming the P+ layer 29 and the P+ layer 21, respectively, on the substrate, an N+ layer 30 is conventionally ion implanted at the bottom of the cell substrate with a conventional N type dopant such as silicon or tellurium. After ion implantation the bottom of the wafer is pulse electron beam annealed. Then conventional electrical contacts 22 and 31, such as tin-gold, zinc-gold or inidium-gold, are deposited by conventional metallization on the upper operative surface of the cell. Contact to the cell bottom is accomplished by using germanium-gold with a nickel overlay in the conventional manner. The top contact metallization is comprised of an ohmic bus with grid fingers to allow passage of light into the cell top surface and collection of charge carriers. The bottom contact metallization covers the entire backside. To complete an operating embodiment, an antireflective coating such as Ta.sub.2 O.sub.3, SiO.sub.2, or TiO.sub.x is applied to the top surface of the cell and the cell top is then conventionally covered with a conventional glass coverslip made of a material such as fused quartz or borosilicate.

Representative typical embodiments of the invention have a total cell thickness of approximately 250 micrometers. The thickness of the N+ layer is approximately 1 micrometer. A typical value for the ion beam dose to implant the N impurity and form the N+ layer is approximately 10.sup.15 ions per square centimeter. Typical suitable values of current density and time length of pulse for the pulse electron beam anneal is a fluence of approximately 0.2 calories per square centimeter with a beam energy of approximately 40 kilo electron volts and a pulse width of approximately one microsecond.

The foregoing parameters will provide suitable structures having band gap characteristics as typically illustrated in FIG. 3, taken along line 32 of FIG. 2 and at zero bias.