Information Retrieval System for Providing Downstream Loading of Remote Data and Processing Control Thereof

This application is an improvement on the system described in the commonly owned co-pending U.S. patent application entitled "Information Retrieval System Having Selectable Purpose Variable Function Terminal," filed Sept. 10, 1975, bearing U.S. Ser. No. 611,927, the contents of which are hereby specifically incorporated by reference in their entirety, as well as being an improvement on the system described in the commonly owned copending U.S. patent application entitled "Improved Row Grabbing System," filed Sept. 10, 1975, bearing U.S. Ser. No. 611,843, and on the row grabbing system described in the commonly owned previously issued U.S. Pat. No. 3,889,054, issued June 10, 1975.

1. Field of the Invention

The present invention relates to information retrieval systems in which continuously transmitted information from a remote data base may be selectively grabbed or captured for obtaining the processing control instructions for a microprocessor controlled terminal as well as capturing selected data to be processed and displayed by that terminal with the selected purpose or processing control of the terminal being locally variable.

2. Description of the Prior Art

Computers and other types of programmable devices are well known in the data processing art and in the communications field in general. These prior art systems function in accordance with a stored set of instructions or programs or a series of programs, such as in a typical IBM Operating system or OS. In such systems, however, the programming is accomplished at the central computer whose function may be varied only by variation in the program which is loaded thereinto. Due to the high cost of computers, the art of time sharing has developed, which, through teleprocessing, has enabled a plurality of users to share a common centrally located computer by use of remote input/output devices. However, such time sharing still requires the users to be bound by the particular program which is stored in the central computer so that the plurality of users essentially share the same program functions which process their individual data inputs in accordance therewith. There are some prior art systems which are capable of obtaining a remotely stored program, however, no such systems are known to the inventors, other than that described in the commonly owned co-pending U.S. pat. application Ser. No. 611,927, filed Sept. 10, 1975, entitled "Information Retrieval System Having Selectable Purpose Variable Function Terminal," which are capable of both receiving selectable continuously transmitted frame or row grabbable video displayable data as well as continuously transmitted control instructions for processing such data over a common television distribution system normally used for such data, nor are any such systems known to the inventors in which remote local terminals connected to a remote central data source in such a common television distribution system can function in accordance with any one of a plurality of locally selected purposes or functions to provide a selected purpose variable function terminal in which the selected purpose or function may be locally varied electronically without the user having to actually reprogram his terminal. Moreover, there are no such terminals known to the inventors in which a video communication system which enables the video display of information, such as over a CATV system, may also be converted to such a local selectable purpose variable function terminal in which desired control programs may be electronically called up or retrieved from a remote central processor for local storage and operation in accordance therewith wherein both the data and the program information are transmitted as pseudo video scan lines, each containing a complete self-contained packet of information. Such a video communication system in which individual frames may be grabbed for video display thereof and updated on a row-by-row basis is described in the commonly owned previously issued U.S. Pat. No. 3,889,054, issued June 10, 1975, in which pseudo video digital data scan lines are transmitted continuously from a central data source in a one way communication system. Such a system may be controlled locally by a microcomputer as described in the co-pending U.S. Pat. application entitled "Improved Row Grabbing System," filed Sept. 10, 1975, bearing U.S. Ser. No. 611,843. As will be described herein, such video communication systems, as those employing a local microcomputer, have not been utilized to full advantage as a selectable purpose variable function terminal in which processing of data in accordance with any desired selected function, which may be varied, can be accomplished as well as the display of video data therefrom. The present invention is an improvement on such systems, as well as on the aforementioned U.S. Pat. application Ser. No. 611,927, so as to provide such an improved selectable purpose variable function terminal.

An information retrieval system comprising a remote information source for remotely continuously transmitting information in a common predetermined format over a common predetermined video signal transmission media in which the information comprises continuously transmitted video displayable data and a plurality of continuously transmitted different sets of control instructions for a local selectable purpose variable function terminal operatively connected to the remote information source via the common video signal transmission media for selectively receiving the remotely continuously transmitted information is provided. Each of the sets of control instructions corresponds to a different selectable purpose for the terminal with at least one of the purposes corresponding to control of the processing of the continuously transmitted video displayable data for providing a processed video display thereof. The terminal comprises microprocessor or microcomputer means for controlling the operation thereof to process the transmitted video displayable data in accordance therewith with this microprocessor means being operatively connected to the video signal transmission media for receiving the remotely continuously transmitted information. The different sets of control instructions comprise different sets of control instructions for the microprocessor means for varying the operation thereof to vary the type of processing of the transmitted video displayable data by the terminal in accordance therewith. Selection means, such as comprising a keyboard, a comparator means and a buffer storage means, are operatively connected to the microprocessor means for variably selecting the data to be processed for providing the processed display as well as for providing a first selectable purpose for the terminal for controlling the processing of the data in accordance therewith from a plurality of different selectable purposes for the terminal, these selectable purposes being variable. Local storage means, such as a random access memory means and a read only memory means, are provided for selectively retrievably locally storing both the selected remotely transmitted video displayable data and the selected first one of the remotely transmitted selected set of control instructions for the microprocessor means corresponding to the first selected purpose for the terminal. This local storage means is operatively connected to the microcomputer means with at least the selected data storage therein being continuously updateable in response to the remotely continuously transmitted data being updated. Video display means are operatively connected to the microcomputer means for displaying said processed video display. The microcomputer or microprocessor means is operable in accordance with the locally stored remotely transmitted selected first one of the selectable sets of control instructions and selectively enables the processed video display of the selected remotely continuously transmitted updateable video displayable data which is processed in the terminal in accordance with the locally stored remotely transmitted selected first one of the selected set of control instructions for providing the processed video display therefrom on the display means. The selection means enables local storage in the local storage means of a different one of the plurality of remotely transmitted sets of instructions in place of the first one of the locally stored selected remotely transmitted selected sets of instructions in response to selection of a different selected purpose in which instance the microcomputer means differently processes the incoming video displayable data in accordance with the different locally stored set of instructions for the microcomputer means, whereby a local downstream program grabbing and data display means for remotely transmitted information is provided.

The continuously remotely transmitted plurality of different sets of control instructions comprises a first plurality of continuously remotely transmitted different selectable sets of microprocessor processing control instructions for the terminal and a common second set of continuously remotely transmitted control instructions for controlling the loading of any selected one of the first plurality of selectable sets of microprocessor processing control instructions into the local storage means. The local storage means comprises a common third set of stored retrievable control instructions for controlling the loading of the common second set of control instructions into the local s;torage means with this selected one of the loaded first plurality of selectable sets of processing control instructions corresponding to the aforementioned first selectable purpose for the terminal for controlling the processing operation of the selected continuously remotely transmitted video displayable data by the terminal in accordance therewith to provide the processed video display thereof. The selection means enables the loading of the common second set of control instructions and the subsequent loading of the selected one of the first plurality of microprocessor processing control instructions in response to the selection of the selected one of the first plurality of microprocessor processing control instructions. The aforementioned comparator means and buffer storage means are operatively connected to the video signal transmission media for receiving the continuously remotely transmitted information and for controlling the loading of the appropriate portions of this information, whether it be selected control instructions or selected video displayable data, into the local storage means. Both the data and the sets of control instructions are transmitted as pseudo video scan lines, each of which has a television video scan line format and is capable of comprising a complete self-contained packet of digital information sufficient to provide an entire displayable row of video data characters in the instance of data, and a packet of digital information sufficient to provide at least a portion of one of the sets of instructions in the instance of control instructions, each of the pseudo video scan lines preferably having an associated transmission time equivalent to that of a television video scan line. It should be noted that the terms pseudo video scan line and television video scan line as used throughout the specification and claims are being utilized as defined in U.S. Pat. No. 3,889,054. The information retrieval system may function as a row grabbing video display terminal, such as the type described in U.S. Pat. No. 3,889,054, in which the continuously video displayable selectable frame is updated on a displayable video row-by-row basis dependent on the real time data information content of the received pseudo video scan line pertaining to the selected data if the selected set of processing control instructions corresponds to said row grabbing function. Thus, the terminal of the present invention provides an information retrieval system capable of capturing packets or rows of data and/or control program instructions from a continuously transmitting remote data base comprising a plurality of different control programs and different data rows to provide a selectable purpose variable function terminal whose information display as well as the particular type of processing thereof to provide the processed information display can individually be substantially simultaneously varied for each terminal of a plurality of terminals so that every user is not only capable of individually determining what video displayable information is to be received, but also how the particular user terminal which receives this information is to process it, all of which is continuously remotely transmitted over a common television distribution system which would be normally utilized for the video information.

FIG. 1 is a diagrammatic illustration of a typical pseudo video scan line format corresponding to a packet of video displayable data in accordance with the present invention;

FIG. 2 is a diagrammatic illustration similar to FIG. 1 of a typical pseudo video scan line format corresponding to a packet of control instructions in accordance with the present invention;

FIG. 3 is a diagrammatic illustration similar to FIG. 1 of a typical pseudo video scan line corresponding to a packet of a permission message in accordance with the present invention;

FIG. 4 is a logic flow diagram of the preferred hardware bootstrap program for use in the system of the present invention;

FIG. 5 is a logic flow diagram of the preferred software bootstrap program for use in the system of the present invention;

FIG. 6 is a logic flow diagram of the preferred once-only initialization program for use in the system of the present invention;

FIG. 7 is a functional block diagram of the preferred system of the present invention operated in accordance with the logic flow diagrams of FIGS. 4 through 6 for processing remotely transmitted information having the formats illustrated in FIGS. 1 through 3;

FIGS. 8 and 9 comprise a logic schematic diagram of the preferred direct memory access sequencer portion of the system of FIG. 7;

FIG. 10 is a logic schematic diagram of the preferred packet and buffer control portion of the system of FIG. 7 and further illustrates a typical interface portion of the system of FIG. 7; and

FIG. 11 is a logic schematic diagram of the microprocessor clock portion of the system of FIG. 7.

Referring now to the drawings in detail and initially to FIG. 7, the preferred downstream program loading system of the present invention, generally referred to by the reference numeral 300, is shown. As shown and preferred in FIG. 7, and as will be described in greater detail hereinafter, the system 300 preferably includes a conventional display device 330, with the system 300 preferably being capable of operating in the same manner as a row grabbing terminal of the type previously described in commonly owned U.S. Pat. No. 3,889,054 and U.S. Pat. application Ser. No. 611,843, filed Sept. 10, 1975, which descriptions are specifically incorporated by reference herein in their entirety, when the control program which is grabbed corresponds to the functioning of such a row grabbing terminal. In addition, the system 300 is an improvement on the system described in commonly owned U.S. pat. application Ser. No. 611,927, filed Sept. 10, 1975, the contents of which are also specifically incorporated by reference herein in its entirety. For purposes of explanation, we shall describe the system 300 in terms of such a row grabbing terminal receiving its operating or control program from a remote data base, such as a central data base source for a plurality of such terminals, with the row grabbing terminal calling up or grabbing the desired operating or control program therefor. By way of example, we shall describe this call up operation with respect to remote storage of the control program for allowing the row grabbing terminal to operate in the fashion described in the aforementioned patent and patent applications with respect to a row grabbing function although, of course, it should be understood that any other type of operating or control program could be called up or grabbed in the preferred system 300 of the present invention so as to have the row grabbing terminal process data in whatever desired fashion is mandated by the called up or grabbed control program. As will be described in greater detail hereinafter, the downstream program loading system 300 is preferably capable of providing row grabbing information comprising pseudo video scan lines of the type described in the aforementioned patent and patent applications and shown by way of example in FIG. 1, which may be grabbed to provide video displayable data or information which is updateable on a video row-by-row basis as well as also additionally grabbing control programs which are preferably transmitted in essentially the same pseudo video scan line type of format, as shown by way of example in FIG. 2, for data.

Before describing the structure of the system 300, for purposes of explanation, we shall describe the functioning of the system 300 to enable its operation as a downstream program loading system in terms of the downstream loading of a conventional control program for enabling the terminal 300 to function as a row grabbing terminal of the type described in the aforementioned patent and patent applications. Initially referring now to FIG. 1, a diagrammatic illustration of a typical pseudo video scan line 1200 containing a video displayable row of data which is transmitted to and grabbed by such a row grabbing terminal is shown. As shown by way of example, this typical pseudo video scan line 1200 preferably comprises 38 characters with the 38th character preferably being the check sum for insuring the integrity of the transmission. The first three characters, by way of example, are preferably assigned to the frame or page number for the displayable row. The desired page is preferably conventionally selected on the keyboard 324 (FIG. 7) so that the appropriate selected page is subsequently displayed on the display device, such as a conventional CRT 330 associated with the row grabbing terminal 300. The 4th character is preferably assigned to the row number which can preferably be any number from zero to 31, by way of example, which number defines the position of the transmitted data or text on the CRT 330 screen, the least significant bit preferably implying a position to either the left or the right of the display screen 330 and the balance of the information contained in this row number 4th character implying which of the lines (displayable rows) 1 through 16 of text display in the 16 line preferred display the specific row is. The 5th character of the transmitted row or pseudo video scan line 1200 is preferably the special character which, in the instance when the pseudo video scan line comprises a video displayable row of data, implies that the informatiom is a video row as well as the specific details associated with the type of row which is being transmitted. For example, these details may comprise whether the row is a 32 or 64 character row if the terminal is, as previously described in the aforementioned patent and patent applications, capable of displaying both 32 and 64 character rows. Characters 6 through 37 of the 38 character pseudo video scan line 1200 preferably contain the data or text associated with the video displayable row which is to be displayed on the CRT 330 with the 38th character, as previously mentioned, preferably containing the check sum. Thus, as described in even greater detail in the aforementioned patent and patent applications, this is the preferred information format of a typical normal video packet or pseudo video scan line of information which is transmitted from the remote data base downstream through the conventional coaxial cable link, such as used in a CATV system, through conventional television distribution equipment, to the row grabbing terminal 300.

Preferably, a "row" of a control program which may be called up from the remote data base is transmitted in the same pseudo video scan line format as a video displayable row of data down the coaxial cable from the remote data base to the row grabbing terminal 300, the terminal 300 identifying the type of pseudo video scan line or row by the special character transmitted therewith, as will be described in greater detail hereinafter. FIG. 2 diagrammatically illustrates such a typical preferred program "row" format which is transmitted down the coaxial cable. Preferably, such a typical program "row" 1202 also comprises 38 characters so as to be consistent in format with the aforementioned conventional pseudo video scan line 1200 or video displayable row of data. The 38th character preferably comprises the check sum for insuring the integrity of the transmission. The first 3 characters preferably comprise the program "page" number although, as will be described in greater detail hereinafter, these 3 characters or page number preferably having no significance, however, for the "software bootstrap," which will be described in greater detail herainafter. Suffice it to say at this time that the "software bootstrap" is preferably common for any downstream transmitted control program which is to be loaded into the terminal 300 and, as will be described in greater detail hereinafter, is preferably the "software bootstrap" effectively being the overriding controller which determines which specific remotely transmitted control program is to be loaded into the row grabbing terminal 300. When the program "row" contains control program information, such as a set of program instructions, these first 3 characters which preferably define the program page number, are preferably utilized to determine if the particular program packet is meant for that specific row grabbing terminal 300, a plurality of such terminals preferably substantially simultaneously receiving all of said continuously transmitted program rows while only grabbing those packets or program rows which are identified as belonging to the specific terminal 300 which requests them in the preferred system of the present invention. The 4th character, which was previously identified as belonging to the row number of a video displayable row of data, preferably defines program rows zero to 29, by way of example, for each program page, thereby providing 30 packets for a transmitted program page of program information, by way of example. The aforementioned "software bootstrap" is preferably contained in one program page of transmitted information; that is, in 30 transmitted rows or packets, and preferably, by way of example, comprises 720 program words, 24 program words, by way of example, preferably being contained in each packet of program information in the system of the present invention. The transmitted control or main program which is selectively received by the row grabbing terminal 300 is preferably contained in 7 consecutive program pages, the first program page of this main program preferably being a onceonly initialization program, to be described in greater detail hereinafter, of 720 words and the last 6 program pages of the 7 consecutively numbered program pages preferably containing the system control program which preferably comprises 4,096 program words to the total amount of 4,320 possible program words which could be contained in 6 program pages. Thus, the last few transmitted program rows may be excluded in receiving the system control or operation program by the terminal 300, as will be described in greater detail hereinafter. The 5th character of the program row 1202, as with a data row 1200, preferably defines a special character and, preferably, by way of example, if this character is a 32, it implies that the transmitted program packet is the aforementioned software bootstrap whereas if this character is a 33, by way of example, it implies that the transmitted program packet comprises information associated with the main or control program. Characters 6 through 37 of program row 1202 preferably contain the twenty-four 8 bit program words, by way of example, which are preferably encoded as thirty-two 6 bit characters. This aformentioned encoding is accomplished because the video displayable characters for a normal video displayable row of data 1200 which are characters 6 through 37, as previously mentioned, are preferably each 6 bit characters, whereas each of the program words of a program row or packet are each preferably 8 bit words. The 38th character, as previously mentioned, is the check sum character.

As will be described in greater detail hereinafter, both the software bootstrap and the main or control program packets are preferably capatured by the system 300 by recognition of the aforementioned special character in the 5th character position of program row 1202, recognition of the character 32 relating to capture of the software bootstrap and recognition of character 33 relating capture of the main program packets, by way of example. Preferably, there is only one software bootstrap remotely stored in the data base since this software bootstrap, as previously mentioned, in common to all programs which are to be captured by the row grabbing terminal 300. Since there is only one software boostrap preferably stored in the data base, each of the program packets associated with this software bootstrap can preferably be placed in position in the program memory 332 (FIG. 7) of the row grabbing terminal 300 unambiguously by its respective associated row number alone, the location of each packet associated with the software bootstrap preferably being uniquely and readily defined by the row number associated with a particular packet. Accordingly, as previously mentioned, since the software bootstrap contains row numbers zero through 29, by way of example, each of these 30 packets can be uniquely stored in the program memory 332 in locations identified by these 30 associated row numbers zero through 29. With respect to the main or control program for the terminal 300, however, there preferably are several different selectable main programs remotely stored on the central data base simultaneously. Thus, the terminal 300 must be able to identify which of the several different selectable main or control programs are being provided to it so that it can insure that only the program packets associated with the specific main or control program which is being called up by that terminal 300 are stored in the program memory 332 of the terminal 300.

In order to accomplish this, the terminal 300 identifies the correct or authorized selected main or control program from a permission message, which is preferably directed to the terminal 300, which message, by way of example, relates to groups zero through 127, of the conventional row grabbing system of the type described in the aforementioned patent which, by way of example, normally preferably has display groups zero through 1,000, to provide permission or authorization for receipt of selected downstream programs by the terminal 300. Each of the permission packets of information, which there may preferably normally be 16 such packets, by way of example, with 8 of these 16 permission packets preferably being associated with groups zero through 1,000 and with the other 8 of these 16 packets preferably being associated with pages zero through 1,000 of those groups, is associated with a particular set of 128 groups or pages. A typical such permission packet is diagrammatically illustrated in FIG. 3 and shall now be described. The permission "row" 1204, like the aforementioned program "row" 1202, is preferably transmitted downstream from the remote data base via the cable link in the same pseudo video scan line format as a video displayable row of data 1200. Thus, a typical permission "row"]1204 preferably comprises 38 characters which, as previously mentioned, is preferred for any of the information packets, such as data or program, which are preferably transmitted in the system 300 of the present invention. The first 3 characters of permission row 1204 preferably comprise a unique terminal number or tag so as to identify the specific terminal 300 which is to receive this permission packet. The 4th character position, which is the aforementioned row number location, preferably contains the character 32, by way of example, when the permission packet 1204 is associated with the aforementioned groups zero through 127, this number, of course, normally being different for other groups than the aforementioned groups zero through 127. The 5th character position, which is the aforementioned special character is, preferably normally a zero, by way of example, for the permission packet 1204. The 6th character position is preferably utilized for special permission bits, such as those bits associated with a particular mode of operation of the terminal 300. Characters 7 through 28 preferably comprise 128 possible permission bits, with a different permission bit preferably being associated with each of the 128 different groups comprising the aforementioned groups zero through 127. Characters 29 through 31 of permission row 1204 preferably comprise the page number associated with the first page of the specific main or control program which is to be grabbed by that specific terminal 300 and are used by the terminal to identify which of the several different main or control programs being transmitted downstream from the remote data base is the correct one to be grabbed. Characters 32 through 37 are preferably utilized for other types of special permission messages defining, for example, the types of display the screen 330 is capable of providing, etc. The 38th character, as in the instance of a data row 1200 or a program row 1202, preferably comprises the check sum character.

After the terminal 300 receives its designated permission message of the type illustrated in FIG. 3, the terminal 300 is then ready to receive a specific main or control program from the remote data base. Assuming that the software bootstrap has already been loaded into the program memory 322, as will be described in greater detail hereinafter, the terminal 300 will boot or load in the selected main or control program, as determined by this specific permission message, particularly characters 29 through 31, preferably one program page, that is 720 program words, at a time, starting from the initial program page number which is defined in these characters 29 through 31 of the permission packet 1204. Terminal 300 then preferably continues to load the next 6 consecutively numbered program pages after capturing the first program page defined in the aforementioned characters 29 through 31 of the permission packet for a total of 7 consecutively numbered program pages, as previously described with reference to FIG. 2, the 7 consecutively numbered program pages preferably containing the entire main or control program. The first program page which is loaded into the program memory 332 of the terminal 300 of the selected main or control program preferably comprises a special portion of this main or control program which special portion is the aforementioned once-only initialization program comprising 720 program words. This once-only initialization program is preferably utilized only once at the start of the downstream program loading operation by the terminal 300 in order to reset the information stored in the program memory 332 of the terminal 300, as well as to reset the various other portions of the terminal 300 necessary for initializing the terminal 300 so that it is in condition to operate in accordance with the selected main program after it has been retrieved or downstream loaded into the program memory 332. This first loaded program page is then preferably written over in memory 332 by subsequently provided data information since this first program page is preferably loaded into the portion of the memory 332 which is normally assigned to such data as opposed to the portion which is preferably specifically assigned to storage of the main or control program for the terminal 300. Preferably, this initialization portion of the main or control program is written into, by way of example, memory 332 locations D.phi..phi. through FCF, which defines their locations in conventional hexadecimal notation. The memory itself, by way of example, preferably comprises 8,000 program words, with the aforementioned hexadecimal location comprising 720 of those 8,000 program words. The next 6 consecutively numbered program pages, as previously mentioned, preferably comprise the system control program which, as also previously mentioned, preferably comprises 4,096 program words. This system control program is preferably written into the memory 332 locations assigned to storage of the terminal operating or control program, such as locations 8000 through 8FFF, by way of example, which define these locations in conventional hexadecimal notation, occupying 4.096 program words of the aforementioned 8,000 word total.

The aforementioned software bootstrap which will be described in greater detail hereinafter, is preferably initially loaded into the program memory 332 prior to the loading of the aforementioned main or control program as well as prior to receipt of the relevant permission packet 1204, and is preferably written into the memory 332 locations associated with data storage, the software bootstrap preferably being over written by data as is the once-only initialization program contained in the first program page of the main program. Preferably, by way of example, this software bootstrap may be loaded into memory locations 800 through ACF which define these locations in conventional hexadecimal notation, occupying 720 program words of the aforementioned 8,000 word total. As was also previously mentioned, the last word or character of the aforementioned 720 program words associated with the software bootstrap, the last word or character of the first program page once-only initialization portion of the program and the last word or character of the balance of the main or control program contained in the 6 consecutively numbered program pages, preferably each comprises a check sum which, as will be described in greater detail hereinafter, is preferably, by way of example, an exclusive OR of all of the preceding words associated with that particular software bootstrap, first program page once-only initialization portion of the program and remaining 6 consecutively numbered program pages of the main program, respectively, and is conventionally utilized to check the correct loading of each of these program portions, as will be described in greater detail hereinafter.

Referring now to FIG. 4, a logic flow diagram of the preferred hardware bootstrap program which is preferably permanently stored in the read only memory portion 334 (FIG. 7) of the terminal 300, to be described in greater detail hereinafter, is shown. This hardware bootstrap is preferably automatically put into operation by microprocessor 310 (FIG. 7) with turn on of the terminal 300. The specific purpose of the hardware bootstrap program illustrated in FIG. 4 is to enable the loading of the aforementioned software bootstrap program which will be described in greater detail with reference to FIG. 5. As shown and preferred in FIG. 4, upon initial operation of the microprocessor 310 of terminal 300 under control of the hardware boostrap program, initialization of those portions of the terminal 300 which are required for the loading of the software boostrap to be described with reference to FIG. 5 occurs. This functional step in the logic flow diagram of FIG. 4 is identified by referenced numeral 100. After the appropriate portions of the terminal 300 have been reset, microprocessor 310 under control of the hardware bootstrap then preferably causes the terminal 300 to be set up to capture all software bootstrap packets 1202, this control information comprising specific instructions (signals) to the various portions of the terminal 300 to enable the capture of the software bootstrap packets, the terminal 300 recognizing and capturing the software bootstrap packets whose format is of the type previously described with reference to FIG. 2 in response to recognition of special character 32, as previously mentioned. This functional portion of the logic flow diagram is identified by reference numeral 112. As further shown and preferred in FIG. 4, the terminal logic under control of microprocessor 310 must then make a determination whether or not any packet of any type has been captured, this function being represented by reference numeral 114. If no packet of any type has been captured, then as illustrated in FIG. 4, an iterative control loop is formed until a packet is captured. After this occurs, the terminal logic must then determine whether or not the captured packet is a software bootstrap packet, which function is identified (FIG. 4) by decision symbol 116. If the captured packet is not a software bootstrap packet, then, once again, another iterative control loop is formed until a captured packet satisfies the logic that it is a software bootstrap packet as identified to the logic by the presence of special character 32 in the 5th character position of the captured program "row" 1202. When the logic has determined that a software bootstrap packet has been captured, it then determines whether or not this particular captured software bootstrap packet, as identified by its assigned row number, of the aforementioned 30 packets which comprise the complete software bootstrap program, has previously been captured. This function is represented by decision symbol 118 in FIG. 4. This particular aforementioned software bootstrap packet may have been previously captured due to an error in transmission and, since the software bootstrap packets are preferably continuously retransmitted in the preferred system on the present invention, it is possible that if one or more of such software bootstrap packets is skipped, it can be picked up on the next cycle of transmission of such software bootstrap packets and, similarly, the terminal 300 may have previously picked up and loaded that particular software bootstrap packet on one of the previous cycles of transmission of such software bootstrap packets before the complete software bootstrap has been loaded. If such a software bootstrap packet has already been captured then, once again, preferably an iterative control loop is formed until a software bootstrap packet is captured by the logic which has not previously been captured. When this occurs, that is when a software bootstrap packet is captured which has not been previously captured, then the terminal 300 packs or loads the text of this software bootstrap packet, which is preferably contained in characters 6 through 37 of the software bootstrap packet 1202, as previously discussed with reference to FIG. 2, into the proper position in the aforementioned program memory portion 332 in accordance with the particular row number of the 30 possible row numbers associated with a single software bootstrap packet 1202, which row number is contained in the 4th character position. As was also previously mentioned, this software bootstrap packet is preferably written into a normally assigned data area of the memory 332 for subsequent overwriting by data. This function is represented by symbol 120 in FIG. 4. When the aforementioned particular software bootstrap packet has been unpacked or loaded into the appropriate memory 332 area, the logic then determines whether or not a total of 720 program words, as previously mentioned, define the entire or complete software bootstrap program. This function is represented by symbol 122. If the total of 720 program words has not been captured, then, once again, another iterative control loop is formed and the microprocessor 310 under control of the hardware bootstrap continues to control the logic until such time as the total 720 program words of the software bootstrap program have been captured. When these 720 program words have been captured, microprocessor 310 then controls the logic in accordance with the software bootstrap program illustrated, by way of example, in the logic flow diagram of FIG. 5, to be described in greater detail hereinafter. A typical program listing of the aforementioned hardware bootstrap program is provided below. The program is preferably written, by way of example, in M6800 assembler language, which is a conventional Motorola assembler language, for use by a conventional Motorola M6800 computer, such as microprocessor 310, the program listing using the conventional symbols which are defined in the Motorola M6800 assembler programming manual. ##SPC1##

Referring now to FIG. 5, as previously mentioned, a logic flow diagram of the preferred software bootstrap program which was previously loaded into the memory 332 in a data portion thereof by the microprocessor 310 under control of the hardware bootstrap program previously described with reference to FIG. 4, is shown. It should be noted that the symbol EOR utilized in FIG. 5 refers to the aforementioned exclusive OR function relating to the check sum. The system logic now determined whether or not the software bootstrap has been correctly loaded by looking at the check sum thereof which, as previously mentioned, is an exclusive OR (EOR) of all of the preceding words contained in the software bootstrap program. Preferably, by way of example, the exclusive OR of this check sum and all of the preceding words contained in the software bootstrap program should be equal to zero if the software bootstrap program has been correctly loaded. If this exclusive OR is not equal to zero, then the check sum is incorrect and indicates to the system logic, namely microprocessor 310, that the software bootstrap has not been correctly loaded and the system 300 must once again return control of the microprocessor 310 to the hardware bootstrap program for reloading of the software bootstrap program in accordance with the manner previously described with reference to FIG. 4. This function is repeated in FIG. 5 by decision symbol 130 and symbol 132. However, assuming that this check sum is correct and, accordingly, that the software bootstrap program has been correctly loaded, then the microprocessor 310 in accordance with the software bootstrap program resets the CRT 330 to preferably display the message "PLEASE WAIT" as represented by symbol 134. While this message is being displayed, the microprocessor 310 under control of the software bootstrap program preferably sets up the system logic to capture all program packets which are transmitted, that is all packets or rows 1202 having a special character, by way of example, of 33 in the 5 th character position, which thereby identifies that the particular packet is a program packet. This function is represented by symbol 136 in FIG. 5.

Preferably, permission packets 1204 are always captured by the system logic. Since transmitted permission packets are always captured by the logic, the previously mentioned function 116 of the system under control of the aforementioned hardware bootstrap (FIG. 4) is required so that the system can identify that the captured packet belongs to the software bootstrap program and not to permission. The system logic under control of the software bootstrap program, then determines whether or not a packet has been captured. This function is represented by decision symbol 138 in FIG. 5. As previously mentioned, this captured packet could be a permission packet 1204 or could be any program packet 1202. If a packet has not been captured, then an iterative control loop is formed until a packet is captured by the logic. However, when a packet has been captured, the system logic then determines whether or not this captured packet is a permission packet 1209, this function being represented by decision symbol 140. If the captured packet is a permission packet, then the logic must determine whether or not this permission packet 1204 has been previously captured, this function being represented by decision symbol 142, since the permission packets are preferably cyclically continuously transmitted, as is preferably true of all packets in the system of the present invention, and, once again, through an error of transmission or some other reason, the particular permission packet 1204 may or may not have been previously captured by the terminal 300. If the terminal 300 has already captured this permission packet 1204, then an iterative control loop is formed, until a permission packet 1204 is captured which has not been previously captured. If the permission packet 1204, however, has not been previously captured, then the terminal 300 preferably stores this permission packet in permission memory, this function being represented by symbol 144 in FIG. 5. When this permision packet 1204 is stored in permission memory, the logic then determines whether or not, in the example given, the captured permission packet pertains to groups zero through 127, this function being represented by decision symbol 146, since, as previously described with reference to FIG. 3, groups zero through 127 are the groups preferably identified with the permision message for the program grabbing function of the terminal 300. If the group or groups associated with the permission packet are not groups zero through 127, in other words if the 4th character of the permission packet 1204 as represented by FIG. 3 is not, by way of example, the number 32, then an iterative control loop is formed until a permission packet 1204 is captured which relates to the aforementioned groups zero through 127. When the system logic captures a permission packet 1204 identified with the aforementioned groups zero through 127, then the micro-processor 310 under control of the software bootstrap program obtains the selected program address from the information contained in characters 20 through 31, by way of example of the permission packet 1204 of FIG. 3 which characters, as previously mentioned, preferably contain the program page number of the first program page of the selected downstream program to be captured. This function is represented by symbol 148. When this has been accomplished, an iterative loop is formed so as to enable the logic to now continue on to the next operation which involves actual capture of the specific selected main program. Assuming that the packet which has been captured is not a permission packet, the logic then determines whether or not this captured packet is a main program packet 1202, this function being represented by symbol 150 in FIG. 5. If the captured packet is not a permission packet 1204 and is not a main program packet 1202, then an iterative control loop is formed until a main program packet 1202 is captured. When this occurs, that is when a main program packet 1202 is captured, the logic then determines whether or not permission has been received for the aforementioned groups zero through 127 which indicates to the logic that the terminal 300 has permission to capture a downstream main program. This function is represented by decision symbol 152. If permission has not been received for the capture of the selected main program, then an iterative control loop is formed until a proper permission packet 1204 is received and captured by the terminal 300, as functionally represented by symbols 140-142-144-146-148 in FIG. 5. Assuming that proper permission has been received, and a program packet 1202 has been captured, the logic then determines whether or not the address of the captured main program packet 1202 is correct in accordance with the selected program address which was previously obtained from information contained in characters 29 through 31 of the aforementioned captured permission packet. If the address of the captured program packet is not correct, then an iterative control loop is formed until the address of a captured main program packet 1202 is correct, that is, matches the selected program address, this function being represented by decision symbol 154 in FIG. 5. When the address of the captured main program packet 1202 is correct, the logic then determines whether or not it has previously captured that particular main or control program packet 1202 since, once again, as previously mentioned, these main program packets 1202 are also preferably cyclically continuously retransmitted in the system of the present invention and through some error in transmission, or for some other reason, the logic may have previously captured that particular main program packet 1202. This function is represented by decision symbol 156 in FIG. 5. If that particular main program packet 1202 has been previously captured, an iterative control loop is formed until the logic captures a correct main program packet 1202, that is one corresponding to the selected downstream program, which has not been previously captured. When this occurs, the logic then packs or loads the text of this main program packet 1202 which, as previously mentioned, contains the 24 program words, by way of example, contained in characters 6 through 37 (FIG. 2), into the appropriate area of the program memory 332, as previously described. This function is represented by symbol 158 in FIG. 5. After the captured main program packet has been loaded into the appropriate program of memory 332, the logic then determines whether or not the 720 program words associated with the program page which the particular captured main program packet forms a portion of has been captured, there preferably being 30 such program packets per program page, as previously mentioned. This function is represented by decision symbol 160 in FIG. 5. If the entire 720 program words associated with the particular program page with which the captured program packet is associated have not been captured, then an iterative control loop is formed until these entire 720 program words associated with that program page have been captured. When this occurs, the logic then determines whether or not all of the aforementioned 7 consecutively numbered program pages associated with the correct, that is selected, main program have been captured, this function being represented by decision symbol 162 in FIG. 5. If all 7 of these program pages have not been captured, then the logic preferably increments the selected program packet address by one and an iterative control loop is formed with the aforementioned logic iteratively functioning as above, until all 7 consecutively numbered program pages have been captured, the logic incrementing the selected program packet address by one after capture of each program page has been accomplished. This function is represented by symbol 164 in FIG. 5. The logic, of course, incrementing by one because of the previously mentioned containment of the main program in 7 consecutively numbered program pages. After all of these 7 consecutively numbered program pages have been captured, then the logic preferably checks the last word of the once-only initialization page portion of the captured selected main program by exclusively ORing all of the preceding words associated with this first program page once-only initialization program portion with the check sum portion of this first program page to determine if this exclusive OR is a zero. If it is a zero, this indicates to the logic that the once-only initialization portion of the main program has been correctly loaded. However, if the once-only initialization program portion has not been correctly loaded, this function being represented by decision symbol 166 in FIG. 5, then control of the microprocessor 310 is preferably returned to the aforementioned hardware bootstrap program (FIG. 4), with microprocessor 310 then, once again, reloading the software bootstrap program under control of the aforementioned hardware bootstrap program. This function is represented by symbol 168 of FIG. 5. If, however, the once-only initialization program has been correctly loaded and, accordingly, the aforementioned exclusive OR is zero, then the logic determines whether or not the main system program contained in the subsequent 6 consecutively numbered program pages has been correctly loaded by, similarly, exclusively ORing all of the preceding words of these 6 program pages with the last word of the 6 program pages which is the check sum. If this exclusive OR is not a zero, it indicates to the logic that the system program has not been correctly loaded and, as mentioned above, control of the microprocessor 310 is then preferably returned to the aforementioned hardware bootstrap program, with microprocessor 310 then functioning, once again, under control thereof to reload the software bootstrap and then, subsequently, to reload the entire main program, this function being represented by symbol 168 in FIG. 5. If, however, the system program has been correctly loaded as indicated by the aforementioned exclusive OR being zero, then control of the microprocessor 310 is turned over to the captured once-only initialization program portion of the main program, as functionally represented by symbol 172 in FIG. 5, decision symbol 170 functionally representing the correct loading of the system program. A typical program listing for the aforementioned bootstrap program is provided below, the program listing also being written in M6800 assembler language for use with a Motorola M6800 computer 310, as was the previously provided hardware bootstrap program, the symbols thereof being the conventional symbols associated with M6800 assembler language for use with a Motorola M6800 computer. ##SPC2##

Now referring to FIG. 6, a logic flow diagram associated with the aforementioned once-only initialization program portion of the main program is shown. As previously mentioned with respect to FIG. 5, microprocessor 310 under control of the software bootstrap program has control thereof turned over to the once-only initialization program after the correct loading of the selected main program, as functionally represented by symbol 172 in FIG. 6. It should also be noted, as previously mentioned, that this once-only initialization program portion of the main program is preferably written in a portion of memory 332 which is normally assigned to data so that this once-only initialization program is subsequently overwritten by data during the normal operation of the terminal 300 in accordance with the selected loaded system program. Under control of the once-only initialization program, the logic is directed to initialize the associated terminal 300 peripherals such as tickers 322, printers 316-318-320, keyboard 324, the computer interface 312-314, etc., this function being represented by symbol 174 in FIG. 6. After this initialization has been accomplished, the logic then resets the data words and tables of the main memory 332 to their initial values, which function is represented by symbol 176 in FIG. 6. As will be described in greater detail hereinafter, preferably certain portions of the random access memory (RAM) 336 are conventionally protected against loss of information when power is lost, this function being referred to as "power failure-protected random access memory." Thus, the logic preferably now determines whether or not this power failure-protected random access memory portion 336 has lost power, which function is represented by decision symbol 178 in FIG. 6. If this portion 336 has lost power, then the logic resets this memory portion 336 to its initial values, as functionally represented by symbol 180 in FIG. 6. If, however, this portion 336 has not lost power, then the logic immediately loops to the next functional step which is the resetting of all buffers located in the random access memory 332, as functionally represented by symbol 182 in FIG. 6. As also shown and preferred in FIG. 6, if power has been lost and the associated power failure-protected memory portion 336 had to be reset to its initial values, as functionally represented by symbol 180, the logic then goes on to the next functional step which is the resetting of all of the aforementioned memory buffers, as previously mentioned. After all memory buffers have been reset, then the various information which is stored in the power failure-protected random access memory is unpacked or unloaded into the data memory portion, as functionally represented by symbol 184 in FIG. 6, this information preferably being, by way of example, user entered data, which may include, by way of example, specific stocks whose activity the user wishes to have displayed on the screen 330 out of a much greater total number of possible stocks which could be displayed. When this information has been unloaded or unpacked from the power failure-protected random access memory portion 336, then the logic resets the last of the other previous user entered information such as the last selected group and page, split screen information, video display information, etc., which are also preferably stored in the power failure-protected random access memory portion 336, this function being represented by symbol 186 in FIG. 6. After all of this user information has been entered and the initialization has been completed, control of the microprocessor 310 and the logic is turned over to the balance of the captured selected main program which comprises the captured selected system program which is contained in the 6 captured consecutively numbered program pages for operation of the terminal 300 in accordance with this stored selected program. This function is represented by symbol 188 in FIG. 6. Preferably, when the power is turned off for the terminal 300, this temporarily stored selected system program is erased since, preferably, the storage is all semi-conductive memory which conventionally functions to erase when power is removed, and the system is returned to this initial state awaiting turn on and initial operation under control of the aforementioned hardware bootstrap program (FIG. 4). If desired, of course, the temporarily stored main program may be replaced by a subsequently called up main program without turn off of the terminal merely by selecting a new main or control program for the terminal 300 and overwriting the previously selected temporarily stored main program with the newly selected or called up main program. As was also previously mentioned, with respect to the once-only initialization program and the previously stored software bootstrap, these two program components are overwritten by data during the operation of the terminal 300 under control of the system program since these previously mentioned program portions were stored in the data portion of the memory. A typical once-only initialization program listing is provided below which listing is also preferably written, by way of example, in M6800 assembler language for use with a conventional Motorola M6800 computer 310, with the symbols utilized therein being those conventionally utilized in M6800 assembler language. ##SPC3##

The stored system control program could be any conventional system program which can be performed by the system logic which is provided in the terminal 300, such as the normal row grabbing function described in the aforementioned patent as well as any other function capable of being performed by the various logic components contained in the row grabbing terminal 300, and no such typical program need be given in detail.

Referring now to FIG. 7, an overall functional system block diagram of the aforementioned terminal 300, which is controlled in accordance with the aforementioned hardware bootstrap, software bootstrap, once-only initialization and system programs is shown. The terminal 300 preferably includes a conventional comparator 302, a packet buffer 304, a video processor and timing control portion 306, a conventional tuner and demodulator 308 which provides demodulated video to portion 306, the aforementioned central processor 310, which is preferably the aforementioned Motorola M6800 microprocessor, the microprocessor 310 preferably having conventional associated I/O devices such as Motorola M6820s conventionally connectable thereto, to such typical I/O devices being diagrammatically illustrated in FIG. 7 by blocks 312 and 314. The terminal 300 may also preferably include a conventional hard copy printer 316 if such hard copy printing is desired together with a conventional printer interface 300 for interfacing the printer 316 with the computer or microprocessor 310, and may also include a conventional wire service printer 320 which is interfaced with computer 310 through a conventional printer interface 318 if such is desired. In addition, if ticker information is to also be provided, a conventional ticker interface 322 is then preferably included in terminal 300. A conventional keyboard 324 for enabling selection of desired information and/or desired main or control system programs is also preferably provided. A conventional character generator 326 is also preferably included in the terminal 300, with the output of character generator 326 being preferably provided to a conventional video synchronizing recombiner 328 which also preferably receives the vertical and horizontal sync and which, in turn, provides the input signal to the aforementioned display CRT 330. The terminal 300 also preferably includes in its memory the aforementioned random access memory portion 332, read only memory portion 334, which stores the hardware bootstrap program, power failure-protected random access memory portion 336 and a parity generation and check portion 338. Preferably, the terminal 300 also includes a conventional type of direct memory access sequencer 340 which shall be described in greater detail with reference to FIG. 8. In addition, the microprocessor 310 preferably has a conventional associated crystal controlled two-phase clock 342 associated therewith.

The terminal 300 shall initially be described solely with respect to the function of downstream program loading; this is, the obtaining of a remotely provided main or control program for operation of the terminal 300 from a remote data base. Thereafter, the terminal 300 shall generally be described with reference to its operation in accordance with a typical grabbed or downstream loaded system control program, such as the system control program which enables the terminal 300 to operate in conventional fashion to perform the row grabbing function which was previously described in the aforementioned patent and patent applications.

As previously mentioned, the aforementioned hardware bootstrap program which was described with reference to FIG. 4, is preferably stored in the read only memory portion 334 of the memory for provision to the microprocessor 310 for control thereof in accordance therewith. Referring back to the aforementioned hardware bootstrap program of FIG. 4, and specifically to the functional step 112 entitled "Set Up Hardware to Capture All Software Bootstrap Packets", in accomplishing this, the comparator 302 is preferably conventionally loaded with a comparison word which corresponds to special character 32 which, in the example given, implies that the captured program row is associated with the software bootstrap program. Comparator 302 then functions in conventional fashion to compare all transmitted and received packets or rows against this comparison word to determine if the packet being received is a software bootstrap packet. The packets of information which are preferably continuously transmitted and received are preferably initially provided to the packet buffer 304. If the comparator 302 provides a compare signal, that is if the information or packet provided is a software bootstrap packet, then the compare signal is provided through I/O device 312 to the direct memory sequencer 340. In response thereto, a conventional multiplexer switch 350 is controlled to thereby provide the content of packet buffer 304 to random access memory portion 332 under control of the direct memory access sequencer 340 to thereby load the aforementioned software bootstrap packet into the aforementioned designated or assigned portion of the random access memory 332 which was previously described with references FIGS. 4 through 6, the aforementioned software bootstrap program preferably being loaded into the normal data assigned portions of the memory 332 since, as previously mentioned, the software bootstrap is subsequently written over by data when its function has been accomplished. As previously mentioned, this operation is preferably repeated in accordance with the hardware bootstrap program (FIG. 4) for each captured software bootstrap packet of 24 program words until the entire 720 program words associated with the software bootstrap program have been captured. Then, as previously described with reference to FIG. 4, when the software bootstrap has been completely captured or loaded into the random access memory portion 332, control of the terminal 300 is turned over to the software bootstrap program in order to accomplish the downstream loading of the selected main or control program.

As previously mentioned with reference to FIG. 5, after the software bootstrap program has been loaded into the random access memory portion 332, the microprocessor 310 and memory portion 332 function to perform the comparison check previously described with reference to FIG. 5 in order for the microprocessor 310 to determine whether or not the software bootstrap program has been correctly loaded. If the software bootstrap program has not been correctly loaded then, as previously described, the system 300 will return control of the microprocessor 310 to the hardware bootstrap program for reloading of the software bootstrap program until this function has been correctly accomplished. Assuming the software bootstrap program has been correctly loaded, then, as previously mentioned, the microprocessor 310 communicates through I/O device 314 with the character generator 326 and the CRT 330 to conventionally provide the aforementioned "PLEASE WAIT" message on the CRT 330. With respect to the execution of logic functional steps 136 through 164 of the software bootstrap program of FIG. 5, the microprocessor 310 functions in conjunction with the comparator 302 and packet buffer 304, direct memory access sequencer 340, random access memory portion 332 and multiplexer switch 350 to accomplish the loading of the various packets or rows associated with the permission, as well as the various packets or rows associated with the main or control program into the appropriate, previously described portions of the random access memory 332. In accomplishing this, the comparison word which is provided to comparator 302 is, of course, varied in accordance with the desired packet being sought at any particular time by the microprocessor 310. Thus, for the permission packet, the comparator 302 would be "looking for" the appropriate special character, such as 32 in the fourth character position, for recognition of a permission packet which, upon the provision of the compare signal as a result of a match, would subsequently be provided from the packet buffer 304 to the position in in the random access memory 332. Similarly, the comparator 302 would have a particular compare word associated with a particular consecutive program page number of the main or control program which is to be loaded into memory portion 332 and when the particular consecutive program page of the main program being sought is detected by the comparator 302, the particular captured packet associated therewith will be provided from packet buffer 304, through multiplexer switch 350 under control of the direct memory access sequencer 340, to the appropriate memory position in memory 332, this repetitively being accomplished in the manner described with reference to FIG. 5 until all of the packets, that is all 30 packets by way of example, associated with a given consecutive program page of the program have been loaded into memory 332. When this occurs, the comparator 302 is then incremented so that it then compares or looks for the next subsequent program page in the 7 pages associated, by way of example, with the main or control program, this operation being repeated until all 7, by way of example, consecutively numbered pages of the selected main program have been appropriately loaded into memory 332. As also previously mentioned, the compare word associated with the first program page of the main or control program being sought by the microprocessor 310 is preferably located, by way of example, in character positions 29 through 31 of the permission packet 1204 which was previously loaded into the random access memory portion 332, as previously described with reference to FIG. 3. With respect to logic functional steps 166 and 170, these exclusive OR operations are accomplished between the microprocessor 310 and the random access memory 332 in order to determine whether or not the main control program, including the once-only initialization program portion, has been correctly loaded into memory 332. If either this once-only initialization program portion or the system program portion of the main or control program has not been correctly loaded into memory 332, then, as previously mentioned, control of the system is returned to the aforementioned hardware bootstrap program for reloading of the software bootstrap program with the then subsequent reloading of the main or control program until both the system control program portion and the once-only initialization portion of the main program have been correctly loaded.

Assuming that they have been correctly loaded, as previously mentioned, control of the system with respect to the downstream program loading operation thereof is then turned over to the once-only initialization program previously described with reference to FIG. 6. Then, under control of this once-only initialization program portion, the I/O devices 312 and 314 are preferably initialized in conventional fashion so as to be set up in order to preferably interface in conventional fashion with the various components associated with these I/O devices 312 and 314. As also previously mentioned with respect to FIG. 6, the power failure-protected random access memory portion 336 is also examined, as indicated by functional step 178, to see whether or not power has been lost, which function is preferably accomplished by means of a conventional software comparison of a designated word in the once-only initialization program with a word stored in the power failure-protected random access memory portion 336. If a compare exists, then the system assumes that power has not been lost; however, if this word is not located, that is if no compare exists, then the system assumes that power has been lost. With respect to the logic functional step 182 of resetting all buffers, this refers to the buffers located in the random access memory 332 and preferably refers to identifying these buffers as being available to receive information as opposed to necessarily clearing these buffers. With respect to the information preferably contained in the power failure-protected random access memory portion 336, this information is preferably rearranged and loaded in usable fashion into random access memory portion 332, as functionally indicated by steps 184 and 186 in FIG. 6. After this has been accomplished, control of the system 300 is then turned over to the main or control program, which is functionally represented by symbol 188 in FIG. 6.

It should be noted that preferably the I/O device 314 may have a portion thereof which can be designated as a processor controlled port for enabling subsequent transfer of called up programs to another device other than the terminal 300. Thus, terminal 300 could call up a program which is subsequently provided via these processor control ports to a remote device which is to be controlled by that program. In other words, the terminal 300 in this manner could act as a loader program for the subsequently provided main program to the remote device or, if desired, could interact with this remotely loaded program to operate the remote, or any other desired control function.

Referring now to FIG. 8, the direct memory access sequencer 340 is shown in greater detail. This sequencer 340 preferably comprises a pair of conventional sequencer shift registers 400 and 402 with conventional associated logic circuitry for providing timing and control signals in order to perform the following functions which are to control the operation of the microprocessor 310 in an orderly manner; to control the data and address multiplexer switches 350 and 351 (FIG. 7); and to control the packet buffer 304 in the manner previously described in order to insure that the packets being provided to the system 300 are properly loaded into the appropriate locations in the random access memory 332. Direct memory accessor 340, as shown in FIG. 9, preferably includes an address latch and counter portion 500 which is preferably a source of address to the random access memory 332 when information is transferred from packet buffer 304 into random access memory 332. The address latch and counter 500, as shown and preferred, preferably includes conventional synchronous up counters 502 and 504 and a conventional data latch 506 with appropriate conventional associated logic. As shown and preferred in FIGS. 7 and 9, the direct memory access sequencer 340 also has an associated conventional buffer unload control 510 which has a portion 510a located in the sequencer 340 and another portion thereof 510b preferably located in the packet buffer 304, portions 510a and 510b preferably being interconnected via the control line termed "FIFO control" (FIG. 7). The packet buffer 304, which preferably contains a plurality of buffers, is preferably unloaded into the random access memory 332 under control of the direct memory access sequencer 340 in accordance with the buffer unload control 510. Buffer unload control 510 also preferably determines whether the other packet buffer or buffers in packet buffer 304 which are not being unloaded are available to receive incoming information. This buffer unload control 510, as shown and preferred in FIG. 9, preferably comprises conventional logic circuitry such as a plurality of conventional J-K flip-flops and D-type flip-flops with associated conventional logic. Referring to FIG. 10, the packet buffer 304 is shown in greater detail with the packet buffer 304 preferably comprising a pair of conventional buffers 304a and 304b and associated conventional logic such as conventional logic for accomplishing a serial-to-parallel conversion of the incoming data being loaded into the packet buffers 304a and 304b. Packet buffer 304 also preferably includes a conventional output holding register 305 for containing the output of the particular packet buffer 304a and 304b being unloaded to the random access memory 332. Conventional logic circuitry 307 is also preferably provided for controlling the flow of information into and out of the conventional buffers 304a and 304b. Two buffers 304a and 304b are preferably provided so as to enable the capability of capturing two adjacent packets in the data stream. A typical conventional I/O device 312, or 314 used with the microprocessor 310 and the associated devices previously described with reference to FIG. 7 is shown in FIG. 10 and need not be described in greater detail hereinafter.

Referring now to FIG. 11, the microprocessor two phase clock 342 is shown in greater detail. This clock is conventional and will not be described in greater detail hereinafter. Preferably, the aforementioned parity generation and check portion 338 of the memory functions so as to conventionally check memory parity of the information which is being provided from the random access memory 332 during the operation of the microprocessor 310 in accordance therewith. In accomplishing this, a parity bit is preferably generated for each 8 bit program word provided from the random access memory 332 and checked whenever memory is read. If parity does not exist for any one of these 8 bit program words, then the system preferably, once again, returns control thereof to the hardward bootstrap program for, once again, reloading of the software bootstrap program and subsequent reloading of the main or control program, since the control program is stored in memory 332 and any interruption or or error in this stored information could cause the sytem 300 to incorrectly operate. If such a high level of security is not desired, of course, then the parity generation and check function 338 can be omitted. It should be noted that in accordance with the power failure-protected feature, power failure-protected RAM 336 is preferably fed by a DC battery source whenever main power is removed from this RAM 336. Logic functions associated with the microprocessor 310 as well as the other logic components previously generally described with reference to FIG. 7, are all preferably conventional functioning logic components which are conventionally connected so as to function in accordance with the aforementioned hardware bootstrap and software bootstrap programs to enable the loading of the selected main or control program into the conventional random access memory 332, and, accordingly, these logic components will not be described in any further detail. The video processor portion of the video processor and timing control 306 is preferably identical with that previously described in the aforementioned patent and patent applications, with the timing control portion thereof preferably conventionally providing all of the appropriate timing signals for controlling the properly timed operation of the circuitry, with the exception of the microprocessor 310, such as the previously aforementioned compare functions, direct memory access sequencer 340 transfer of packets from the packet buffer 304 to the random access memory 332, etc. The control of the microprocessor 310, however, is preferably controlled by the aforementioned microprocessor clock 342. The aforementioned timing control circuitry 306 is preferably similar to that utilized in the aforementioned patent and patent applications for obtaining timing control with, however, conventional modifications being accomplished where necessary to change the timing of certain signals to enable proper control thereof to accomplish the aforementioned downstream program loading function of the system in accordance with the previously described program row transmission, etc.

Summarizing the above detailed description of the system 300 of the present invention, and referring once again to FIG. 7, the function of the video processor and timing control circuit 306 is to preferably condition the demodulated video input signal and generate the basic system timing signals which are conventionally derived from the demodulated data packets by a conventional phase locked loop. The output of this phase locked loop, as in the aforementioned patent and patent applications, is the master or prime clock for the system. Processor 306 conventionally divides the demodulated video into its three components, horizontal sync, vertical sync and data. Preferably, between each horizontal sync, which function as a record separator, is a data packet preferably comprising 38 seven bit words. The aforementioned horizontal and vertical sync signals are conventionally utilized to reset the previously described decoding circuits necessary to analyze and process the data packet which follows them in accordance with the aforementioned patent and patent applications. As was previously mentioned, the function of the comparator 302 is to check this incoming data packet provided from processor 306 for the various mentioned attributes, substantially all of which are preferably supplied from microprocessor 310 except for any which may be hand-wired into the comparator 342. These attribute comparisons are preferably performed at a relatively fast rate and, accordingly, a separate buffer is preferably made available to microprocessor 310 therefor, with microprocessor 310 updating this buffer at a relatively slow rate with a new attribute and providing it into the primary comparison buffer of comparator 302 at the appropriate time. Preferably, when a comparison is made, the flag associated with the particular attribute is set with these flags preferably being double buffered to enable two back-to-back packets to be processed, as previously mentioned. The packet buffer 304 temporarily stores each of these incoming packets which, as shown in FIG. 7, are provided both to comparator 302 and packet buffer 304 from processor 306, until a comparison is made, this packet being held in buffer 304 until being direct memory accessed (DMA'ed) into main memory 332, as previously mentioned, upon a satisfactory comparison. The use of the aforementioned two buffers 304a and 304b enables one buffer 304b, for example, to temporarily store a second good data packet while another data packet is being DMA'ed into main memory 332. As previously mentioned, the main memory RAM 332 preferably consists, by way of example, of 8K by 9 bit words, the ninth bit preferably being a parity bit, with the RAM 332 preferably being segmented into two 4K areas, by way of example, 4K for data storage and 4K for program storage, in the 65K, by way of example, address space of microprocessor 310. The address lines are preferably conventionally driven by the microprocessor 310 or DMA sequencer 340 address counter and the data lines are preferably driven by the microprocessor 310 or by the packet buffer 304. The DMA sequencer 340 preferably controls both the source of the address and data lines as well as the read/write and check enable lines. As previously mentioned, parity generation 338 preferably takes place with every write and parity check preferably takes place with every read of memory 332. The hardware bootstrap loader program and various utility programs, if desired, are preferably stored in the ROM 334 which is, by way of example, 1K by 8 bits, and the aforementioned user information is stored in the power failure-portected RAM 336 which is, by way of example, 1K by 4 bits and is preferably protected from a power failure, such as for 48 hours, by a rechargeable battery pack which is trickle charged during normal operation and supplies voltage to the protected area 336 of RAM in the event of a power failure to prevent loss of the information stored therein. The aforementioned microprocessor 310 associated with the main memory, which is preferably by way of example, as previously mentioned, a Motorola M6800 microprocessor, is the central processing unit for the system 300 and preferably all communication between the various components of the system 300 is done therethrough. For example, microprocessor 310 generates DMA addresses and comparator attributes and interfaces with the peripherals via interfaces with the peripherals via interfaces 312, 314; it supplies information to the character generator 326 and printers 316, 320; takes in data from the ticker input 322 and keyboard 324; and provides a portion of the interface 314 to be used as the aforementioned processor controlled port for interfacing with a secondary processor. The input to the ticker interface 322 is preferably either EIA or current loop with one of two ticker inputs thereto (New York Stock Exchange or American Stock Exchange, for example) being selected by the microprocessor 310. Data to be printed is sent to the printer interface 318 from interface 314, with interface 318 preferably conventionally converting the parallel data provided thereto to a serial asynchronous format and sending the data at 300 baud, by way of example, to the printer 316 over an EIA line. The aforementioned DMA sequencer 340 preferably conventionally performs the steps necessary to move data temporarily stored in packet buffer 304 to main RAM memory 332 such as "halt processor 310"; take control of data address and control lines to memory 332" ; with information in the packet buffer 304 to RAM 332"; "un-halt processor 310"; and "send DMA complete interrupt to processor 310." The processor 310 is then interrupted, signifiying that a DMA has been completed and the processor 310 then preferably sends out a new address to the DMA sequencer 340 address register and returns it to its normal operating mode. The character generator 326 which preferably conventionally converts the binary information input from the microprocessor 310 to serial video data which is conventionally recombined with horizontal and vertical sync and sent to the CRT 330 for display, has a video memory which consists of, by way of example, 1K by 7 bit words, which is sufficient memory to preferably fill the CRT screen 330 with 16 rows of 64 characters each, and is preferably updated by the microprocessor 310 during horizontal sync with a preferred maximum update rate of 1 character every other horizontal sync. A 16 bit shift register in the character generator 326 preferably holds a bit pattern which determines whether each of the 16 rows is 32 or 64 characters in length with this register preferably being serially loaded by the microprocessor 310 during the vertical blanking period. This completes the above summary of the system 300.

It sould be noted that once the selected main control program has been loaded, assuming, for example, that the program is the row grabbing program utilized for control of the terminal 300 as a conventional row grabbing video display terminal of the type previously described in the aforementioned patent, the terminal 300 will then function in conventional fashion under control of this downstream loaded program as such a row grabbing video display terminal. Of course, as previously mentioned, once the terminal 300 is turned off, a new control program to accomplish the row grabbing function would then have to be downstream loaded from the remote data base in the manner previously described due to the erasure of the previously stored program on turn off of the terminal 300. Thus, any control program, as previously mentioned, which could be accomplished by the conventional logic provided in the terminal 300 could be selectively loaded into the terminal 300 and the terminal 300 then controlled in accordance therewith to achieve whatever desired functions are enumerated in the control program, such as by enabling the user to set "buy" or "sell" limits of interest for selected stocks which video data is transmitted which enables the processor 310 to compare these limits against the real time incoming last stock price captured and provide an alert signal on the screen 330 if it exceeds the preselected limit set by the user, as well as storing this information for later video display, if desired.

Summarizing the above, the terminal 300 of the present invention provides an information retrieval system capable of capturing packets or rows of data and/or control program instructions from a continuously transmitting remote data base comprising a plurality of different control programs and different data rows to provide a selected purpose variable function terminal whose information display as well as the particular type of processing thereof can individually be substantially simultaneously varied for each terminal of a plurality of terminals. Thus, every user is not only capable of individually determining what video displayable information is to be received but also how the particular user terminal which receives this information is to process it, all of which is continuously transmitted over a common television distribution system for the video information.