Background of the Invention
This invention relates to measurement systems, and more particularly, to capacitance measurement systems.
Many forms of prior art capacitance measurement systems utilize a capacitive bridge configuration to produce a signal representative of the relative capacitances associated with sensor and reference capacitors in the bridge. Other forms in the prior art include systems exemplified by U.S. Pat. No. 3,048,775 wherein a capacitive sensor is configured in the feedback path around an a.c. amplifier driven by a reference a.c. signal, and wherein the amplifier output is demodulated using a diode detector.
While such prior art capacitance measurement systems are suited for certain uses as accelerometers, scales and balances, proximity detectors, linear and angular position sensors, and pressure transducers, the prior art systems are substantially limited in accuracy and sensitivity of their respective measurements due to a number of factors, including temperature variation, stray or leakage capacitance, nonlinearities in the transducer configurations, noise, and drift. Furthermore, many prior art systems are limited to certain operational frequencies.
It is an object of the present invention to provide a capacitance measuring system wherein a signal is generaged which is a predetermined function of the capacitance of a sensor capacitor.
A further object is to provide a capacitance measuring system which is relatively insensitive to temperature variation, stray or leakage capacitance, noise, drift and operational frequency.
Summary of the Invention
According to the present invention, a sensor network, including series connected capacitors is utilized with a switching network in a feedback configuration to generate the signal which is a predetermined function of the capacitance of the sensor capacitor. In one form of this invention, the feedback signal is a linear function of the reciprocal of the capacitance of the sensor capacitor. In another form, the feedback signal is a linear function of the capacitance of the sensor capacitor.
The switching network includes a two state switch and a control for cyclically controlling the switch to flip between its two states. A means is provided to couple a plurality of reference potentials to various terminals of the switch, to the feedback network, and in some embodiments to the sensor network.
The feedback network is coupled to both the sensor and switching networks, and provides a feeback signal representative to the difference in charge stored on the series capacitors from a predetermined value.
The switching network is operative to cyclically interconnect the feedback network and sensor network with the feedback signal and external reference potentials in a manner whereby the average charge stored on the series capacitors over each cycle is substantially equal to the predetermined value.
In one form of the invention, the feedback network includes a differential amplifier coupled to the junction of the series capacitors in a null-seeking configuration. Additionally, the amplifier output may be directed by way of a demodulator to provide the feedback signal. The demodulator is such embodiments may be a synchronous demodulator, operating synchronously with the switch control in the switching network.
In null-seeking configurations, the feedback nulling of the error signal at the junction between the sensor and reference capacitors virtually eliminates the effect of any leakage capacitance which might be present. As a result, such configurations may readily be utilized with a remote sensor.
Furthermore, by using conventional techniques for the switching network and synchronous demodulator, the system operates as a sampled data system with the result that noise at frequencies other than the sampling frequency is virtually eliminated, making the system in accordance with the present invention relatively low noise compared with systems of the prior art. In addition, the temperature sensitivities associated with prior art systems, such as generated by temperature dependent gain factors, or by diode detection networks are not present in the present system.
Additionally, the feedback network may include a differential amplifier which is a.c. coupled to the junction point between the series capacitors so that the system operates to seek a dynamic null. As a result, such systems may be constructed with relatively inexpensive circuit elements since a high performance d.c. amplifier (exhibiting relatively high gain stability and low drift) is not required.
Brief Description of the Drawings
The foregoing and other objects of this invention, the various features thereof, as well as the invention itself, may be more fully understood from the following description, when read together with the accompanying drawings in which:
FIG. 1 shows, in block diagram form, a capacitance measuring system according to the present invention;
FIGS. 2-4 shows, in schematic form, alternative switching networks for the system of FIG. 1;
FIG. 5 shows, in schematic form, an exemplary configuration of a capacitance measure system in accordance with the present invention;
FIG. 6 shows, in schematic form, an exemplary configuration for the second switching network in the system of FIG. 5;
FIG. 7 shows waveforms suitable for controlling the switching networks for the system of FIGS. 5 and 6;
FIG. 8 shows, in schematic form, an alternative configuration for a capacitive measuring system in accordance with the present invention; and
FIG. 9 shows, in schematic form, an exemplary configuration for the amplifier in the system of FIG. 8.
Description of the Preferred Embodiment
FIG. 1 illustrates an exemplary embodiment of the present invention in block diagram form. In that figure, a sensor network 10 includes a pair of series connected capacitors C.sub.1 and C.sub.2. The junction point between these capacitors is connected by way of signal line D as a first input to a feedback network 12. The feedback network 12 provides a feedback signal V.sub.f by way of line 14 to an output terminal 16, and by way of feedback terminal 18 to a switching network 20. Network 20 provides signal lines A and B which are connected to the sensor network 10, and signal line C which is connected as a second input to the feedback network 12.
The feedback network 12 includes a means to generate a feedback signal representative of the difference in the charge stored on the series capacitors C.sub.1 and C.sub.2 from a predetermined value. The switching network includes a control which is operative to cyclically interconnect the feedback terminal 18 and a plurality of externally applied reference potentials with the sensor network 10 and the feedback network 12 by way of lines A, B and C, whereby the average charge stored on the capacitors C.sub.1 and C.sub.2 over each cycle is substantially equal to the predetermined value. In this configuration, the feedback signal is a predetermined function of capacitance of one of the capacitors C.sub.1 and C.sub.2.
FIGS. 2-4 show, by way of example, alternative forms for the switching network 20 which are suitable for use in the configuration of FIG. 1. Each of the illustrated switching networks include a double pole, double throw switch (including coupled switches 22 and 24) and a switch control 26. The switch coupling is indicated by the dashed line 28 in these figures. It will be understood that double pole, double throw switch may take the form of a solid state switching element, for example, using a conventional FET configuration. Alternative forms of the double pole, double switch may be readily substituted in keeping with the present invention.
The reference potentials V.sub.1 and V.sub.2 (as shown in FIGS. 2-4) and potential V.sub.3 (as shown in FIG. 4) are coupled to the various terminals of the switches and signal lines A. B. and C. This coupling is illustrated by the solid lines, indicative of a reference potential coupling means.
Switch control 26 may be any suitable means for driving the switches 22 and 24 together. In alternative embodiments, such as illustrated in FIGS. 5 and 8, the switch control 26 may be further coupled to the feedback network 12, as described more fully below, to permit synchronous demodulation in the feedback network.
With each of the switching, networks of FIGS. 2-4, the switching elements 22 and 24 are cyclically switched so that their poles are alternately connected between their associated terminals so that the configuration of FIG. 1 maintains an average charge stored on the series capacitors C.sub.1 and C.sub.2 over each cycle substantially equal to the predetermined value. In this configuration, the signal at the junction of the capacitors C.sub.1 and C.sub.2 is representative of an error signal corresponding to the difference in charge stored on those capacitors from a predetermined value.
In a configuration using the switching network 20 illustrated in FIG. 2, a feedback network 12 may include a demodulator for extracting the error signal from the signal on signal line D. As more specifically illustrated in conjunction with FIGS. 5 and 8 below, the demodulator may be operated in synchronism with the switching of switches 22 and 24. In addition, with this configuration, the network 12 may include a differential amplifier input having its differential input terminals connected to lines C and D. With the reference potential V.sub.1 being maintained at ground potential, the feedback is then effective to operate in a null-seeking mode. In this configuration with C.sub.1 being a fixed capacitor and C.sub.2 being a variable capacitor having capacitance which varies with an external parameter (such as ambient pressure), a substantially constant average charge over a cycle is maintained on the capacitor C.sub.1, while the feedback voltage V.sub.f is varied by the network 12 with the variations in the capacitance of capacitor C.sub.2 in order to maintain the average charge over a cycle on capacitor C.sub.2 to equal a constant. Thus, the feedback signal V.sub.f is a linear function of the reciprocal of that capacitance (i.e. C.sub.2). Where C.sub.2 is substantially a parallel plate capacitor, V.sub.f is a linear function of the gap between the plates of C.sub.2.
For a configuration using the switching network 20 illustrated in FIG. 3, the feedback network 12 may include a differential amplifier having its differential input terminals connected across lines B and C. With this configuration, as with that described above, a demodulator may also be used in the feedback network and this demodulator may similarly be a synchronous demodulator. In operation where C.sub.1 is fixed and C.sub.2 varies with an external parameter, the switching network maintains as average charge on capacitor C.sub.1 which is constant over a cycle,, while the feedback network 12 varies feedback voltage V.sub.f with changes in the capacitance of capacitor C.sub.2 so that the average charge on capacitor C.sub.2 is also maintained at a constant. Thus, in this configuration also, the feedback signal V.sub.f is a linear function of the reciprocal of the capacitance of sensor capacitor C.sub.2.
With the switch network 20 configuration of FIG. 4, the potential V.sub.3 is maintained between the potentials V.sub.1 and V.sub.2. For one null-seeking configuration, the voltages V.sub.1 and V.sub.2 may be of opposite polarity while the voltage V.sub.3 is maintained at ground potential. In this configuration, the lines D and C may be connected across the differential inputs of a differential amplifier in network 12 in a manner similar to that described in conjunction with the FIG. 2 configuration. The system of FIG. 4 is particularly well suited for use with a differential capacitor forming the series capacitors C.sub.1 and C.sub.2. For example, this differential capacitor may have two fixed plates connected to terminals A and B, respectively, while the terminal D is connected to a conductive diaphragm which positioned between the fixed plates and is sensitive to an external parameter, such as pressure. In this configuration, the charge on the fixed plates is maintained equal to a predetermined constant, while the feedback network 12 varies the feedback potential V.sub.f with changes in position of the diaphragm so that a constant average charge is maintained on each of the effective capacitors formed by the differential capacitor (i.e., one formed by the fixed plate and the diaphragm (C.sub.1), and the other formed by the other fixed plate and the diaphragm (C.sub.2).
In all of the above described configurations, the feedback network 12 may be coupled to the junction between capacitors C.sub.1 and C.sub.2 by an a.c. coupling means, thereby permitting operation under dynamic null-seeking conditions, limiting the effects of drift and gain instability in the feedback network 12. FIGS. 5-9 illustrate in schematic form more detailed forms of the present invention consistent with the configurations described above in FIGS. 1-4.
In FIG. 5, a sensor network 112 is shown to include a fixed reference capacitor C.sub.R and sensor capacitor C.sub.S connected in series between input terminals 116 and 118.
A first switching network 120 is connected to terminals 116 and 118 and includes switches 124 and 126. Switches 124 and 126 are controlled to synchronously switch between two operative states in response to a control signal on line 128 provided by a switch control 130. In their first state, the switch 124 connects terminal 116 to a first reference potential V.sub.1 and switch 126 connects terminal 118 to ground potential. In their second state, switch 124 connects terminal 116 to ground potential and switch 126 connects terminal 118 to a feedback terminal 132. The switches in network 120 may be in the form of conventional electronic switches such as provided by CMOS circuitry well known in the art, with the control line 128 providing the control signal for switching the CMOS switches.
The junction point between the reference capacitor C.sub.R and the sensor capacitor C.sub.S is connected by way of a.c. amplifier network 134 and short term charge storage network 136 to a second switching network 140. As illustrated in FIG. 5, network 136 includes a short term charge storage capacitor C.sub.1 '.
The second switching network 140 includes a switch 142 whose state is controlled by switch control 130 as indicated by the broken line 144. With switch 142 in its second state, the short term charge storage capacitor C.sub.1 " is connected to a second reference potential V.sub.2. In its first state, switch 142 connects capacitor C.sub.1 ' of the short term charge storage network 136 to a long term charge storage network 148, which comprises a long term storage capacitor C.sub.2 " having one terminal at ground potential. The second switching network 140 may comprise an electronic switch network including a CMOS switch connected in series with an FET analog gate, as described below in more detail in conjunction with FIG. 6.
The long term charge storage capacitor C.sub.2 ' is further connected to integrator network 150 which comprises an operational amplifier configured as an integrator, whereby the output signal, X, is proportional to the time integral of the difference between the voltage across capacitor C.sub.2 ' and the second reference potential. The output signal X of network 150 is applied by way of feedback line 152 to the feedback terminal 132.
In the embodiment of FIG. 5, the switch control 130 includes a means for generating appropriate control signals on lines 128 and 144 to repetitively control the states of switching networks 120 and 140 so that during a first portion of each cycle, switches 124, 126 and 142 are effectively in their so-called first state (as shown in FIG. 5), and during a second portion of each cycle, those switches are in their respective second states.
FIG. 6 illustrates one embodiment of the second switching network 140 which includes a CMOS switch 160 and an FET analog gate 162, respectively controlled by switch control 130 by way of line 144a and 144b. FIG. 7 illustrates exemplary signals representative of those which may be applied to lines 128, 144a and 144b, respectively, to provide the above-specified switching action of the networks 120 and 140. In response to application of the high level of the waveforms of FIG. 7, switches 124, 126, 160 and 162 enter and remain in their respective first state for the duration of that level, i.e., CMOS switches 124, 126 and 150 are in the positions illustrated in FIGS. 5 and 6, and the FET of gate 162 provides a relatively low impedance path between its source and drain. In response to application of the low level, the switches 124, 126, 160 and 162 enter and remain in their respective second state for the duration of that level, i.e. CMOS switches 124, 126 and 160 are in their non-illustrated position, and the FET of gate 162 provides a relatively high impedance path between its source and drain.
In operation, with the switch networks 120 and 140 in their first state, the reference and sensor capacitors produce an error signal at the junction point of those capacitors which serves to charge the short term charge storage capacitor C.sub.1 '. During the second portion of the cycle with the switch networks in their second states, the charge on the short term capacitor is transferred to the long term storage capacitor, and the voltage across that capacitor is integrated and fed back through the first switching network and sensor network. This feedback signal tends to null the a.c. signal at the junction point of the reference and sensor capacitors. At null, the feedback signal produced by the integrator network is proportional to the reciprocal of the capacitance of the sensor capacitor.
Of course, it is readily apparent that the present invention is well suited for many alternative uses which may utilize a signal which is a linear function of the capacitance of a sensor capacitor. Such uses include, for example, scales and balances, proximity detectors, pressure transducers, and linear and angular position sensors.
An alternative embodiment of the present invention is illustrated in FIGS. 8 and 9. In those figures, elements having corresponding elements in FIGS. 5 and 6 are identified with identical reference numerals.
In FIG. 8, a first switching network 120 includes SPDT switches 124 and 126 having their respective poles connected to terminals 116 and 118. Switches 124 and 126 are controlled to simultaneously switch between two operative states in response to a control signal on line 128 provided by a switch control 130. In a first state, switches 124 and 126 connect terminals 116 and 118 to feedback terminal 132. In a second state, the switch 126 connects terminal 118 to a first reference potential V.sub.1 and switch 124 connects terminal 116 to ground potential. The switches in network 120 may be in the same form described above in conjunction with network 120 in FIG. 5, with the control line 128 providing the control signal for simultaneously switching the switches 124 and 126.
A sensor network 112 is shown in include a reference capacitor C.sub.R and sensor capacitor C.sub.S connected in series between terminal 118 and ground potential. The junction point between the reference capacitor C.sub.R and the sensor capacitor C.sub.S is connected to non-inverting input terminal 168 of an amplifier network 170. An inverting input terminal 166 of amplifier network 170 is connected to terminal 118.
The amplifier network 170 includes means to provide an output signal at terminal 172 which includes a first additive component porportional to the difference in the a.c. signals at the inverting and non-inverting terminals, and a second additive component proportional to the a.c. signal at the inverting terminal. An exemplary embodiment for network 170 is shown in FIG. 9 wherein a type CA3130 operational amplifier is configured with its power supply input terminals (i.e., terminals 4 and 7 in FIG. 9) being maintained at a nominal bias level (i.e., approximately (+V.sub.B /2) volts at pin 7, zero volts at pin 4) augmented by the a.c. signal applied to terminal 166. With this configuration, the voltage at terminal 172 equals (R.sub.F /R.sub.I) times the difference in a.c. signals at terminals 166 and 168 less unity gain times the a.c. signal at terminal 166. Bootstrapping the operational amplifier power supply in this manner permits operation in a null seeking configuration, while permitting the sensor capacitor to have one terminal at ground potential.
The terminal 172 is connected by way of short term charge storage network 136 to a second switching network 140. As illustrated, network 136 includes a short term charge storage capacitor C.sub.1.
The second switching network 140 includes a switch 142 whose state is controlled by switch control 130 as indicated by the broken line 144. With switch 142 in its second state, the short term charge storage capacitor C.sub.1 is connected to the feedback terminal 132. In its first state, switch 142 connects capacitor C.sub.1 ' of the short term charge storage network 136 to a long term charge storage network 148, which comprises a long term storage capacitor C.sub.2 ' having one terminal at ground potential. The second switching network 140 may comprise an electronic switch network substantially the same as that described above in conjunction with FIG. 6.
The long term charge storage capacitor C.sub.2 ' is further connected to integrator network 150 which comprises an operational amplifier configured as an integrator, whereby the output signal, X, is proportional to the time integral of the different between the voltage across capacitor C.sub.2 ' and the reference potential V.sub.1. The output signal Y of network 150 is applied by way of feedback line 152 to the feedback terminal 132.
In the embodiment of FIG. 8, the switch control 130 is substantially the same as that described above for the embodiment illustrated in FIGS. 5-7, and thus includes a means for generating appropriate control signals on lines 128 and 144 to repetitively control the states of switching networks 120 and 140 so that during a first portion of each cycle, switches 124, 126, and 142 are effectively in their so-called first state, and during a second portion of each cycle, those switches are in their respective second states. With this operation, the feedback configuration is effective to null the error signal at terminal 172, with the feedback signal Y being a linear function of the reciprocal of the capacitance of the sensor capacitor C.sub.S.
In FIG. 8, the differential inputs to a difference amplifier network 176 are respectively connected to the integrator network 150 and to the reference potential. With this configuration, the output signal X from network 176 is proportional to the capacitive reactance if the sensor capacitor C.sub.S.
The embodiments described in conjunction with FIGS. 5 and 8 are particularly suited for use as a parameter measuring system where the reference capacitor C.sub.R is a fixed value capacitor, while the sensor capacitor C.sub.S is characterized by a capacitance which varies with the external parameter to be measured. For example, in a pressure measuring system, the sensor capacitor C.sub.S may take the form of the dielectric capsule pressure sensing device described in U.S. Pat. application Ser. No. 671,612, filed Mar. 29, 1976. The particular sensors described therein include a pair of opposed conductive film members having a separation which varies with the pressure differential interior to and exterior to the dielectric capsule. The capacitance associated with the sensor is inversely proportional to the separation of the film members and thus the capacitance of the sensor capacitor varies directly with this separation. With the presently-described embodiment, the feedback configuration is effective to null the error signal at the junction of the sensor and reference capacitors so that the feedback signal X becomes proportional to the capacitance of the sensor capacitor C.sub.S. Accordingly, the system provides a signal X which is a measure of the film separation and thus the pressure differential between the interior and exterior of the capsule.
The embodiment of FIG. 8 is also suitable for use as a parameter measuring system in a similar manner as the FIG. 5 embodiment wherein the reference capacitor C.sub.R is a fixed value capacitor, while the sensor capacitor C.sub.S is a capacitor which varies with the external parameter to be measured.
In addition to maintaining the advantages over the prior art systesm of the FIG. 5 embodiment, including insensitivity to temperature, noise, leakage, a.c. and d.c. gain charges the system of FIG. 8 has a further advantage in that the sensor capacitor is configured with one terminal connected ground potential, thereby permitting use with a broad range of sensors. Furthermore, in this configuration the terminal 166 provides a relatively low impedance path to ground while the terminal 168 provides a relatively high impedance path to ground, while both terminals 166 and 168 are maintained by the feedback network to be normally at the same voltage. As a result a shield configuration connected to terminal 166 may be used to substantially enclose the reference and sensor capacitors C.sub.R and C.sub.S to minimize any stray field effects.
The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.