Method and Device for Coding Compressing Video Information

The present invention relates to generally a method and device for coding video information and further compressing the coded video information, and more particularly a method and device for coding each interval (run-length) in which white or black elementary areas continue in succession in video information obtained by scanning a subject copy and further compressing the coded interval or run-length.

There has been recently devised and demonstrated a facsimile system in which the facsimile or video information is transmitted through a commercial telephone subscriber line with a low transmission speed from a transmitter to a receiver. When video information obtained by scanning a subject copy is transmitted through such a commercial telephone line, the transmission time is too long for practical purpose so that there have been proposed various methods for compressing the video information. One prior art method is such that an interval in which black or white elementary areas appear in succession, to be referred to as a "run-length" in this specification, is represented by a binary coded signal, and a discrimination bit "1" or "0" is inserted so that the binary coded signal representing a run-length of white elementary areas may be discriminated from that of a run-length of black elementary areas. However, a large number of discrimination bits which are not associated with the coding of run-lengths are contained in the transmitted signal as redundant bits so that the code compression ratio is low.

In view of the above, one of the objects of the present invention is to provide a method and device for weighting the discrimination bits "1"s and "0"s as in the case of the weighted bits in the coded run-length.

According to one embodiment of the present invention, a run-length of white or black elementary areas in video information is counted by a run-length counter. When a black elementary area changes to a white elementary area or vice versa, the content in the counter is read out in response to high-speed clock pulses and transferred into a transmitter buffer. In this case, a bit in each of specific bit positions in the buffer is replaced by a discrimination bit discriminating white or black elementary areas from black or white elementary areas.

FIG. 1 is a table of some examples of the binary coded signals representing run-lengths according to the methods of the prior art and the present invention;

FIG. 2 comprises FIGS. 2A and 2B and is a block diagram of a facsimile transmitter incorporating the present invention;

FIG. 3 is a time chart used for the explanation of the mode of operation thereof; and

FIG. 4 comprises FIGS. 4A and 4B and is a detailed diagram of a run-length counter and its associated circuits forming a part of the transmitter shown in FIG. 2.

First referring to FIG. 1, the underlying principle of the present invention will be described. When a run-length of white or black elementary areas is represented by a pure binary number and discrimination bits are inserted between every two bits in a bit group, white elementary areas which continue for instance 20 bits in succession may be given by

bit pattern: 0 0 1 0 0 1 0 0 0

where

0 = discrimination bit representing white elementary areas, and

1 = discrimination bit representing black elementary areas.

It is seen that 20 bits representing 20 white elementary areas in succession may be represented only by 9 bits. In general, the code compression uses the following weights in order to weight the bits representing the run-lengths: ##STR1## Furthermore, the discrimination bits are weighted in the following manner: ##STR2## Then 20 bits representing 20 white elementary areas may be compressed as follows:

bit pattern: 0 1 1 0 1 1

That is, 20 white elementary areas may be compressed in code to only six bits so that the code compression ratio may be improved, as compared with the code compression method given by Eq. (1). In order to represent black elementary areas, the discrimination bit 1 is inserted instead of the discrimination bit 0.

Instead of the code compression method given by Eq. (2), the following code compression method may be used: ##STR3##

The run-lengths of white elementary areas coded by the above three code compression methods are shown in FIG. 1. It is readily seen that the compression ratio may be considerably improved when the data compression method (2) or (3) is employed than when the code compression method (1). In case of the code compression method (2), the compression ratio may be remarkably improved especially when the run-length is longer while the compression ratio may be improved when the run-lengths are relatively shorter in case of the code compression method (3). In general the run-lengths of white elementary areas of pictures or images are longer than those of black elementary areas so that it is readily seen that when the code compression method (2) is used to represent the run-lengths of white elementary areas while the code compression method (3) is used to represent the run-lengths of black elementary areas, the code compression of video information may be remarkably improved.

FIG. 2 shows in block diagram a facsimile transmitter incorporating the code compression method in accord with the present invention. The data transient, that is the transient from a white elementary area to a black elementary area or vice versa is detected by the comparison with the data which is delayed by one-half of pulse-recurrence frequency of quantization pulses from the quantized video information. A run-length is counted between the data transient and transferred into a buffer register together with a discrimination bit. The repetition rate of clock pulse which are used for coding is considerably higher than that of the pulses used for quantization, so that the coding is accomplished within one pulse-recurrence frequency of quantization pulses.

Next referring to FIGS. 2 and 3, the mode of operation of the facsimile transmitter will be described hereinafter. The output of a scanner 1, which scans a subject copy A, is amplified by an amplifier 2 as shown at (a) in FIG. 3 and shaped by a switching circuit 3 as shown at (b) in FIG. 3. The timing pulses which are generated by a pulse generator 4, amplified by a pulse amplifier 5 and shaped by a switching circuit 6 as shown at (c) in FIG. 3 are used as pulses for quantization to be referred as "quantization pulses" in this specification. A flip-flop 7 is adapted to quantize the video information b in response to the leading edges of the quantization pulses c as shown at (d) in FIG. 3. A second flip-flop 8 is adapted to provide in response to the trailing edges of the quantization pulses c the video information which is delayed from the quantized video information d by one half of a pulse-recurrence frequency of quantization pulses. The output of the second flip-flop 8 is used as a discrimination signal for discriminating white or black elementary areas.

The quantization pulses are transmitted through an inverter 14 to one-shot multivibrator 15 so that the run-length counting pulses as shown at (e) in FIG. 3 may be produced. The counting pulses e are transmitted to a counter 16 which counts the run-length of white or black elementary areas of the master copy A.

A flip-flop 10 is set in response to the leading edge of the quantization pulse and is reset in response to the trailing edge thereof so that a high-frequency pulse oscillator 11 is actuated. The repetition rate of the output pulses of the high-frequency oscillator 11 is higher than that of the quantization clock pulses c as shown at (f) in FIG. 3.

When the quantized video information d changes from "0" to "1" or from "1" to "0", an exclusive OR gate 9 provides a logic "1" signal, which is transmitted through a gate 12 in response to the output pulse f of the oscillator 11 to a clock counter 13 as shown at (g) in FIG. 3. The clock counter 13 is connected through output lines l.sub.1 to specific digit positions, that is, the positions of the discrimination bit "1"s or "0"s of the run-length counter 16. The signal on the line l.sub.1 designates the number of steps of the counter 13 so that when the latter counts a predetermined number of bits, it automatically stops counting. In synchronism with the steps of the counter 13, "1" signals are sequentially transmitted through output lines l.sub.2 so that corresponding gates 17 are opened. Therefore, the contents in a predetermined number of digit places in the run-length counter 16 are transferred in serial through the corresponding gates 17 and an OR gate 18 into a transmission buffer 19.

The output of the flip-flop 8 is also connected to specific gates 17 so that when the output of the flip-flop 8 is "0" or "1", the binary bit "0" or "1" is forced to be stored in the digit place in the buffer 19 which corresponds said specific gate 17. Therefore, the discrimination bit "0" or "1" is provided. When the counter 13 has counted a predetermined number of pulses, it provides a reset signal on an output line l.sub.3 so that both the flip-flop 10 and the run-length counter 16 are reset. Thereafter, the run-length counter 16 starts counting from the next counting pulse e transmitted from the one-shot multivibrator 15.

In FIG. 3, the shift pulses transmitted to the buffer 19 in synchronism with the stepping of the counter 13 are shown at (h); and the reset pulse transmitted through the output line l.sub.3 from the counter 13 is shown at (i). The content of the buffer 19 is transmitted through a line L at a predetermined rate.

FIG. 4 is a detailed circuit diagram of the counter 16 with its associated circuit components. As described above, the counter 16 is stepped in response to the output e of the one-shot multivibrator 15, and is cleared in response to the reset pulse transmitted through the output line l.sub.3 from the counter 13. The run-length counter 16 is so arranged as to step based upon the code compression method (2) shown in FIG. 1. That is, flip-flops 1, 4, 7 and 10 and correspond to the bit places where discrimination bits appear. In response to the signals transmitted through the output lines l.sub.1, the counter 13 (See FIG. 2) stops counting after having counted three bits when only the flip-flop FF.sub.1 is set. In this case, the logic "1"s are sequentially transmitted only through the output lines l.sub.2-1, l.sub.2-2 and l.sub.2-3, and the contents in the flip-flops FF.sub.1 FF.sub.2 and FF.sub.3 are transferred into the buffer 19 through the AND and OR gates 17 and 18. However, instead of the content of the flip-flop FF.sub.1, the content of the flip-flop 8 (See FIG. 2) is transferred into the position of the content of the flip-flop FF.sub.1 in the buffer 19 as the discrimination bit. In like manner, when the flip-flop FF.sub.4 is set, the six-bit step instruction is transmitted through the output line l.sub.1 to the counter 13. In like manner, when the flip-flops FF.sub.7 is set, the counter 13 counts 9 bits, and when the flip-flop 10 is set, the counter 13 counts 12 bits as will be readily understood from the foregoing description.