US 4,048,480 AGrant

Generators of Anharmonic Binary Sequences

Issue Date:1977-09-13

•6 Claims

•9 Drawing Sheets

Abstract

Generators of anharmonic binary sequences having predetermined harmonics equal to zero. Orders and modes of anharmonicity are defined. Generators are disclosed, permitting to generate sequences anharmonic at successive determined orders according to previously selected modes.

Metadata

Inventor

Pierre J. M. Minot

Application Information

Application Number:US 6819117

Filing Date:1976-04-30

Priority Date:1975-04-30

Art Unit:236

Classifications

IPC:

G06F 1534

Field of Search:

23584152;1561.01;1.03;1.22

Patent Drawings (9 sheets)

Description

BACKGROUND OF THE INVENTION

The present invention generally concerns means for generating binary sequences approximating a sine function and more particularly means for generating binary sequences having spectra whose line amplitudes up to a given harmonic order have zero values.

These binary sequences will be called in the following anharmonic sequences since their first, second . . . k.sup.th (k being selected at will) harmonics are equal to zero.

Let us consider a sequence of N non return to zero binary digits, the duration of the digits being 1/f and the duration T of the sequence being ##EQU1## AND LET US DESIGNATE BY S.sub.I THE BINARY VALUE OF THE I.sup.TH DIGIT OF THE SEQUENCE (0 .ltoreq. I .ltoreq. N-1).

The sequence can be expanded into a Fourier series: ##EQU2## WHERE J= .sqroot.-1 AND THE AMPLITUDE OF THE SPECTRUM LINE OF ORDER K S(kF) is given by: ##EQU3## The first factor in the second side of equation (1) is typically a sin x/x digital waveform signal which vanishes when the order k of the harmonic is equal to the number of bits N of the sequence or a multiple of this number whichever be the selected sequence. The second term in this second side ##EQU4## denotes the sum of N complex numbers of modulus 0 or 1.

Sequences can be selected in such a way that the amplitude of a harmonic of predetermined order k vanishes. As indicated in the foregoing, it will be said that such a sequence is anharmonic at said predetermined order or orders.

The method for defining these anharmonic sequences is apparently new and will be detailed in two sections according to the approach involved.

SECTION 1 Representation of Sequences by a Vectorial Approach

The k.sup.th line of the spectrum of a sequence of N bits can be represented by a vectorial pattern comprising as many vectors as nonzero bits in the sequence, the vector representing the bit of serial number i in the sequence having an argument equal to 2.pi.ik/N.

First Example

(FIGS. 1a to 1e)

Referring in anticipation to FIGS. 1a to 1e, FIG. 1a represents the fundamental harmonic of the spectrum of the sequence

the representation comprises two vectors having a modulus equal to unity and arguments equal to 2.pi.ik/N with k=1 and i=0 and 2, i.e. arguments equal to 0 and 4.pi./5.

The second harmonic of the sequence is represented in FIG. 1b by two vectors having a modulus equal to unity and arguments equal to (2.pi./N).times.k.times.i with k=2 and i=0 and 2, i.e. 0 and 8.pi./5.

The third harmonic of the sequence is represented in FIG. 1c by two vectors having a modulus equal to unity and arguments equal to (2.pi./N).times.k.times.i with k=3 and i=0 and 2, i.e. 0 and 12.pi./5 = 2.pi./5.

The fourth harmonic of the sequence is represented in FIG. 1d by two vectors having a moudlus equal to unity and arguments equal to (2.pi./N).times.k.times.i with k=4 and i=0 and 2, i.e. 0 and 16.pi./5 = 6.pi./5.

Finally, one finds in FIG. 1e that the 5.sup.th line of the spectrum is represented by two superimposed vectors of modulus equal to unity and arguments soth equal to zero, i.e. by a vector of modulus equal to 2 and argument equal to zero.

In FIGS. 1a to 1e, the resultant of the two vectors is never zero and therefore sequence (2) has no anharmonicity in any order from 1 to 5 inclusively.

Second Example

(FIGS. 2a and 2b)

Let us take now the bit sequence

its fundamental harmonic (FIG. 2a) comprises four unity vectors of arguments 0, (2.pi./8).times. 2, (2.pi./8).times. 3 and (2.pi./8).times. 5 and its second harmonic (FIG. 2b) comprises four unity vectors of arguments 0, (2.pi./8).times.2.times.2=.pi. (2.pi./8).times. 3.times. 2 = (3.pi./2) and (2.pi./8).times. 5.times. 2= (5.pi./2)= .pi./2) (modulo 2.pi.). The sum of the four vectors in FIG. 2b is equal to zero and sequence (3) is therefore anharmonic at order 2.

Third Example

(FIGS. 3a and 3b)

Let us last of all take the bit sequence

its fundamental harmonic (FIG. 3a) comprises five unity vectors of arguments:

and its second harmonic (FIG. 3b) comprises five unity vectors of arguments ##EQU5##

The sum of the five vectors of FIG. 3b is equal to zero since the three vectors of arguments 0, 2.pi./3 and 4.pi./3 are three-phased and the two vectors of arguments .pi. and 2.pi. are two-phased. Therefore, sequence (4) is anharmonic at order 2.

Theorem

A sequence anharmonic at order k has a number of bits multiple of k.

Definition of the Anharmonicity Mode

The vectorial diagram of a k-order anharmonic sequence comprises a set of vectors whose resultant is zero. It may occur that the vector set can be partitioned into subsets of vectors whose resultants are zero. For example, two opposite vectors, three three-phased vectors, four four-phased vectors have a zero resultant. The number of vectors of a zero resultant set or subset of vectors is called the anharmonicity mode. The numbers which define the anharmonicity modes are prime numbers.

The modes of the anharmonicity of order 2 in FIG. 2b is 2 and 2. The mode of the anharmonicity of order 2 in FIG. 3b is 2 and 3. In the following, the order of anharmonicity will be denoted by k and the mode of anharmonicity will be denoted by p.

Induced Anharmonicity

It can be proved that if a sequence is anharmonic at order k according to mode p, it is also anharmonic at order nk according to mode p, n being a positive integer non multiple of p. Therefore anharmonicity of a sequence at certain orders according to a given mode involves anharmonicity at other higher orders. These higher order anharmonicities are called induced anharmonicities.

The following table gives for anharmonicity modes p = 2, 3 and 5, the lower anharmonicity orders k and the higher induced anharmonicity orders nk:

SECTION 2 Representation of Sequences by a

"Polynomials over Finite Fields"--Approach

A digital sequence can be represented by an associated polynomial ##EQU6## through the transformation of variable e.sup.-2.pi.j/N to variable X. These polynomials are defined over a two element Galois field. For example, the sequence

is represented by the polynomial

the polynomial associated to the k-order harmonic of the sequence is the polynomial ##EQU7##

SUMMARY OF THE INVENTION

The object of the invention is to synthetize binary sequences deerived from a given starting binary sequence and having, further to the anharmonicities of said starting sequence, an anharmonicity at order k according to mode p.

Another object of the invention is to synthetize binary sequences derived from a given starting sequence already anharmonic at order k.sub.1, k.sub.2, . . . k.sub.m-1 according respectively to modes p.sub.1, p.sub.2, . . . p.sub.m-1, and having a further anharmonicity at the order k.sub.m according to a mode p.sub.m.

Another object of the invention is to provide amplitude modulation means in which both the carrier signal and the modulating signal are anharmonic.

Synthesis of Anharmonic Sequences by Vectorial Approach

Let us assume that a sequence having or not having predetermined anharmonicities at certain orders and according to certain modes is to be given a first anharmonicity or an additional anharmonicity at an order k according to a mode p, the order k being higher than the higher anharmonicity order it already may present. The starting sequence is vectorially plotted on a first figure. One superimposes to this figure (p-1) additional figures derived from the former by rotating the same through angles ##EQU8## where .alpha..sub.1, .alpha..sub.2, . . . .alpha..sub.p-1 are integers.

The figure resulting from these superimpositions represents the searched sequence.

According to the invention, the means for generating a N-bit sequence anharmonic at orders k.sub.1, K.sub.2, . . . K.sub.m according to modes p.sub.1, p.sub.2, . . . p.sub.m starting from a binary sequence of N' bits anharmonic at orders k.sub.1, k.sub.2, . . . k.sub.m-1 according to modes p.sub.1, p.sub.2, . . . p.sub.m-1 comprises:

i. means to compute the permissible modes p.sub.m for the sequence to be generated according to the following exclusion rule: ##EQU9## r.sub.i being an integer within the interval )-p.sub.i, +p.sub.i (

ii. means for determining the number N of bits of the searched sequence given by the relationship

where LCM = less common multiple.

iii. means for deriving from the N'-bit sequence an intermediary sequence by replacing in the N'-bit sequence any bit one by a bit one followed by [(N/N')-1] bits zero and any bit zero by (N/N') zeros.

iv. means for successively shifting the intermediary sequence by N/k.sub.m p.sub.m bits and means for adding p.sub.m so shifted sequences.

Synthesis of Anharmonic Sequences by Polynomial Approach

The polynomial associated to a sequence derived from a starting sequence and anharmonic at order k according to mode p is equal to the product of the polynomial associated to the starting sequence by the polynomial ##EQU10## where the .beta..sub.i coefficients are integers and N = LCM (N', kp).

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be more fully appreciated from the following detailed description when considered in connection with the accompanying drawings in which:

FIGS. 1a to 1e, 2a and 2b, 3a and 3b are circle diagram representations of binary sequences and have already been explained in the introductory part of the specification;

FIGS. 4a to 4c represent a first example of vectorial synthesis relative to a 30-bit sequence;

FIGS. 5a to 5g represent two other examples of vectorial synthesis respectively relative to a 12-bit sequence and a 24-bit sequence;

FIGS. 6a and 6b are circle diagrams for proving the properties of even sequences;

FIG. 7 represents in block diagram form a synthetizer for generating sine sequences by the vectorial approach;

FIG. 8 represents an anharmonic sequence generator in which the bits of the sequence are contained at successive addresses in a read only memory;

FIGS. 9 to 12 represent anharmonic sequence generators formed of shift registers presenting exclusive OR-gate loops, the looping pattern depending on the polynomials associated with the sequences;

FIG. 13 represents an amplitude modulator using anharmonic sequence generators;

FIG. 14 represents a phase modulator using anharmonic sequence generator;

FIG. 15 represents a device for measuring the harmonic 3 distorsion factor of four-terminal networks; and

FIG. 16 represents an anharmonic sequence generator formed of a shift register presenting exclusive OR-gate loops, the looping pattern depending on the characteristic polynomials of the sequences.

DETAILED DESCRIPTION

Vectorial Synthesis

First Example (30-bit sequence)

Let us take again as starting sequence, the sequence

which is represented in FIG. 4a identical to FIG. 1a and let us search a sequence derived from the preceding one and anharmonic at order 3 according to mode 2. The vectorial pattern of FIG. 4a is allowed to rotate by an angle ##EQU11## which gives FIG. 4b with two vectors having respective arguments of .pi./3 and (4.pi./5) + (.pi./3) = 17.pi./15. The resulting sequence has

and is represented in FIG. 4c which is the superimposition of FIGS. 4a and 4b. It reads

second Example (12-bit sequence)

Synthesis of a 12-bit sequence anharmonic at orders 2 and 3 according to mode 2. Thus k.sub.1 = 2; k.sub.2 = 3; p.sub.1 = 2; p.sub.2 = 2.

Let us take as starting sequence (see FIG. 5a)

one superimposes to FIG. 5a, FIG. 5b derived from FIG. 5a, through a rotation of ##EQU12## which gives FIG. 5c and one superimposes to FIG. 5c, FIG. 5d derived from FIG. 5c, through a rotation of ##EQU13##

Superimposition of FIG. 5c and FIG. 5d gives FIG. 5e which represents the sequence

The found sequence has a number of bits equal to

third Example (24-bit sequence)

Synthesis of a 24-bit sequence anharmonic at orders 2, 3 and 4 according to mode 2.

Thus k.sub.1 = 2; k.sub.2 = 3; k.sub.3 = 4; p.sub.1 = p.sub.2 = p.sub.3 = 2. Let us take as starting sequence (see FIG. 5e)

which is already anharmonic at orders 2 and 3 according to mode 2.

One superimposes to FIG. 5e, FIG. 5f derived from FIG. 5e through a rotation of ##EQU14## which gives 5g. This latter figure represents the sequence

the number N is equal to

fourth Example (24-bit sequence)

This example is the same as the third example starting sequence ##EQU15## and it is treated according to the general process of the Vectorial Approach including steps (i) to (iv):

i. checking that p.sub.m = 2 is permissible according to the exclusion rule ##EQU16##

There is not any set of r's values which can bring to zero the bracketed member of the second side of the previous equation;

ii. computing the number N of bits of the sought sequence

iii. replacing in sequence (7) any bit one by a bit one followed by (N/N')-1 = (24/12)-1 = 1 bit zero and any bit zero by (N/N') = (24/12) = 2 zeros, thus obtaining the intermediary sequence: ##EQU17##

iv. successively shifting the intermediary sequence per N/k.sub.3 p.sub.3 = 24/8 = 3 bits and adding p.sub.3 = 2 shifted intermediary sequences: ##EQU18##

Referring now to FIG. 7, 11 represents an input sequence register, 12 an input sequence length register, 13 an anharmonicity order register and 14 an anharmonicity mode register. The starting sequence is entered into register 11, the length N' of this starting sequence is entered into register 12, the anharmonicity order k is entered into register 13 and the anharmonicity mode p is entered into register 14.

Registers 13 and 14 are connected to a multiplier circuit 15 and register 12 and multiplier circuit 15 are connected to a least common multiple (LCM) generator 16. This LCM generator gives the number of bits N in the sequence to be generated. The numbers N and N' respectively provided by register 12 and LCM generator 16 are applied to a divider circuit 17 which supplies the ratio N/N'. This ratio is applied to a time base 18.

Time base 18 is driven by clock 19 and it is controlled by divider circuit 17 which sends it the signal N/N' and by multiplier circuit 15 which sends it the signal kp. Time base 18 sends timing pulses at a base rate to input sequence register 11 and timing pulses at a higher rate equal to N/N' times the base rate to substitution registers 20 and 21. One of these two registers is selectively activated by the outgoing digit from register 11 and it is stepped on by the higher rate timing pulses. Substitution register 20 contains a one in its first stage followed by zeros in its subsequent stages. Substitution register 21 contains zeros in all its stages. When substitution register 20 has output a one followed by [(N/N') - 1] zeros it is reloaded with a bit one in its first stage under the control of time base 18. Substitution registers 20 and 21 are connected through an OR-gate 22 to a plurality of intermediary sequence registers 23, 24, 25. Register 23 is an unlooped shift register and registers 24 and 25 are looped shift registers. Circulation in registers 24 and 25 is controlled by register circulation circuits 26 and 27 and these circuits are controlled by time base 18.

The contents of intermediary sequence registers 23, 24, 25 are added in adding circuit 28 and the sum is registered in output sequence register 29. This sum is the sought anharmonic sequence.

Polynomial Synthesis

First Example (30-bit sequence)

It is the same example as the first example of the Vectorial Synthesis. ##EQU19##

Polynomial associated with the starting sequence (the variable is x.sup.N/N' = x.sup.6):

Polynomial associated with the searched anharmonic sequence ##EQU20##

The anharmonic sequence is:

second Example (12-bit sequence)

It is the same example as the second example of the Vectorial Synthesis. ##EQU21## Polynomial associated with the starting sequence

Polynomial associated with the searched anharmonic sequence ##EQU22##

The anharmonic sequence is:

Third Example (24-bit sequence)

It is the same example as the third example of the Vectorial Synthesis. ##EQU23## Polynomial associated with the starting sequence (the variable is x.sup.N/N' = x.sup.2):

Polynomial associated with the searched anharmonic sequence ##EQU24##

The anharmonic sequence is:

cyclotomic Polynomial of an Anharmonic Sequence

The polynomial ##EQU25## by which the polynomial associated with the starting sequence is to be multiplied for obtaining the polynomial associated with the anharmonic sequence is nothing else than the so-called cyclotomic polynomial

The cyclotomic polynomials are defined and their properties are proved in "Algebraic Coding Theory" by Elwin R. BERLEKAMP, McGraw-Hill Book Company, pages 90-95.

The polynomial associated with a sequence anharmonic at orders k.sub.m according to modes p.sub.m can be written ##EQU26## with

Definition of the Characteristic Polynomial Associated with a Sequence

Let us consider a sequence s.sub.i of N bits and its associated polynomial ##EQU27##

The associated polynomial remains the same disregarding the circular permutations applied to the sequence. Writing the last term of the sequence as the first term thereof, one finds:

let us call characteristic polynomial CP of the sequence, the polynomial ##EQU28## and initialization polynomial IP of the sequence the polynomial ##EQU29## GCD = greatest common divisor.

Circular permutation relationship (12) gives:

relationship (15) shows that the coefficient s.sub.i of polynomial P can be obtained by means of a shift register looped by exclusive OR-gates according to the characteristic polynomial and initialized by the initialization polynomial

First Example (30-bit sequence)

Polynomial associated with the sequence:

let us factor the polynomial P and the polynomial 1 + X.sup.N = 1 + X.sup.30. Keeping in mind that these polynominals are defined over a two element Galois field, this gives: ##EQU30##

Second Example (12-bit sequence)

Polynomial associated with the sequence:

let us factor the polynomial P and the polynomial 1 + X.sup.N = 1 + X.sup.12. This gives: ##EQU31##

In this case GCD (1 + X.sup.12, P) = P ##EQU32## Third Example (24-bit sequence)

Polynomial associated with the sequence:

let us factor the polynomial P and the polynomial 1 + X.sup.N = 1 + X.sub.24. This gives: ##EQU33##

Referring now to FIG. 16, 70 is a shift register receiving from a clock steeping-on pulses and from an initialization register (not represented) an initialization sequence. This shift register has seven stages 701-707, some of which are connected to the following stage through an exclusive OR-gate, namely 712, 713, 714, 715. The output of stage 707 is looped to the input of stage 701 by lead 710. Lead 710 is connected to the second input of OR-gates 712-715. It appears to those skilled in Algebraic Coding Theory that shift register 70 is associated to characteristic polynomial (18) and, if it is initialized by polynomial (19), it will generate polynomial (10).

To make clear how the shift register is formed depending on the characteristic polynomial, let us describe the shift register associated to characteristic polynomial (20). It will comprise 11 stages and exclusive OR-gates between the third and fourth, the fourth and fifth, the seventh and eighth, the eighth and ninth stages.

With reference to FIGS. 9-12, we shall explain how to derive a shift register assembly from the polynomial associated to the sequence and not from the characteristic polynomial.

FIG. 9 is relative to a sequence with a pair "order-mode" only.

A N-bit sequence is entered into a shift register 35 (FIG. 9) having (p-1)N/kp stages and one output and (p-2) intermediary outputs. The outputs are spaced apart every group of N/kp stages. The input and the (p-1) outputs are connected to an OR-gate 36 at the output of which the sought sequence is produced. The input and outputs of shift register 35 are also connected to a circuit 37 which counts the number of its input terminals which are simultaneously brought to the one level. If at least two terminals carry a one, the exclusive rule is not complied with and the sought sequence cannot be found.

FIG. 10 is an application of FIG. 9 to the 12-bit sequence which has two pairs "order-mode":

The sequence generator comprises a first shift register 40 with (p.sub.1 -1)N/k.sub.1 p.sub.1 = 3 stages and a second shift register 41 with (p.sub.2 -1)N/k.sub.2 p.sub.2 = 2 stages. The input and the output of shift register 40 are connected to exclusive OR-gate 42 and the output of said OR-gate is connected to the input of shift register 41. The input and the output of shift register 41 are connected to exclusive OR-gate 43 and, at the output of said OR-gate, the 12-bit sought anharmonic sequence if found.

FIG. 11 is an application of FIG. 9 to the 24-bit sequence which has three pairs "order-mode": ______________________________________ k.sub.1 = 2 p.sub.1 = 2 N/k.sub.1 p.sub.1 = 6 k.sub.2 = 3 p.sub.2 = 2 N/k.sub.2 p.sub.2 = 4 k.sub.3 = 4 p.sub.3 = 2 N/k.sub.3 p.sub.3 = 3 ______________________________________

The sequence generator comprises a first shift register 44 with (p.sub.1 -1)N/k.sub.1 p.sub.1 = 6 stages, a second shift register 45 with (p.sub.2 -1)N/k.sub.2 p.sub.2 = 4 stages and a third shift register 46 with (p.sub.3 -1)N/k.sub.3 p.sub.3 = 3 stages. The input and the output of shift register 44 are connected to exclusive OR-gate 47 and the output of the same is connected to shift register 45. The input and output of shift register 45 are connected to exclusive OR-gate 48 and the output of the same of connected to shift register 46. The input and output of shift register 46 are connected to exclusive OR-gate 49 and at the output of said OR-gate the 24-bit sought anharmonic sequence is found.

FIG. 12 is an application of FIG. 9 to a 30-bit sequence. This sequence is not that already considered in the foregoing but it is the sequence which is tabulated in table 5. It has two pairs "order-mode": ______________________________________ k.sub.1 = 2 p.sub.1 = 3 N/k.sub.1 p.sub.1 = 5 k.sub.2 = 3 p.sub.2 = 5 N/k.sub.2 p.sub.2 = 2 ______________________________________

Shift register 50 has 10 stages and two outputs. Shift register 51 has eight stages and four outputs. The input and the two outputs of shift register 50 are connected to exclusive OR-gate 52. The output of this OR-gate is connected to shift register 51. The input and the four outputs of shift register 51 are connected to exclusive OR-gate 53. At the output of said OR-gate the 30-bit sought anharmonic sequence is found.

Now, the principal anharmonic sequences of at most 1050 bits will be given in tables Nos. 1-19. Each table gives the modulus in linear fraction and in decibels of the nonzero harmonics of the sequence. A recapitulory table gives, for each sequence, its length, the first nonzero harmonic, the orders and the modes, and a reference to the sequence table in which it is tabulated.

All the sequences listed in the tables are even sequences which present particular properties.

Even Sequences (FIGS. 6a and 6b)

An even sequence is a sequence whose circle diagram corresponding to the fundamental harmonic S(F) has a diameter as symmetry axis and the center of the circle as antisymmetry center. I results that the even sequences have as many zero bits as one bits.

The even sequences are anharmonic at all the even orders. The product of the modes of anharmonicity of an even sequence is equal to half its number of bits:

referring now to FIG. 8, a generator of anharmonic sequences comprises a clock 30, an address counter 31 counting up to the number N of bits of the sequence and a read only store 32 containing at the addresses given by counter 31 the bits of the sequence. The output of store 32 is connected to a type-D flip-flop 33 controlled by the clock and which serves for stepping on the bits supplied by the store. If the sine sequence is to be converted into an analog sine signal, a low-pass filter 34 is connected to flip flop 33.

FIG. 13 represents a digital amplitude modulator employing anharmonic sequence generators and having a harmonic distorsion as small as one's will. Reference numberals 54 and 55 designate two anharmonic sequence generators of numbers of bits N and N' driven by a clock (not represented). The outputs of the two generators are connected to an exclusive OR-gate 56. The output signal of the OR-gate has a spectrum formed of two lines without any other undesirable lines.

FIG. 14 represents a digital phase modulator employing an anharmonic sequence generator. The generator is of the type of FIG. 8 and comprises a clock (not represented), a counter 57, a read only memory 58 containing the sequence and a D-type flipflop 60. Between counter 57 and read only memory 58 is inserted an adding circuit 59 which adds the address supplied by the counter and the digital value of the modulation signal. It is clear that the phase of the sine digital sequence is controlled by the modulation signal.

FIG. 15 represents an analyzer of third harmonic. The anharmonic sequence generators 62 and 64 are driven by the same clock (not represented), the first through a frequency divider by 3 and the second directly. It results that the output signal of 64 is exactly the third harmonic of the output signal of 62. A low-pass filter 63 is connected at the output of generator 62. The outputs of filter 63 and anharmonic sequence generator 64 are connected to a switch 65 followed by a low-pass filter 66 and an apparatus to be tested can be inserted in the path between 63 and 65. Actuation of switch 65 allows to receive selectively the third harmonic generated by generator 64 or the third harmonic supplied by the tested apparatus. The distorsion factor for harmonic 3 of the apparatus can thus be determined.

Claims

I claim:

1. A generator of anharmonic binary sequences having N bits and harmonics of orders k.sub.1, k.sub.2. . . k.sub.m equal to zeros according respectively to modes p.sub.1, p.sub.2. . . p.sub.m derived from a starting anharmonic binary sequence having N' bits and harmonics of orders k.sub.1, k.sub.2. . . k.sub.m-1 equal to zeros according respectively to modes p.sub.1, p.sub.2. . . p.sub.m-1, said generator comprising: a. means for computing a number N equal to the least common multiple of the number N' and the product k.sub.m p.sub.m ; b. means for deriving from the starting anharmonic binary sequence with N' bits an intermediary binary sequence by substituting each one bit of the starting sequence by a one bit followed by (N/N')-1 zero bits and each zero bit of the starting sequence by N/N' zero bits; c. means for shifting said intermediary binary sequence successively by N/k.sub.m p.sub.m, 2(N/k.sub.m p.sub.m). . . (p.sub.m -1)(N/k.sub.m p.sub.m) bits, thereby obtaining (p.sub.m -1) shifted binary sequences; and d. means for adding p.sub.m binary sequences, said p.sub.m binary sequences being said (p.sub.m -1) shifted binary sequences and said intermediary binary sequence.

2. A generator of anharmonic binary sequences according to claim 1, further comprising a device for chacking the permissibility of a selected mode p.sub.m, said device comprising a. multiplication means for performing the m products k.sub.i p.sub.i of the order of anharmonicity k.sub.i by the related mode p.sub.i, the i subscrit being successively equal to the m following values: 1, 2 . . . m; b. fraction calculation means for performing, for each i value, all the 2p.sub.i -1 fractions corresponding to a particular i value, whose denominators are said k.sub.i p.sub.i products and whose numerators are successively all the positive and negative integers comprised between -p.sub.i and +p.sub.i ; c. addition means for adding m fractions, said m fractions being successively chosen at the rate of one fraction in each group of said 2p.sub.i -1 fractions corresponding to a particular i value; and d. exclusion means for excluding p.sub.m as selected mode when an addition of said m fractions is equal to zero.

3. A generator of anharmonic binary sequences having N bits and harmonics of orders k.sub.i, k.sub.2. . . k.sub.m equal to zero according respectively to modes p.sub.1, p.sub.2. . . p.sub.m derived from a starting anharmonic binary sequence having N' bits and harmonics of orders k.sub.1, k.sub.2. . . k.sub.m-1 equal to zero according respectively to modes p.sub.1, p.sub.2. . . p.sub.m-1, said generator comprising: a. means for computing a number N equal to the least common multiple of the number N' and the product k.sub.m p.sub.m ; b. a shift register having N stages and (p.sub.m -1) outputs spaced apart every N/k.sub.m p.sub.m stages; c. means for applying to said shift register a sequence of N bits formed of the sequence of N' bits followed by (N-N') zeros; and d. an OR-gate connected to the input and outputs of said shift register.

4. A generator of anharmonic binary sequences according to claim 3, further comprising an inhibiting circuit having inputs connected to the input and outputs of the shift register and generating an inhibiting signal when at least two of its inputs simultaneously conveyed a one bit.

5. A generator of anharmonic binary sequences having N bits and harmonics of orders k.sub.1, k.sub.2. . . k.sub.m equal to zero according respectively to modes p.sub.1, p.sub.2 . . . p.sub.m comprising: a. means for computing a number N equal to the least common multiple of the products k.sub.1 p.sub.1, k.sub.2 p.sub.2. . . k.sub.m p.sub.m ; b. m shift registers, the i.sup.th shift register having (p.sub.i - 1)(N/k.sub.i p.sub.i) stages and (p.sub.i -1) outputs spaced apart every (N/k.sub.i p.sub.i) stages, the i index being successively equal to the m following values: 1, 2. . . m; c. means for applying to said first shift register a sequence of N bits formed by a one followed by N - 1) zeros; d. m OR-gates, the i.sup.th OR-gate being connected to the input and outputs of said i.sup.th shift register; and e. means for applying to said second, third . . . m.sup.th shift register, the output signal of said first, second . . . (m - 1).sup.th OR-gate, respectively.

6. A generator of an anharmonic binary sequence of N bits, said sequence being associated with a polynomial .SIGMA.s.sub.i X.sup.i where the coefficients s.sub.i are respectively equal to the binary values of the terms of serial number i in the sequence, i varying from 0 to (N-1), said generator comprising: a. means for deriving from the polynomial associated to the sequence a characteristic polynomial equal to the ratio of the polynomial 1+X.sup.N by the greatest common divisor of 1+X.sup.N and .SIGMA.s.sub.i X.sup.i ; b. means for deriving from the polynomial associated to the sequence an initialization polynomial equal to the ratio of the polynomial associated to the sequence by the greatest common divisor of 1+X.sup.N and .SIGMA.s.sub.i X.sup.i ; c. a shift register having stages respectively corresponding to the coefficients of the characteristic polynomial and being connected therebetween by direct connections corresponding to the zero coefficients of the characteristic polynomial and by exclusive OR-gates corresponding to the nonzero coefficients of the characteristic polynomial, said shift register being looped from its output together to the input thereof and said exclusive OR-gates inputs; and d. means to enter into said shift register binary digits equal to the coefficients of the initialization polynomial.

Patent Citations (3)

Patent	Date	Inventor
US3809788	1974-05-01	Deutsch
US3809789	1974-05-01	Deutch
US3888153	1975-06-01	Deutsch