Circuit for Squaring the Transfer Characteristics of a TTL Gate

This invention relates to integrated circuit logic devices and, more particularly, to a transistor switching circuit for switching from a high level voltage to a low level.

A standard transistor-transistor logic (TTL) gate is comprised of an input transistor which drives a phase splitter, the two outputs of which drive two output transistors which are joined together emitter to collector. An output voltage is taken at the junction. The transfer characteristic of this prior circuit does not switch immediately, but instead exhibits an undesirable slope near the point where the transition first starts to take place. The voltage initially drops to some intermediate level at a slope which is proportional to the ratio between the collector and emitter resistors of the phase splitter.

The prior art attempted to square off the voltage transfer characteristic by providing an active circuit pull-down at the base of the phase splitter transistor. This design suffers from the disadvantage that if the pull-down transistor is not matched with the output transistor, the active pull-down will increase propagation delays in the circuit.

It is therefore an object of this invention to provide a TTL gate with a square transfer characteristic and a resistive pull-down.

Briefly, the above object is accomplished in accordance with the invention by providing a transistor/resistor combination which is biased by the input transistor of a TTL gate to act as a current source for the emitter load resistor of the TTL circuit phase splitter.

The circuit has the advantage that the additional transistor is fabricated in the VCC tank along with the other resistors, so that in fabricating an integrated circuit a small die size can be used.

Additionally, since the base of the additional transistor is connected directly to the input resistor, the resistor can terminate directly into the base of the additional transistor and does not require a metal contact.

The circuit has the further advantage that it is easy to manufacture because only the inactive components, i.e., the additional resistor, need be matched with the other circuit elements of the TTL gate. This is an advantage over the prior art circuit which, by utilizing an active pull-down circuit, relied on matching the geometry of the active pull-down transistor with the output transistor of the TTL gate.

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.

FIG. 1 is a circuit diagram of a prior art TTL gate;

FIG. 2 is a circuit diagram of a TTL gate modified in accordance with Applicant's invention; and

FIG. 3 is a voltage waveform diagram illustrating circuit response characteristics with and without Applicant's invention.

Referring now to FIG. 1, when V.sub.in is at zero volts, the collector of Q.sub.met is approximately 0.2 volts. Thus, the transistor Q.sub.ps is turned off and its output collector is at V.sub.cc. V.sub.out is therefore at approximately VCC minus 1.5 volts. When V.sub.in rises to 0.6 volts, the collector of Q.sub.met will rise to about 0.8 volts which starts to turn on transistor Q.sub.ps. This starts to draw current through the collector which pulls the current through resistor R.sub.2 causing the collector of Q.sub.ps to drop in voltage. In turn, V.sub.out starts to drop. As the input voltage continues to rise, current is drawn through R.sub.1 and that current is coming through resistor R.sub.2. Therefore, the turn-on slope of the transfer characteristic at this point is R.sub.2 divided by R.sub.1. When the input voltage gets high enough, and the collector of Q.sub.met is equal to approximately 1.4 volts, there is enough voltage to turn on both Q.sub.ps and Q.sub.lop which causes the gate to change state completely and the output voltage drops down to 0.2 volts.

As shown in FIG. 3, there is a slope to the prior art transfer characteristic between approximately 0.5 volts and 1.3 volts.

This slope is an undesirable characteristic because it tends to hurt the noise immunity of the circuit since, for a given input voltage, the output voltage is not as high as it should be.

Referring now to FIG. 2, Applicant's invention will be described. The circuit of FIG. 2 is identical to the circuit of FIG. 1 with the addition of a transistor Q.sub.ef whose base is connected to the base of input transistor Q.sub.met and whose collector is connected to supply voltage V.sub.cc. The emitter of Q.sub.ef is connected to a resistor R.sub.3 which is connected to the emitter of the phase splitter Q.sub.ps.

In operation, when the voltage input rises to about 1.2 volts, the base of Q.sub.met is at approximately 1.9 volts, which causes the emitter of transistor Q.sub.ef to be at approximately 1.2 volts. The collector of Q.sub.met is at approximately 1.4 volts which causes the emitter of Q.sub.ps to be at approximately 0.7 volts. Since there is a voltage of 0.7 volts across the resistor R.sub.1, there is a current flowing through R.sub.1. Since resistor R.sub.3 is connected to R.sub.1 and it has 0.5 volts across it, most of the current supplied to R.sub.1 will be supplied through resistor R.sub.3 rather than from the phase splitter. Once the input voltage has reached a threshold point, both Q.sub.ps and Q.sub.lop turn on and clamp the base of Q.sub.met to approximately 2.1 volts which means that the current supplied through R.sub.3 will be constant from there on. All the rest of the current will then come out of the phase splitter Q.sub.ps and the end result is the square transfer characteristic shown in FIG. 3. In summary, the current rather than being supplied by Q.sub.ps to the resistor R.sub.1 is supplied through resistor R.sub.3 by the transistor action of Q.sub.ef, and if R.sub.1 and R.sub.3 are made approximately equal in value the transfer characteristic is substantially square.