Precision Amplitude Control System for a High Q Torsion Pendulum

The present invention relates broadly to control systems, and in particular to a precision amplitude control system for a high Q pendulum.

In the prior art, the requirements for the electrical control of pendulums are especially well known, particularly in the areas of electric clocks and similar devices. It is well-known that pendulum devices of high precision have been built but even in the best of these, it has not been possible to eliminate the effects of the variations in the driving impulses to the pendulum and the friction in the suspension. The use of feedback in prior basic electro-mechanical systems resulted in a reduction in Q for the circuit. Some control systems utilized continuous tachometer and position feedback devices that add undesirable damping functions which result in additional power loss in the system. The present invention provides a precision amplitude control apparatus which maintains high Q circuit and operates on reduced power consumption.

The present invention utilizes an oscillator with an amplitude regulation loop to drive a high Q torsion pendulum. The pendulum is driven by a brushless DC torque motor with feedback data provided by a shaft encoder. The encoder output pulses indicate when the pendulum is crossing through the zero reference position and through a preset reference amplitude. The processing in a pulse width loop shaping network maintains loop stability while detecting errors in peak amplitude. The motor is driven by a pulse width modulator that maintains motor excitation 90.degree. out of phase with pendulum position for optimum utilization of power. The loop automatically adjusts motor drive for variations in system Q.

It is one object of the present invention, therefore, to provide an improved amplitude control apparatus which utilizes a feedback loop and maintains a high Q system.

It is another object of the invention to provide an improved amplitude control apparatus utilizing non-continuous feedback data to maintain loop stability.

It is yet another object of the invention to provide an improved amplitude control apparatus having increased system reliability and reduced power consumption.

It is still another object of the invention to provide an improved amplitude control apparatus wherein peak amplitude is maintained to 0.2 milli-radians for a pendulum deflection of .+-. radian.

These and other advantages, objects and features of the invention will become more apparent from the following description taken in connection with the illustrative embodiment in the accompanying drawings.

FIG. 1 is a block diagram of the amplitude control apparatus in accordance with the present invention,

FIG. 2 is a schematic diagram of the amplitude control apparatus with the amplitude control loop,

FIG. 3 is a graphical representation of the start-up waveforms and a timing diagram for the amplitude control apparatus,

FIG. 4 is a graphical representation of the operating waveforms during amplitude regulation,

FIG. 5 is a schematic diagram of the pulse width integrator and stabilization network,

FIG. 6 is a graphical representation of the waveforms in the pulse width integrator and stabilization network,

FIG. 7 is a block diagram of the pulse width descriminator,

FIG. 8 is a graphical representation of the steady state waveforms of the pulse width descriminator, and

FIG. 9 is a graphical representation of the transfer function of the pulse width discriminator.

Referring now to FIG. 1, there is shown a block diagram of the amplitude control apparatus having an oscillator loop and an amplitude regulation loop.

The oscillator loop contains a high Q torsion pendulum which is driven by a brushless DC torque motor, both of which are contained in electro-mechanical unit 10. The frequency of oscillation is controlled solely by the mechanical constants .sqroot.K/J of the pendulum. Feedback signals, pulses at the zero reference amplitude, are derived from shaft encoder 12 which is connected to the pendulum and motor 10. The position signal is a positive pulse that occurs each time that the oscillator swings through the zero reference position. The amplitude signal is a positive pulse indicating that the oscillator amplitude is passing through a given reference amplitude. Since the amplitude signals occur near the peak of the oscillator swing, they occur in pulse pairs.

The pulse width modulator 20 which is connected to the pendulum and motor 10 comprises a reference generator 14 and a comparator/motor driven unit 16. Position feedback provides positive feedback for the oscillator loop by controlling the reference ramp generator 14 which is connected to the pulse width modulator motor driver 16. This reference ramp ensures that the pulse width modulator 20 will provide a motor drive voltage that lags the oscillator position by 90.degree., (motor drive pulses are centered about the zero reference position), to maintain the most efficient use of motor power. The oscillator is driven with full motor drive power until amplitude is increased to the point where amplitude feedback pulses occur. At this point, the amplitude loop is closed and begins to control pulse width modulator output which reduces motor drive to that required to maintain a constant preset pendulum amplitude.

The amplitude feedback occurs when a pair of overshoot pulses are generated indicating that the pendulum amplitude has exceeded that of the preset reference. Time spacing between the first and second pulses of each pair is a measure of pendulum amplitude. These pulses are generated each half cycle at the peaks of pendulum deflection. The control circuit 22 transforms each pulse pair into a pulse width whose average DC level is compared with an amplitude reference voltage to form an amplitude error signal. The magnitude of this reference voltage determines the actual regulation amplitude of the pendulum. The error signal is integrated, transformed into a pulse width and combined with the pendulum amplitude pulse width in a feed forward circuit 24 that controls the charge time of a hold circuit whose output is the control voltage for the pulse width modulator 20.

The hold circuit is discharged each time the first of the amplitude pulse pairs occur and is recharged until the second occurs. The start of the charge time is controlled by the output of the error detector. When the error detector output settles to a constant value the loop is operating with zero amplitude error.

If the second pulse of the overshoot pulse pair does not occur, indicating that peak amplitude is below the required regulation level, the hold circuit is not charged and motor continues to be driven with maximum drive. Initially, a few pendulum overshoots of greater than regulation amplitude are necessary to drive the error integrator from its initial value before complete amplitude control can occur.

Integration of the overshoot pulse widths is necessary to extract the average DC value. However, stability dictates that the amplitude control loop network have a zero slope in the region of loop crossover. Both of these conditions are satisfied by the unique integrator-pulse feedforward network that provides a true integration of the pulse widths but overall is effectively a zero slope at the crossover frequency of the loop. Use of the integrator as an error detector permits operation of the control loop with zero amplitude error for a range of electro-mechanical circuit Q's limited only by the capability of the drive motor.

There is shown in FIG. 3 the startup waveforms and timing diagram for the amplitude control apparatus and FIG. 4 illustrates the essential waveforms when operating at regulation amplitude. The waveforms of FIGS. 3 and 4 are referenced to the schematic diagram of the amplitude control apparatus shown in FIG. 2.

Turning now to FIG. 2, there is shown amplitude control apparatus which, before system startup and with the power on, is initialized and all inputs are at logic 0. The "0" OFF input performs the following four functions:

1. It provides a low input to turn on analog switch 1A which removes motor drive signal from the motor control #1 output to the motor power circuits.

2. It disables the auxiliary start multi-vibrator.

3. It holds the Flip Flop #1 in the reset condition through gate U2C.

4. It holds Flip Flop #2 in the reset condition through gate U1A.

At startup, OFF-ON input at terminal 10 is switched to a logic. 1. Immediately analog switch 1A opens to provide full drive to the motor power circuits and the auxiliary start multi is enabled. In addition, through gates U2B and U2D a wide set pulse is sent to Flip Flop #1 to start the reference ramp generator AR1 from its positive limit condition.

During system operation, zero crossing pulses are used to synchronize the free running, auxiliary start, multi that clocks flip flop #1 each time the system passes the zero reference position. In addition, it provides a reset pulse to flip flop #2 will already be in the reset condition each time that a zero crossing pulse is received. A position reference pulse is generated each time that the system deflects to the reference side. If necessary, it resets flip flop #1 to synchronize it with the system.

The amplitude feedback pulses provide the amplitude feedback that indicates when system motion is passing through a given reference amplitude. Since the amplitude feedback pulses occur near the peak of system motion, they occur in pulse pairs, onee each half cycle. The time spacing between the first and second pulse of each pair is a measure of system amplitude. The pulse pairs clock flip flop #2 to generate a pulse width equal to the spacing of successive pulses of each pair.

The reference ramp generator, AR-1 is driven by the output of flip flop #1, as it is clocked by the zero crossing pulse, and a negative reference. Its output is a positive and negative going ramp, symmetrical about zero. This is the reference voltage for the pulse width modulator motor drive. During startup, the pulse width modulator control voltage is held fixed to provide maximum motor drive. The pulse width modulator has two comparators AR-2 and AR-3 which compare the reference ramp and the control voltage. When the amplitude of the reference ramp exceeds the control voltage, a voltage supplied by the comparators drives the motor power circuits. The polarity of motor voltage is determined by the polarity of the reference ramp. The motor drive voltage is pulse width modulated by varying the amplitude of the control voltage.

The pulse detection circuit takes the pulse width outputs from flip flop #2 and extracts the average DC value to determine actual system amplitude. It compares this DC value with an amplitude reference voltage and integrates the resultant error signal in AR-5. At the start of each pulse width, integrator AR-6 ramps positive at a fixed rate. When the amplitude of this ramp exceeds the integrated error signal, the output of comparator AR-7 switches positive and through Nand gate U7D provides a logic 0 to the input of analog SW2A to charge the hold circuit from its initial condition state until the pulse width is toggled off by the second amplitude feedback pulse. The hold circuit output, the pulse width modulator control voltage, has now been updated for the next half cycle of system operation. At the start of each pulse width, i.e. when the first amplitude feedback pulse occurs, while the amplitude error signal is being integrated, a discharge pulse generated by a one shot gate (1/2 of U4A) and through inverter gate U4C provides a logic 0 pulse to discharge the hold circuit through analog switch 2A and return the pulse width modulator control voltage to its initial condition state.

In addition, a one shot using inverter gate U4D and the other half of U4A is reset at the start of each pulse width. If an amplitude feedback pulse pair is missed, once the system has been up to amplitude, this one-shot times out and discharges the hold circuit to provide full motor control voltage.

The regulation amplitude signal that indicates when amplitude control is functioning is taken from one shot input terminal on U4A. The signal at this circuit location is either being reset to a logic 1 or decaying toward a logic 0. Therefore, it must be passed through inverter gates U7A and U7B to preserve the polarity and provide a solid logic 1 for the regulation amplitude signal.

The output of the hold circuit is the pulse width modulator control voltage. Before the system is near regulation amplitude, no amplitude feedback pulses are received and the control voltage is held at its initial condition level to provide full motor drive voltage. As the system nears regulation amplitude, the amplitude feedback pulse pairs are generated and processed in the pulse error detector to control the level of pulse width modulator control voltage through the hold circuit. This control voltage is updated each half cycle when system deflection is at its peak. It is then held for use in the pulse width modulator until it is updated at the next deflection peak.

In the region where the reference ramp voltage for the pulse width modulator is passing through zero, it can, under some conditions, exceed the reset value of the control voltage. This condition would cause motor drive pulses to occur at the wrong time and/or cause the power bridge of the motor driver to momentarily short line to ground. In order to prevent this, a blanking transistor Q1 pulls the control voltage to a negative level while the hold circuit is in the discharged condition and the reference ramp is passing through the region near zero volts.

The auxiliary start multi supplied pseudo-zero crossing pulses at startup if actual zero crossing pulses are not generated because this reference position is passed at near zero velocity or because of zero position misalignment. The frequency of this multi is lower than that of the system. While it will not drive the system to full amplitude, it will deflect the system to sufficient amplitude to cause actual zero crossing pulse generation. Once zero crossing pulses occur they syncronize the auxiliary start multi to actual system frequency and regulation amplitude will result.

There is shown in FIG. 5 a pulse width integrator and stabilization network. The input to this circuit is the amplitude feedback pulse width which is proportional to the peak amplitude of the controlled pendulum. The output is a charge pulse width for a hold circuit that develops the control voltage for the pulse width modulator to drive the pendulum motor. This circuit includes a pulse integrator 40 to extract the DC value of the feedback pulsewidths, subtract this DC value from the amplitude reference voltage, and integrate the resultant error. The output of a sweep integrator 42; which is enabled during the interval that the feedback pulse width exists, is compared with the integrated error signal to determine the start of the charge pulse. The charge pulse is terminated at the end of each feedback pulse width as shown in FIG. 6

When the sweep voltage (V.sub.s) equals the pulse integrator output voltage (V.sub.c) the comparator output switches to a logic 1. This occurs at: ##EQU1## which is the charge enable delay. The gain or change in this delay for a change in V.sub.c is: ##EQU2##

The block diagram of the pulse width discriminator is shown in FIG. 7. Assuming that the system is in a steady state regulation condition, the waveforms will be as shown in the solid lines of FIG. 8. If pendulum amplitude is suddenly increased by a fixed amount, the time spacing between the pulses of each amplitude feedback pair is also increased by .DELTA. T as shown in dashed lines. This wider input pulse width causes an immediate increase of .DELTA. T in the output change time. This corresponds to an output directly proportional to the input due to the feedforward path. In addition, it increases the DC voltage into the pulse integrator causing its output V.sub.c to ramp down toward zero continually decreasing T.sub.D by .DELTA. T.sub.D as long as the increase .DELTA. T exists as shown in cross hatched lines. This corresponds to an output that is proportional to the integral of the input.

Therefore, the pulse width discriminator has the form of .DELTA.TD .congruent. .DELTA. T(1 + K/S). In FIG. 8 dashed lines are used to indicate the change from steady state operation.

From the block diagram of FIG. 7 the transfer function is found to be: ##EQU3##

A plot of this transfer function in FIG. 9 indicates that it has the characteristic of an integrator (-1 slope) at low frequencies and changes to a constant gain (0 slope) at higher frequencies. Practically in the loop it is equivalent to: ##EQU4##

The present invention is an automatic amplitude control circuit which provides precision amplitude control of a high Q mechanical torsion pendulum oscillator with high circuit efficiency, a number of low power circuit elements, minimal shaft encoder requirements, and a novel pulse width integrator and stabilization network. This apparatus has provided better than 0.2 milliradian control for a pendulum deflection amplitude of .+-.1 radian.

Although the invention has been described with reference to a particular embodiment, it will be understood to those skilled in the art that the invention is capable of a variety of alternative embodiments within the spirit and scope of the appended claims.