Electronic Channel Selector

The present invention relates to an electronic channel selector which may be used instead of the conventional mechanical tuners.

The conventional mechanical tuners have a number of sliding or moving parts which are inevitably subjected to wear, resulting in the breakdown or malfunction of the tuner. Furthermore, the mechanical tuners are complex in construction and are therefore difficult to fabricate. To overcome these problems inherent to the mechanical turners, there has been devised and demonstrated an electronic channel selector or tuner of the type in which the output from a precision variable resistor is applied to a plurality of switching circuits for selecting a desired channel. Therefore, the switching circuits and the switching means equal in number of the channels to be selected must be provided. Furthermore, it has been extremely difficult to incorporate in the conventional electronic channel selectors a memory device which may automatically select the channel which had been selected before the main switch connected to the power supply was opened.

One of the objects of the present invention is therefore to provide an electronic channel selector which is very simple in construction yet highly reliable and dependable in operation.

Another object of the present invention is to provide an electronic channel selector which incorporates therein a voltage memory circuit so that the overall construction of the channel selector can be much simplified.

A further object of the present invention is to provide an electronic channel selector which incorporates therein a voltage memory circuit which is capable of selecting the channel which had been selected before a main switch connected to a power supply was opened when the main switch is closed again.

To the above and other ends, the present invention provides an electronic channel selector comprising a plurality of variable resistors, a plurality of switches the input terminals of which are connected to the output terminals, respectively of the variable resistors and the output terminals of which are connected to a common junction, an input resistor whose input terminal is connected to the common junction and whose output terminal is connected to the input terminal of a reed relay, a MOS field-effect transistor whose gate is connected to the output terminal of the reed relay, a nonpolarized electrolytic capacitor interconnected between the ground and the gate of the field-effect transistor, an output resistor interconnected between the ground and the source of the field-effect transistor, switching means whose input terminal is connected to the common junction and whose output is connected to the coil of the reed relay so that when said switching means is turned on the coil is energized to close the reed relay, and a varactor whose input terminal is connected to the source of the field-effect transistor, whereby the capacitance of the varactor can be varied in response to the source-follower voltage of the field-effect transistor.

FIG. 1 is a circuit diagram of a first embodiment of the present invention;

FIG. 2 is a circuit diagram of a voltage memory circuit thereof;

FIG. 3 is a circuit diagram of a second embodiment of the present invention; and

FIGS. 4a through 4e show waveforms of the voltage outputs at various points in the circuit shown in FIG. 3, and are used for the explanation of the mode of operation thereof.

Identical reference numerals are used to designate similar parts throughout the figures.

In FIG. 1 there is shown a circuit diagram of a first embodiment of an electronic channel selector in accordance with the present invention. One end of the resistor of a variable resistor 10, 11 or 12 is connected to a +V power supply while the other end is grounded. An output terminal or arm E.sub.1, E.sub.2 or E.sub.3 is connected to a movable contact of a switch 13, 14 or 15, and the stationary contacts of these switches 13, 14 and 15 are connected to a common junction 16 which in turn is connected to the noninverting input terminal of an operational amplifier 17 and to the base of a switching transistor 19 through a resistor 18. The emitter of the switching transistor 19 is grounded while the collector is connected to a first input terminal 20 of a voltage memory circuit 21 the output terminal 22 of which is connected to the inverting input terminal of the operational amplifier 17 and to a varactor 23. The output of the operational amplifier 17 is connected to a second input terminal 24 of the voltage memory circuit 21.

In FIG. 2, there is shown a circuit diagram of the voltage memory circuit 21. The second input terminal 24 is connected through an input resistor 25 to the movable contact of a reed relay 26 the stationary contact of which is connected to the gate of a MOS field-effect transistor 27. The first input terminal 20 is connected through the coil of the reed relay 26 to a +V power supply terminal. A nonpolarized electrolytic capacitor 28 is interconnected between the gate of the field-effect transistor 27 and the ground, and an output resistor 29 is connected between the ground and the source of the field-effect transistor 27. The drain of the field-effect transistor 27 is connected to the +V terminal, and the output terminal 22 is connected to the source of the field-effect transistor 27.

Next the mode of operation of the first embodiment with the above construction will be described. It is assumed the output voltage Vo from the voltage memory 21 to be zero. When the switch 13 is closed, the current the magnitude of which is dependent upon the output E.sub.1 of the variable resistor 10 flows through the resistor 18 into the base of the switching transistor 19 so that the latter is turned on and consequently the reed relay 26 is closed. Since E.sub.1 > Vo, the output from the operational amplifier 17 is almost equal to +V.sub.B, and the capacitor 28 is charged to this voltage. As the voltage across the capacitor 28; that is, the gate voltage of the field-effect transistor 27 is increased, the output voltage Vo is increased accordingly, toward E.sub.1. When the output voltage Vo approaches E.sub.1, the output from the operational amplifier 17 decreases and becomes equal to the voltage across the capacitor 28 so that the output voltage Vo equals E.sub.1 (Vo = E.sub.1). This output voltage is stored in the voltage memory 21 even when the switch 13 is opened, and the output voltage at the output terminal 22 is maintained constant.

Next when the switch 14 is closed, the switching transistor 19 is turned on and then the read switch 26 is closed in the manner described above. When E.sub.1 > E.sub.2, the output voltage from the operational amplifier 17 approaches -V.sub.B and consequently the capacitor 28 is discharged. As a result, the output voltage decreases toward E.sub.2. When the output voltage Vo approaches E.sub.2, the output from the operational amplifier 17 increases and finally becomes equal to the voltage across the capacitor 28. That is, Vo = E.sub.2. This output voltage can be stored in the voltage memory 21 even when the switch 14 is opened.

From the foregoing description, it is seen that when the output voltage E.sub.1, E.sub.2 or E.sub.3 of the variable resistor 10, 11 or 12 is higher than the voltage which triggers the switching transistor 19, the output voltage E.sub.1, E.sub.2 or E.sub.3 is transferred into and stored in the voltage memory circuit 21 by closing the switch 13, 14 or 15. That is, when one of the switches 13, 14, 15 and so on is closed, one of the output voltages E.sub.1, E.sub.2, E.sub.3,... set by the variable resistors 10, 11, 12,... appears as the output voltage Vo of the voltage memory 21 which is applied to the varactor 23 for selecting a desired channel.

The second embodiment shown in FIG. 3 is substantially similar in construction to the first embodiment shown in FIG. 1 except that the operational amplifier 17, a rectangular wave-form generator consisting of a NOT gate 33, a differentiating circuit 37 and a monostable multivibrator 45 is used. The common junction 16 of the switches 13, 14 and 15 is connected through a resistor 30 to the base of a transistor 32 of the NOT gate 33. The emitter of the transistor 32 is grounded while the collector is connected through a resistor 31 to a +V.sub.B terminal.

The output from the NOT gate 33 is transmitted through a diode 34 to the differentiating circuit 37 consisting of a capacitor 35 and a resistor 36. The pulse output from the differentiating circuit 37 is transmitted to the input terminal of the monostable multivibrator 45 consisting of resistors 38 through 41, a capacitor 42 and transistors 43 and 44. The output terminal 46 of the multivibrator 45 is applied through the resistor 18 to the base of the switching transistor 19.

Next with particular reference to FIGS. 4a through 4e, the mode of operation of the second embodiment with the above construction will be described. When the switch 13 is closed, the output voltage E.sub.1 (See FIG. 4a) of the variable resistor 10 is applied to the NOT gate 33, and the output from the NOT gate 33 is differentiated as shown in FIG. 4b by the differentiating circuit 37. In response to the output V.sub.2 from the differentiating circuit 37, the monostable multivibrator 45 is triggered to generate the rectangular waveform with a pulse duration t as shown in FIG. 4c. In response to the output pulse V.sub.3 from the monostable multivibrator 47, the switching transistor 19 is turned on and consequently the reed relay 26 is closed. As shown in FIG. 4d, the rising time of the reed relay 26 lags behind the rising time of the output pulse V.sub.3 (See FIG. 4c) from the vibrator 47 by t.sub.2. The falling time also lags by t.sub.3 behind the falling time of the output pulse V.sub.3.

Meanwhile as the switch 13 is closed, the output voltage E.sub.1 of the variable resistor 10 is applied through the input resistor 25 to the capacitor 28 so that the voltage across the capacitor 28 increases as indicated by the curve E.sub.1 ' in FIG. 4e during the time interval t'.sub.1 (See FIG. 4d). Therefore the output voltage Vo from the field-effect transistor 27 rises to E.sub.1 ' as shown in FIG. 44. This output voltage Vo can be stored in the memory circuit 21 even after the switch 13 is kept closed.

Next when the switch 14 is closed, the output voltage E.sub.2 of the variable resistor 11 is applied to the voltage memory 21 and to the NOT gate 33. Therefore, the voltage across the capacitor 28 rises to E.sub.2 during the time monostable multivibrator 47 gives the pulse output V.sub.3 so that the output voltage Vo from the voltage memory circuit 21 rises to E.sub.2 ' as shown in FIG. 4e. The output voltage Vo is applied to the varactor 23 for selecting a desired channel corresponding to the closed switch 13, 14 or 15.

In general, it takes 30 msec at the least to manually close or open the switch 13, 14 or 15. Therefore the pulse duration t.sub.1 of the output pulse from the monostable multivibrator 47, the charging time t.sub.1 '; that is the time for charging the capacitor 28, and the time interval t.sub.4 required for charging the capacitor 28 to a predetermined level are so selected as to satisfy the following relations:

Thus, when one of the switches 13, 14, 15 and so on is closed, one of the output voltages E.sub.1, E.sub.2, E.sub.3 and so on which are set to different levels by the variable resistors 10, 11, 12 and so on can be derived as the output voltage Vo (source-follower voltage) of the field-effect transistor 27 and applied to the varactor 23. Even when the channel selector is disconnected from the power supply and then connected to it again, the channel which has been selected when the channel selector was disconnected from the power supply will be selected.