Dual Polarity Pulse Detection Circuit With Variable Voltage Threshold

High-speed pulse detection circuits and logic status indicator circuits generally comprise a plurality of circuit elements such as high-speed amplifiers, high-speed comparators, and monostable multivibrators containing numerous logic gates. The high-speed amplifiers are generally added to circuits to increase the speed of response of such circuits to input signals. Such additions, however, usually increase the complexity of such circuits resulting in higher circuit manufacturing costs and in decreased circuit reliability.

Also, multivibrators employed in some circuits often comprise numerous logic gates that contribute significantly to the propagation delay of signals through the circuit. Generally, the greater the number of such logic elements in a circuit, the slower is that circuit's response to input signals.

High-speed pulse detection circuits and logic status indicator circuits often comprise complex and costly dual circuits: one circuit for detecting and stretching input pulses having a positive polarity and another circuit for detecting and stretching input pulses having a negative polarity. Pulse-stretching is performed to facilitate observation of the pulses.

To enable a user of such circuits to select, and subsequently vary, the threshold relative to which the input pulses are to be detected, many such circuits include a comparator Schmitt trigger or the like as an added circuit element. This added element not only further increases the complexity and cost of such circuits, but often decreases the reliability of such circuits as well.

Accordingly, the preferred embodiment of the present invention is a circuit having a comparator with variable threshold selector circuitry for high-speed detection of pulses having positive or negative polarity relative to a selected threshold. The circuit includes pulse stretching and LED circuitry for stretching and displaying the detected input pulses.

The comparator in the circuit obviates the need for multivibrators with numerous logic gates and for a Schmitt trigger or the like as a separate circuit element. As such, the circuit comprises fewer elements and is simpler, less costly and more reliable than conventionally available high-speed pulse detection or logic status indicator circuits for detecting high-speed input pulses relative to a variable threshold.

FIG. 1 is a schematic diagram of the preferred embodiment of the circuit of the present invention.

FIG. 2 is a graphic illustration of the signal detection, signal stretching and display characteristics of the circuit of FIG. 1.

FIG. 3 is a schematic diagram of other possible embodiments of the display circuitry of the circuit of FIG. 1.

FIG. 1 shows a circuit diagram of a simple high-speed pulse-detection and logic-state analyzing circuit 10 with pulse stretching and display capability. Circuit 10 produces a visible indication of the status of the voltage level of an input pulse with respect to a reference voltage level. An input pulse of undetermined voltage 11 is supplied via a line 12 to a negative terminal 33 of a high-speed comparator 13 in the circuit 10. The high-speed comparator may be the Motorola model No. MC10125 ECL-to-TTL comparator or other commerically available comparator. A reference signal having a reference voltage 15 is supplied to a positive terminal 35 of the comparator 13. When no input voltage is applied to comparator 13, the circuit 10 is in a quiescent state having reference voltage 15 equal to a threshold or trigger voltage 17 produced by a power source 19. This threshold voltage 17 is variable, and may be manually varied by changing the position of a wiper contact 20 of a potentiometer 21. When circuit 10 is not in a quiescent state, i.e., when an input voltage 11 is applied to comparator 13, comparator 13 either produces no output signal, in which event the output voltage V.sub.OUT from comparator 13 is low, or it produces an output signal having a voltage V.sub.OUT which is high, i.e., set to a predetermined value, for example, 2.5 volts. This predetermined value is determined as follows:

where V.sub.S2 is the voltage, in volts, of a power supply (S.sub.2)25, I.sub.d represents the amount of current, in milliamperes, needed to drive a typical LED which may have ten millicandelas luminous intensity, and R.sub.2 represents a resistance, typically about 240 ohms, of a resistor in series with said LED.

FIG. 2 illustrates the relationship of the input voltage 11 to reference voltage 15 and the effect of this relationship upon the on and off status of an LED display 27. FIG. 2(B) relates LED status to input and reference voltage levels shown in FIG. 2(A). FIG. 2(D) relates LED status to the input and reference voltage levels shown in FIG. 2(C).

A positive input pulse is a pulse which attains a voltage level more positive than reference voltage 15, and a negative input pulse is a pulse which attains a voltage level more negative than reference voltage 15. A positive input pulse causes comparator 13 to produce an output pulse 23 having a voltage V.sub.OUT that is low. This causes current to flow from power supply 25 through LED 27, thereby lighting or turning on the LED 27. A negative input pulse causes comparator 13 to produce an output pulse 23 whose voltage V.sub.OUT is equal to or greater than the voltage produced by power supply 25. This prevents current from flowing through LED 27 from power supply 25, thereby causing LED 27 to be off or not lit.

For repetitive signals comprising positive and negative input pulses, and sinusoidal or direct current signals with voltage levels that repetitively become more positive and more negative than reference voltage 15, the LED 27 blinks on and off repetitively.

A capacitor 29 is included in the circuit for stretching short duration pulses, i.e., pulses of approximately five nanoseconds to ten milliseconds in width in the preferred embodiment, to produce longer duration pulses that are greater than ten milliseconds in width. This stretching operation is performed so that the existence and the repetitive characteristics of the short duration pulses may be visually observed. As V.sub.OUT goes high, capacitor 29 causes the reference voltage 15 to become more positive relative to the voltage of input pulse 11. This in turn causes the comparator output 23 to remain high for the decay period T.sub.1 of capacitor 29 and a resistor 31, which period is defined as follows: ##EQU1## where R.sub.1 represents the resistance, in ohms, of resistor 31, C represents the capacitance, in microfarads, of capacitor 29,

V.sub.in represents the voltage, in volts, of input pulse 11,

V.sub.t represents the value, in volts, of threshold voltage 17,

V.sub.out max represents the maximum value, in volts, of output voltage 23 of comparator 13, and

V.sub.out min represents the minimum value, in volts, of output voltage 23 of comparator 13.

When V.sub.OUT goes low, capacitor 29 causes reference voltage 15 to become more negative with respect to the voltage of input pulse 11. This in turn causes the comparator output 23 to remain low for decay period T.sub.2 of the capacitor 29, which period is defined as follows: ##EQU2## where R.sub.1, C, V.sub.IN, V.sub.OUT MAX and V.sub.OUT MIN are as defined above.

FIG. 3 shows other possible display configurations. For FIG. 3(A) when V.sub.IN 11 is positive with respect to V.sub.REF 15, the LED display 27 is on, and when V.sub.IN is negative with respect to V.sub.REF, the LED 27 is off. Conversely, for FIGS. 3(B) and 3(C), when V.sub.IN is positive with respect to V.sub.REF, the LED display 27 is off, and when V.sub.IN is negative with respect to V.sub.REF, the LED 27 is on.