Carrier Wave Compensator With Interference Suppression Circuit Means

The invention relates to a circuit arrangement for suppressing interference voltages in carrier wave compensators, which arrangement comprises a measuring bridge supplied by a carrier wave supply source, a null amplifier and a compensation arrangement adjusted by the null amplifier for the compensation of the bridge-unbalance to be measured.

Measuring value converters are known, e.g. from German patent specification 1,591,988, in which the unbalance of a resistance bridge, for example a strain-gauge measuring bridge, is converted into a signal frequency variation. In such arrangements the frequency of a sinewave oscillator is controlled by varying a circuit parameter. Simultaneously, a signal is derived from said circuit parameter which compensates for the unbalance of the input element of the converter, i.e. of the resistance bridge. In a manner similar to that used in automatic carrier wave compensators, compensation is achieved by means of a control circuit which controls the said circuit parameter.

In said known automatic carrier wave compensators the inertia of the electro-mechanical elements, such as for example indicating or recording elements, or the slow response of the amplitude controlled sinewave oscillator, determines the dynamic behaviour of the compensation process. The control circuit in the compensator generally has an integrating effect with a very large time constant. Interference voltages in the output signal of the null amplifier -- such as reactive components, harmonics and noise voltages -- are suppressed by the controller, which also functions as a low-pass filter.

Frequently it is desirable to substantially extend the dynamic response of the compensator. This is for example required if in a measuring value converter of the above-mentioned type an oscillator with sampling amplitude control is employed with a very fast response, as described for example in the published German patent application 2,001,451. It is then not possible to simply reduce the time constant of the integrating controller in the compensator. This would impair the filtering action of the controller, while the said interference components would adversely affect the control element.

It is an object of the present invention to provide a circuit arrangement for suppressing interference voltages in the output signal of the null amplifier without, or substantially without, deteriorating the dynamic response of the control circuit of the compensator.

According to the invention this is achieved by providing a sampling filter between the null amplifier and the compensation arrangement. This filter consists of a multiplier, an integrator, a sampling switch, a pulse shaper circuit, and a hold capacitor connected to a buffer amplifier. The multiplier has a first input connected to the output of the null amplifier and a second input to the supply source. The output of the multiplier is connected to the integrator. The output of the integrator is periodically connected, by means of the sampling switch, to the hold capacitor so that the buffer amplifier delivers a control signal to the compensation arrangement. The pulse shaper circuit is connected to the supply source for generating short control pulses during the zero passages of the carrier wave for closing the sampling switch periodically for short periods.

The invention will be described in more detail with reference to the accompanying drawing.

A carrier wave source T supplies a sine-wave signal U.sub.O.sin.omega..sub.O t to a resistance bridge B (e.g. a strain gauge measuring bridge) and a potentiometer circuit P, said potentiometer producing a compensation voltage. The bridge output voltage and the compensation voltage are applied to the inputs of corresponding polarity of a null amplifier N. The null amplifier may comprise a Signetics dual operational amplifier designated 5558 or .mu.A747. One amplifier has its inverting and noninverting input terminals connected to the output terminals of the bridge B. The second amplifier has its input terminals connected to the arm of potentiometer P and to the output terminal of the first amplifier. The first amplifier operates as a differential amplifier and the second amplifier as a comparator. The output signal of the second amplifier is coupled to one input of the multiplier M. The output voltage of said amplifier is processed into a control signal via a sampling filter F, which signal controls the potentiometer circuit P. The actual sampling filter consists of a conventional multiplier M, an integrator I of known construction, a sampling switch S which is controlled by a well known pulse shaper circuit IF, a hold capacitor C and a buffer amplifier PV with a very high ohmic input.

The multiplier M operates as a demodulator in that it multiplies the output signal of the null amplifier N by the carrier wave signal U.sub.O sin.omega..sub.O t. The output signal of the null amplifier generally consists of a mixture of the useful signal sin.omega..sub.O t, which only becomes zero in the case of compensation, with interference signals cos.omega..sub.O t (owing to capacitive asymmetry of bridge and supply leads), sin n..omega..sub.O t and cos n..omega..sub.O t (owing to non-linearities of the electronic circuit), and sin (.omega.t+.phi.) (external disturbing influences of arbitrary frequency and input noise of the null amplifier). When said signals are multiplied by the carrier wave signal U.sub.O sin.omega..sub.O t, only the useful signal results in a d.c. component at the multiplier output -- in contrast to the commonly used switching modulators. Thus, this results in a variation of the average output voltage of the integrator. The mixing products of the inteference components are superimposed on said voltage. The output voltage of the integrator should be sampled precisely at the zero passages of the sinewave carrier voltage. For this purpose the circuit IF derives the required short control pulse for the sampling switch S from the carrier wave signal U.sub.O.sin.omega..sub.O t during each zero passage thereof. FIG. 1 of U.S. Pat. No. 3,381,226 shows a zero crossing detector that could be used to implement box IF.

The operation of the sampling filter can be explained as follows. The output signal of the filter (the control signal) assumes a constant value in the time intervals between two sampling pulses, i.e. each time for the duration of half a carrier wave period. The variations of the average d.c. value at the output of the integrator caused by the useful signal component in the null amplifier signal are followed stepwise by the control signal. For the controller function this means that in addition to the desired integrating action only a dead-time factor of 1/4 of the carrier wave period may be introduced, so that the compensation control circuit can reach control times of some carrier wave periods. On the other hand, for the function of interference-component filter, this means that alternating components in the output signal of the multiplier with frequencies that are multiples of the scanning frequency (2..omega..sub.O) are fully rejected. Therefore, components which are odd multiples of the carrier frequency are filtered out of the null amplifier signal, i.e. especially the strong components caused by capacitive bridge asymmetry and symmetrical non-linearities. Owing to the fixed phase-relationship between the sampling pulse and the demodulating signal -- at the sampling instant the multiplier output signal is always zero, independent of all interference components -- an attenuation of high-frequency interference components is obtained which is substantially greater than the filter action of the integration element alone. This is essential because the subsequent sample-hold element would transfer interference signals of frequencies above the scanning frequency to a frequency range below the scanning frequency, the interference signals being attenuated once more in accordance with the known series functions according to Fourier.