Solid State Power Controller

This invention relates to solid state electrical controls systems and more particularly to a control system wherein the control system is isolated from the high voltage AC lines. In controlling the operation or conductivity of a semiconductor switching device, for example, one connected to a relatively high voltage supply source, control signals are often developed in a circuit operating on a relatively low voltage, such as conventional logic circuits. There is difficulty in providing circuitry that is sensitive to the conditions of the power supply and providing control signals which will interrupt the faulted power supply in response to a sensed signal and at the same time maintain it isolated from the high AC voltage being controlled.

The present invention provides a solid state controller for remotely turning alternating power on and off by providing means to initiate a TTL control signal voltage to an electro-optically isolated solid state relay. Sensing means are provided to sense a short circuit condition and provide TTL control signals for indicating which power supply has failed and for interrupting the AC input to the power supply.

An object of the present invention is to provide a solid state controller which will switch alternating power on and off from a remote location by means of a TTL voltage level controlling signal.

Another object of the invention is the provision of a power controller which operates from a remote location for turning on and off alternating current power supplying a plurality of power supplies in response to anomalies sensed in the power supply circuits.

A further object of the invention is the provision of a solid state power controller which operates from a remote location for turning on and off alternating current power supplying a plurality of power supplies and having circuit means for sensing, and indicating which power supply has failed and simultaneously generating a control signal to interrupt the AC input power to the power supplies.

Other objects and many of the attendant advantages of this invention will be readily appreciated as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings.

FIG. 1 is a block diagram showing the general configuration of the invention;

FIG. 2 is a schematic diagram of the control circuit embodying the invention in combination with the power supply to be controlled.

Referring now to the drawings wherein there is shown in FIG. 1 a solid state relay 10 which is preferably a Model D1210 manufactured by Crydom Co. connected in series in an alternating current power supply in series with loads 14. Loads 14 in the illustration shown may be for example, alternating current to direct current power converters for supplying various DC voltages to DC loads (not shown). As shown in FIG. 1, DC voltages of +28, + 15, + 5, and -15 volts are provided by the various power supplies 14. The solid state controller 12 provides a control signal to the solid state relay 10 for controlling the AC supply voltage to power supplies 14. Power supply for solid state controller 12 is provided from the same alternating current power supply. Voltages are sensed and fed back from the DC voltage outputs of power supplies 14 to solid state controller 12 which responds in the event of an anaomaly as for example, a short circuit which will cause the DC voltage to become zero and provide a control signal to interrupt the power supplied to power supplies 14.

Referring now to FIG. 2 wherein the solid state controller 12 is shown in detail, the two triacs 22 and 24 with their triggering circuitry form a two pole solid state relay 10 to be controlled. An on-off switch 15 which as shown is a double pole-double throw switch with momentary action is coupled to a bistable flip-flop circuit 16 the output of which is coupled to a second bistable flip-flop 18 for generating an output pulse that is fed through NAND gate 19 to the base of transistor 20. The output signal taken from transistor 20 is the direct current command signal that controls the solid state relay 10. The Crydom Model D1210 is preferred as the solid state relay 10 because it opto-electronically isolates the driving circuitry from the high voltage AC being controlled.

With all the power supplies 14 disconnected from the alternating current source by means of relay 10, and momentary switch 15 in the off position. The direct current load voltage sensing points are at zero direct current voltage. Flip-flop 18 is then provided with a logical 0 via the off contact 21 of switch 15. The logical 0 presets flip-flop 18 and causes it to provide a logical low that is inverted to a high by NAND gate 19 to saturate transistor 20 and consequently turn relay 10 off.

In order to apply power to connector 14, switch 15 is depressed once; this action sets flip-flop 16 to generate a positive going pulse required to couple the logical 0 of flip-flop 18 to its data input terminal D which makes a logical 0 to appear at the Q terminal. This in turn cuts off transistor 20 making its output a logical 1 which is the control signal required to turn the relay 10 on and thus energizes the power supplies 14 connected as shown in FIG. 1. This makes all of the sensing points logical "ones" and therefore flip-flop 18 remains reset. To turn the power off, switch 15 is depressed once, flip-flop 16 is set, clocking in a logical 1 that appears at the Q terminal of flip-flop 18. This makes the Q output of flip-flop 18 low saturating transistor 20 and therefore turning the relay 10 off to interrupt the alternating current power to power supplies 14.

Monitoring of the operating conditions of the loads is accomplished by connecting sensing points to the outputs of the power supplies 14. The power supply test points are connected to the inputs of NOR gate 28 through resistor networks to provide the proper voltage levels. The negative short circuit voltage is fed through an isolator circuit 32 to provide a positive voltage to NOR gate 28. The isolator circuit 32 comprises a light-emitting diode 33 which emits light to an adjacent photo transistor 35. An output voltage across load resistor 37 is generated and fed to the input of NAND gate 30 which provides a positive voltage to NOR gate 28.

Whenever switch 15 is depressed to turn the power on the monitoring flip-flops 36, 38, 40, and 42 are cleared by means of the input signal applied to the "clear" input terminals of the flip-flops. The flip-flops are then ready to sense any power failure. If while the power is on and any power supply fails, the particular flip-flop connected to that power supply will sense the failure by a rising voltage that is coupled to the clock pulse input of the particular flip-flop involved. This flip-flop then becomes set and as a result, energizes one of light emitting diodes 44, 46, 48 and 50.

The voltage generated when a power failure occurs and the DC voltage goes to zero, at least one of the inputs to NOR gates 28 will be "zero." The output from NOR gate 28 is fed to NAND gate 26 and provides a logical "zero" signal that is fed through switch contact 21 to the pre-set input of flip-flop 18. This causes transistor 20 to saturate and remove the control signal, turning off relay 10. Relay 10 will remain off until switch 15 is actuated to the "on" position. Pressing switch 15 to the "on" position provides a clear signal to all the monitoring flip-flops 36, 38, 40, and 42. By removing the faulty supply and leaving its sensor point open, power may then be restored to the remaining power supplies.

Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.