US 4,001,569 AGrant

General Purpose Calculator Having Selective Data Storage, Data Conversion and Time-Keeping Capabilities

Issue Date:1977-01-04

•10 Claims

•30 Drawing Sheets

Abstract

A battery powered hand-held calculator is disclosed which includes a built-in metric to U.S. conversion function for converting units from one system to the other; a degrees-minutes-seconds conversion function for converting angles or units of time from degrees-minutes-seconds to the decimal system and conversely.

Metadata

Assignee

Hewlett-Packard Company

Inventors

Peter D. Dickinson
Thomas E. Osborne
France Rode
Allen J. Baum

Application Information

Application Number:US 5661447

Filing Date:1975-04-08

Priority Date:1973-05-29

Art Unit:236

Classifications

IPC:

G06F 502

Field of Search:

235155;156

Patent Drawings (30 sheets)

Description

BACKGROUND AND SUMMARY OF THE INVENTION

This invention relates generally to calculators and improvements therein and more particularly to non-programmable scientific calculators. While many prior art calculators can perform some complex calculations involving more than one mathematical function or operation several even redundant keystrokes are usually required. The preferred embodiment of the present invention is capable of performing mathematical operations necessary to convert from one unit of measure to another with a minimum of keystokes and without the user having to look up the appropriate factor to enter into the calculator to perform the conversion.

A calculator having the features of the preferred embodiment of the present invention incorporates easily accessible conversion factors to convert measurements in inches to centimeters, in gallons to liters and in pounds to kilograms. In addition, the calculator incorporates a conversion function for converting degrees-minutes-seconds (D MS) to decimal degrees, radians or grads. These conversions and their converse accurate to ten digits are initiated by actuation of only three keys on the keyboard and without having to enter the appropriate conversion factors via the keyboard. To preserve readout accuracy when converting from decimal degrees to D MS units the calculator automatically displays the answer in fixed point notation with four digits after the decimal point ("fixed-4" notation) regardless of the display format entered or otherwise specified by the user.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is a top view of a scientific calculator according to the preferred embodiment of the invention.

FIG. 2 is a block diagram of the calculator of FIG. 1.

FIG. 3 is a waveform diagram illustrating the timing sequence of the interconnecting busses and lines of FIG. 2.

FIG. 4 is a block diagram of the control and timing circuit of FIG. 2.

FIG. 5 is a more detailed block diagram of the keyboard scanning circuitry of FIG. 4.

FIG. 6 is a block diagram of one of ROM's 0-7 of FIG. 2.

FIG. 7 is a waveform diagram illustrating a typical address signal and a typical instruction signal.

FIG. 8 is a timing diagram illustrating the important timing points for a typical addressing sequence.

FIG. 9 is a waveform diagram illustrating the word select signals generated in the control and timing circuit of FIGS. 2 and 4 and in ROM's 0-7 of FIGS. 2 and 6.

FIG. 10 is a block diagram of the arithmetic and register circuit of FIG. 2.

FIG. 11 is a path diagram of the actual data paths for the registers A-F and M of FIG. 10.

FIG. 12 is a waveform diagram illustrating the output signals for the display decoder outputs A-E of FIGS. 2, 10, and 11.

FIG. 13 is a waveform diagram illustrating the actual signals on the display decoder outputs A-E of FIGS. 2, 10, and 11 when the digit 9 is decoded.

FIG. 14 is a waveform diagram illustrating the timing of the START signal generated by the display decoder of FIG. 10.

FIG. 15 is a schematic diagram of the clock driver of FIG. 2.

FIG. 16 is a waveform diagram illustrating the timing relationship between the input and output signals of the clock driver of FIG. 15.

FIG. 17 is a logic diagram of the anode driver of FIG. 2.

FIG. 18 is a waveform diagram illustrating the timing relationship between the input, output, and other signals of the anode driver of FIG. 17.

FIG. 19 is a schematic diagram of the basic inductive drive circuit for one of the LED's employed in the LED display of FIG. 2.

FIG. 20 is a waveform diagram illustrating the timing relationship between the decimal point drive signals for the LED display of FIG. 2.

FIG. 21 is a schematic diagram of the inductive drive circuit for one digit in the LED display of FIG. 2.

FIG. 22 is a logic diagram of the cathode driver of FIG. 2.

FIG. 23 is a top view of a metal strip employed in the keyboard input unit of FIGS. 1 and 2.

FIG. 24 is a side view of the metal strip of FIG. 23.

FIG. 25 is a force-deflection curve for a typical key in the keyboard input unit of FIGS. 1 and 2.

FIG. 26 is a schematic diagram of the LED display of FIGS. 1 and 2 and the inductive drive circuits therefor.

FIG. 27 is a schematic diagram of one segment of the LED display of FIG. 26.

FIG. 28 is an equivalent piecewise-linear model for the circuitry of FIG. 27.

FIG. 29 is a waveform diagram illustrating the inductor current and LED anode voltages in the circuitry of FIG. 27.

FIG. 30 is a path diagram illustrating the possible transfer paths between ROM'0-7 of FIG. 2.

FIG. 31 is a flow diagram of the display wait loop employed in the calculator of FIGS. 1 and 2.

FIG. 32 is a flow diagram of the Last-X function of the calculator of FIGS. 1 and 2.

FIG. 33 is a flow diagram of the metric-U.S. conversion constant function of the calcuator of FIGS. 1 and 2.

FIG. 34 is a flow diagram of the conversion function between the decimal system and the degrees, minutes, and seconds system of the calculator of FIGS. 1 and 2.

FIG. 35 is a flow diagram showing the keys to be operated in performing functions when the calculator of FIGS. 1 and 2 is in the clock mode.

FIG. 36 is a flow diagram of the program clock of the calculator of FIGS. 1 and 2 showing loops depicting hundredths of a second, seconds, minutes and hours.

FIG. 37 is a flow diagram of the factorial function of the calculator of FIGS. 1 and 2.

DESCRIPTION OF THE PREFERRED EMBODIMENT

System Architecture

Referring to FIGS. 1 and 2, there is shown a pocket-size electronic calculator 10 including a keyboard input unit 12 for entering data and instructions into the calculator and a seven-segment LED output display unit 14 for displaying each data entry and the results of calculations performed by the calculator. As shown in FIG. 2, calculator 10 also includes an MOS control and timing circuit 16, an MOS read-only memory circuit 18 (including ROM's 0-7), an MOS arithmetic and register circuit 20, a bipolar clock driver 22, a solid state power supply unit 24, and an MOS auxiliary data storage circuit 25.

The four MOS circuits are two-phase dynamic MOS/LSI circuits with low thresholds allowing compatibility with TTL bipolar circuits and allowing extremely low-power operation (less than 100 milliwatts for all three circuits). They are organized to process 14-digit BCD words in a digit-serial, bit-serial manner. The maximum bit rate or clock frequency is 200 kilohertz, which gives a word time of 280 microseconds (permitting a floating point addition to be completed in 60 milliseconds).

Control and timing circuit 16, read-only memory circuit 18, arithmetic and register circuit 20, and auxiliary data storage circuit 25 are tied together by a synchronization (SYNC) buss 26, an instruction (I.sub.s) buss 28, a word select (WS) buss 30, an instruction address (I.sub.a) line 32, and a carry line 34. All operations occur on a 56 bit (b.sub.0 -b.sub.55) word cycle (fourteen four-bit BCD digits). The timing sequence for the interconnecting busses and lines 26-34 is shown in FIG. 3.

The SYNC buss 26 carries synchronization signals from control and timing circuit 16 to ROM's 0-7 in read-only memory circuit 18 and to arithmetic and register circuit 20 to synchronize the calculator system. It provides one output each word time. This output also functions as a 10-bit wide window (b.sub.45 -b.sub.54) during which I.sub.s buss 28 is active.

The I.sub.s buss 28 carries 10-bit instructions from the active ROM in the read-only memory circuit 18 to the other ROM's, control and timing circuit 16, arithmetic and register circuit 20, and auxiliary data storage circuit 25, each of which decodes the instructions locally and responds to or acts upon them if they pertain thereto and ignores them if they do not. For instance, the ADD instruction affects arithmetic and register circuit 20 but is ignored by control and timing circuit 16. Similarly, the SET STATUS BIT 5 instruction sets status flip-flop 5 in control and timing circuit 16 but is ignored by arithmetic and register circuit 20.

The actual implementation of an instruction is delayed one word time from its receipt. For example, an instruction may require the addition of digit 2 in two of the registers in arithmetic and register circuit 20. The ADD instruction would be received by arithmetic and register circuit 20 during bit times b.sub.45 -b.sub.54 of word time N and the addition would actually occur during bit times b.sub.8 - b.sub.11 of word time N + 1. Thus, while one instruction is being executed the next instruction is being fetched.

The WS buss 30 carries an enable signal from control and timing circuit 16 or one of the ROM's in read-only memory circuit 18 to arithmetic and register circuit 20 to enable the instruction being executed thereby. Thus, in the example of the previous paragraph, addition occurs only during digit 2 since the adder in the arithmetic and register circuit 20 is enabled by WS buss 30 only during this portion of the word. When WS buss 30 is low, the contents of the registers in arithmetic and register circuit 20 are recirculated unchanged. Three examples of WS timing signals are shown in FIG. 3. In the first example, digit 2 is selected out of the entire word. In the second example, the last 11 digits are selected. This corresponds to the mantissa portion of a floating point word format. In the third example, the entire word is selected. Use of the word select feature allows selective addition, transfer, shifting or comparison of portions of the registers within arithmetic and register circuit 20 with only one basic ADD, TRANSFER, SHIFT, or COMPARE instruction. Some customization in the ROM word select fields is available via masking options.

The I.sub.a line 32 serially carries the addresses of the instructions to be read from ROM's 0-7. These addresses originate from control and timing circuit 16, which contains an instruction address register that is incremented each word time unless a JUMP SUBROUTINE or a BRANCH instruction is being executed. Each address is transferred to ROM's 0-7 during bit times b.sub.19 -b.sub.26 and is stored in an address register of each ROM. However, only one ROM is active at a time, and only the active ROM responds to an address by outputting an instruction on the I.sub.s line 28. Control is transferred between ROM's by a ROM SELECT instruction. This technique allows a single eight-bit address, plus eight special instructions, to address up to eight ROM's of 256 words each.

The carry line 34 transmits the status of the carry output of the adder in arithmetic and register circuit 20 to control and timing circuit 16. The control and timing circuit uses this information to make conditional branches, dependent upon the numerical value of the contents of the registers in arithmetic and register circuit 20.

A BCD input/output line 35 interconnects the auxiliary data storage circuit 25 and the C register of arithmetic and register circuit 20. This line always outputs the contents of the C register of arithmetic and register circuit 20 unless a specific instruction to input to the C register of the arithmetic and register circuit is being executed.

Control and timing circuit 16 is organized to scan a five-by-eight matrix of switches in search of an interconnection that designates actuation of a key. Any type of metal-to-metal contact may be used as a key. Bounce problems are overcome by programmed lockouts in the key entry routine. Each key has an associated six-bit code.

A power on circuit 36 in power supply unit 24 supplies a signal forcing the calculator to start up in a known condition when power is supplied thereto. Power is supplied to the calculator when the on-off switch of keyboard input unit 12 (see FIG. 1) is moved to the on position.

The primary outputs of the calculator are five output lines 38 connected between a display decoder of arithmetic and register circuit 20 and an anode driver of output display unit 14. Data for a seven-segment display plus a decimal point is time-multiplexed onto these five output lines. A start line 40 is connected from the display decoder of arithmetic and register circuit 20 to the auxiliary data storage circuit 25 and a cathode driver of output display unit 14 and indicates when the digit 0 occurs.

Control and Timing Circuit

Referring now to FIG. 4, control and timing circuit 16 contains the master system counter 42, scans the keyboard 12, retains status information about the system or the condition of an algorithm, and generates the next ROM address. It also originates the subclass of Word Select signals which involve the pointer 44, a four-bit counter that points to one of the register digit positions.

The control unit of control and timing circuit 16 is a microprogrammed controller 46 comprising a 58 word 25 bits per word) control ROM, which receives qualifier or status conditions from throughout the calculator and sequentially outputs signals to control the flow of data. Each bit in this control ROM either corresponds to a signal control line or is part of a group of N bits encoded into 2.sup.N mutually exclusive control lines and decoded external to the control ROM. At each phase 2 clock, a word is read from the control ROM as determined by its present address. Part of the output is fed back to become the next address.

Several types of qualifiers are checked. Since most commands are issued only at certain bit times during the word cycle, timing qualifiers are necessary. This means the control ROM may sit in a wait loop until the appropriate timing qualifier comes true, then move to the next address to issue a command. Other qualifiers are the state of the pointer register, the PWO (power on) line, the CARRY flip flop, and the state of each of the 12 status bits.

Since the calculator is a serial system based on a 56 bit word, a six-bit system counter 42 is employed for counting to 56. Several decoders from system counter 42 are necessary. The SYNC signal is generated during bit times b.sub.45 -B.sub.54 and transmitted to all circiuts in the system (see FIG. 3). Other timing qualifiers are sent to the microprogrammed control ROM 46 as mentioned in the previous paragraph.

System counter 42 is also employed as a keyboard scanner as shown in FIG. 5. The most significant three bits of system counter 42 go to a one-of-eight decoder 48, which sequentially selects one of the keyboard row lines 50. The least significant three bits of the system counter count modulo seven and go to a one-of-eight multiplexor 52, which sequentially selects one of the keyboard column lines 54 (during 16 clock times no key is scanned). The multiplexor output is called the key down signal. If a contact is made at any intersection point in the five-by-eight matrix (by depressing a key), the key down signal will become high for one state of system counter 42 (i.e., when the appropriate row and column lines are selected). The key down signal will cause that state of the system counter to be saved in key code buffer 56. This six-bit code is then transferred to the ROM address register 58 and becomes a starting address for the program which services the key that was down (two leading 0 bits are added by hardware so an eight-bit address exists). Thus, during each state of system counter 42, the decoder-multiplexor combination 48 and 52 is looking to see if a specific key is down. If it is, the state of the system counter becomes a starting address for execution of that key function (noted that 16 of the 56 states are not used for key codes). By sharing the function of the system counter and using a keyboard scanning technique directly interfaced to the MOS circuitry, circuit complexity is reduced significantly.

A 28 bit shift register which circulates twice each 56 bit word time, is employed in control and timing circuit 16. These 28 bits are divided into three functional groups: the main ROM address register 58 (eight bits), the subroutine return address register 60 (eight bits), and the status register 62 (12 bits).

THe main ROM's 0-7 each contain 256 (10 bit) words, thereby requiring an eight-bit address. This address circulates through a serial adder/subtractor 64 and is incremented during bit times b.sub.47 -b.sub.54 (except in the case of branch and jump-subroutine instructions for which the eight bit address field of the ten-bit instruction is substituted for the current address). The next address is transmitted over the I.sub.a line 32 to each of the main ROM's 0-7 during bit times b.sub.19 -b.sub.26.

The Status register 62 contains 12 bits or flags which are used to keep track of the state of the calculator. Such information as whether the decimal point has been hit, the minus sign set, etc. must be retained in the status bits. In each case the calculator remembers past events by setting as appropiate status bit and asking later if it is set. A yes answer to a status interrogation will set the carry flip-flop 66 as indicated by control signal IST in FIG. 4. Any status bit can be set, reset, or interrogated while circulating through the adder 64 in response to the appropriate instruction.

The instruction set allows one level of subroutine call. The return address is stored in the eight-bit return address register 60. Execution of a JUMP subroutine stores the incremented present address into return address register 60. Execution of the RETURN instruction retrieves this address for transmission over I.sub.a line 32. Gating is employed to interrupt the 28 bits circulating in the shift register 58-62 for insertion of addresses at the proper time as indicated by the JSB control signal in FIG. 4.

An important feature of the calculator system is the capability of select and operate upon a single digit or a group of digits (such as the exponent field) from the 14 digit registers. This feature is implemented through the use of a four-bit pointer 44 which points at the digit of interest. Instructions are available to set, increment, decrement, and interrogate pointer 44. The pointer is incremented or decremented by the same serial adder/subtracter 64 used for addresses. A yes answer to the instruction "is pointer.noteq.N" will set carry flip-flop 66 via control signal IPT in FIG. 4.

The word select feature was discussed above in connection with FIGS. 2 and 3. Some of the word select signals are generated in control and timing circuit 16, namely those dependent on pointer 44, and the remainder in the main ROM's 0-7. The pointer word select options are (1) pointer position only and (2) pointer position and all less significant digits. For instance, assume the mantissa signs of the numbers in the A and C registers of arithmetic and register circuit 20 were to be exchanged. The pointer would be set to position 13 (last position) and the A EXCHANGE C instruction with a "pointer position" word select field would be given. If all of the word except the mantissa signs were to be exchanged, the A EXCHANGE C instruction would be given with the pointer set and 12 and the word select field set to pointer and less significant digits. The control and timing circuit word-select output 30 is or-tied with the ROM word-select output 30 and transmitted to arithmetic and register circuit 20.

Any carry signal out of the adder in arithmetic and register circuit 20, with word select, also high, will set carry flip-flop 66. This flip-flop is interrogated during the BRANCH instruction to determine if the existing address should be incremented (yes carry) or replaced by the branch address (no carry). The branch address is retained in an eight-bit address buffer 68 and gated to I.sub.a line 32 by the BRH control signal.

The power-on signal is used to synchronize and preset the starting conditions of the calculaor. It has two functions, one of which is to get the address of control ROM 46 set to a proper starting state and the other of which is to get the system counter 42 in control and timing circiut 16 synchronized with the counter in each main ROM 0-7. As the system power comes on, the PWO signal is held at logic 1 (0 volts in this system) for at least twenty milliseconds. This allows system counter 42 to make at least one pass through bit times b.sub.45 -b.sub.54 when SYNC is high thereby setting main ROM 0 active and the rest of the ROM's inactive. When PWO goes to logic 0 (+6 volts), the address of control ROM 46 is set to 000000 where proper operation can begin.

READ-ONLY MEMORY CIRCUIT

The ROM's 0-7 in read-only memory circiut 18 store the programs for executing the functions required of the system. Since each ROM contains 256 ten-bit words, there are 1,536 words or 15,360 bits of ROM. A block diagram of each of the ROM's 0-7 is shown in FIG. 6.

The basic operation of each ROM is a serial-address in, a serial-instruction out. During every 56 bit word time the address comes in, least significant bit first from bit b.sub.19 through bit b.sub.26. Every ROM 0-7 in the system receives this same eight-bit address and from bit time b.sub.45 through b.sub.54 tries to output onto I.sub.s line 28. However, a ROM enable (ROE) flip-flop 70 in each ROM insures that no more than one ROM actually sends an instruction on I.sub.s line 28 at the same time.

All output signals are inverted so that the steady-state power dissipation is reduced. The calculator circiuts are P-channel MOS. Thus, the active signals that turn on a gate are the more negative. This is referred to as negative logic, since the more negative logic level is the logic 1. As mentioned above, logic 0 is +6 volts and logic 1 is 0 volts. The signals on I.sub.a and I.sub.s are normally at logic 0. However, when the output buffer circuits are left at logic 0 they consume more power. A decision was therefore made to invert the signals on the I.sub.a and I.sub.s outputs and re-invert the signals at all inputs. Thus, signals appear at the I.sub.a and I.sub.s outputs as positive logic. The oscilloscope pattern that would be seen for instruction 1101 110 011 from state 11 010 101 is shown in FIG. 8.

The serial nature of the calculator circiuts requires careful synchronization. This synchronization is provided by the SYNC pulse, generated in control and timing circuit 16 and lasting for bit times b.sub.45 -b.sub.54. Each ROM has its own 56 state counter 72, synchronized to the system counter 42 in control and timing circuit 16. Decoded signals from this state counter 72 open the input to the address register 74 at bit time b.sub.19, clock I.sub.s out at bit time b.sub.45 and provide other timing control signals.

As the system power comes on, the PWO signal is held at 0 volts (logic 1) for at least 20 milliseconds. The PWO signal is wired (via a masking option) to set ROM Output Enable (ROE) flip-flop 70 on main ROM 0 and reset it on all other ROM's. Thus when operation begins, ROM 0 will be the only active ROM. In addition, control and timing circuit 16 inhibits the address output start-up so that the first ROM address will be zero. The first instruction must be a JUMP SUBROUTINE to get the address register 58 in control and timing circuit 16 loaded properly.

FIG. 7 shows the important timing points for a typical addressing sequence. During bit times b.sub.19 -b.sub.26 the address is received serially from control and timing circuit 16 and loaded into address register 74 via I.sub.a line 32. This address is decoded and at bit time b.sub.44 the selected instruction is gated in parallel into the I.sub.s register 76. During bit times b.sub.45 -b.sub.54 the instruction is read serially onto I.sub.s buss 28 from the active ROM (i.e., the ROM with the ROM enable flip-flop set).

Control is transferred between ROM's by a ROM SELECT instruction. Effectively this instruction will turn off ROE flip-flop 70 on the active ROM and turn on ROE flip-flop 70 on the selected ROM. Implementation is dependent upon the ROE flip-flop being a master-slave flip-flop. In the active ROM, the ROM SELECT instruction is decoded by a ROM select decoder 78 at bit time 44, and the master portion of ROE flip-flop 70 is set. The slave portion of ROE flip-flop 70 is not set until the end of the word bit time (b.sub.55). In the inactive ROM's the instruction is read serially into the I.sub.s register 76 during bit times b.sub.45 -b.sub.54 and then decoded, and the ROE flip-flop 70 is set at bit time b.sub.55 in the selected ROM. A masking option on the decoding from the least significant three bits of the I.sub.s register 76 allows each ROM to respond only to its own code.

The six secondary word-select signals are generated in the main ROM's 0-7. Only the two word-select signals dependent upon the POINTER come from control and timing circuit 16. The word select of the instruction is retained in the word select register 80 (also a master-slave). If the first two bits are 01, the instruction is of the arithmetic type for which the ROM must generate a word select gating signal. At bit time b.sub.55 the next three bits are gated to the slave and retained for the next word time to be decoded into one of six signals. The synchronization counter 72 provides timing information to the word select decoder 82. the output WS signal is gated by ROE flip-flop 70 so only the active ROM can output on WS line 30, which is OR-tied with all other ROM's and also control and timing circuit 16. As discussed above, the WS signal goes to arithmetic and register circiut 20 to control the portion of a word time an instruction is active.

The six ROM generated word select signals used in the calculator are shown in FIG. 9. ROM's 0-7 output a 1 bit-time pulse on I.sub.s buss 28 at bit time b.sub.11 to denote the exponent minus sign time. This pulse is used in the display decoder of arithmetic and register circuit 20 to convert a 9 into a displayed minus sign. The time location of this pulse is a mask option on the ROM.

Arithmetic and Register Circuit

Arithmetic and register circuit 20 shown in FIG. 10 provides the arithmetic and data storage function for the calculator. It is controlled by WS, I.sub.s, and SYNC lines 30, 28, and 26, respectively; receives instructions from ROM's 0-7 over the I.sub.s line 28; sends information back to control and timing circuit 16 via the CARRY line 34; partially decodes the display information before transmitting it via output lines 38 to the anode driver of output display unit 14; and provides a START pulse to the cathode driver of output display unit 14 to synchronize the display.

Arithmetic and register circuit 16 contains seven, fourteen-digit (56 bit) dynamic registers A-F and M and a serial BCD adder/subtractor 84. Actual data paths, not shown in FIG. 10 due to their complexity, are discussed below and shown in FIG. 11. The power and flexibility of an instruction set is determined to a great extent by the variety of data paths available. One of the advantages of a serial structure is that additional data paths are not very costly (only one additional gate per path). The structure of arithmetic and register circuit 20 is optimized for the type of algorithms required by the calculator.

The seven registers A-F and M can be divided into three groups: the working registers A, B, and C with C also being the bottom register of a four-register stack; the next three registers D, E, and F in the stack; and a separate storage register M communicating with the other registers through register C only. In FIG. 11, which shows the data paths connecting all the registers A-F and M, each circle represents the 56 bit register designated by the letter in the circle. In the idle state (when no instruction is being executed in arithmetic and register circuit 20) each register continually circulates since with dynamic MOS registers information is represented by a charge on a parasitic capacitance and must be continually refreshed or lost. This is represented by the loop re-entering each register.

Registers A, B, and C can all be interchanged. Either register A or C is connected to one adder input, and either register B or C to the other. The adder output can be directed to either register A or C. Certain instructions can generate a carry via carry flip-flfp 85 which is transmitted to control and timing circuit 16 to determine conditional branching. Register C always holds a normalized version of the displayed data.

In the stack formed by registers C, D, E, and F a ROLL DOWN instruction is executed by the following transfers: F.fwdarw. E.fwdarw. D.fwdarw. C.fwdarw. F. A STACK UP instruction is executed by the following transfers: C.fwdarw. D.fwdarw. E.fwdarw. F. Thus, it is possible to transfer a register and also let it recirculate so that in the last example the contents of C are not lost. The structure and operation of a stack such as this are further described in copending U.S. patent application Ser. No. 257,606 entitled IMPROVED PORTABLE ELECTRONIC CALCULATOR, filed on May 30, 1972, by David S. Cochran et al, and issued as U.S. Pat. No. 3,781,820 on Dec. 25, 1973.

In serial decimal adder/substractor 84 a correction (addition of 6) to a BCD sum must be made if the sum exceeds nine (a similar correction for subtraction is necessary). It is not known if a correction is needed until the first three bits of the sum have been generated. This is accomplished by adding a four-bit holding register 86 (A.sub.60 -A.sub.57) and inserting the corrected sum into a portion 88 (A.sub.56 -A.sub.53) of register A if a carry is generated. This holding register 86 is also required for the SHIFT A LEFT instruction. One of the characteristics of a decimal adder is that non-BCD codes (i.e. 1101) are not allowed. They will be modified if circulated through the adder. The adder logic is minimized to save circuit area. If four bit codes other than 0000-1001 are processed, they will be modified. This is no constraint for applications involving only numeric data (however, if ASC11 codes, for instance, are operated upon, incorrect results will be obtained).

Arithmetic and register circuit 20 receives the instruction during bit times b.sub.45 --b.sub.54. Of the ten types of instructions hereinafter described, arithmetic and register circuit must respond to only two types (namely, ARITHMETIC & REGISTER instructions and DATA ENTRY/DISPLAY instructions). ARITHMETIC & REGISTER instructions are coded by a 10 in the least significant two bits of I.sub.s register 90. When this combination is detected, the most significant five bits are saved in I.sub.s register 90 and decoded by instruction decoder 92 into one of 32 instructions.

The ARITHMETIC & REGISTER instructions are active or operative only when the Word Select signal (WS) generated in one of the ROM's 0-7 or in control and timing circuit 16 is at logic 1. For instance, suppose the instruction "A+C.fwdarw.C, mantissa with sign only" is called. Arithmetic and register circuit 20 decodes only A+C.fwdarw.C. It sets up registers A and C at the inputs to adder 84 and, when WS is high, directs the adder output to register C. Actual addition takes place only during bit times b.sub.12 to b.sub.55 (digits 3-13) since for the first three digit times the exponent and exponent sign are circulating and are directed unchanged back to their original registers. Thus, the word select signal is an "instruction enable" in arithmetic and register circuit 20 (when it is at logic 1, instruction execution takes place, and when it is at logic 0, recirculation of all registers continues).

The DATA ENTRY/DISPLAY instructions, except for digit entry, affect an entire register (the word select signal generated in the active ROM is at logic 1 for the entire word cycle). Some of these instructions are: up stack, down stack, memory exchange M.revreaction.C, and display on or toggle. A detailed description of their execution is given hereinafter.

For increased power savings display decoder 94 is partitioned to partially decode the BCD data into seven segments and a decimal point in arithmetic and register circuit 20 by using only five output lines (A-E) 38 with time as the other parameter. Information for seven segments (a-g) and a decimal point (dp) are time shared on the five output lines A-E. The output wave forms for output lines A-E are shown in FIG. 12. For example, output line D carries the segment e information during T.sub.1 (the first bit time of each digit time) and the segment D information during T.sub.2 (the second bit time of each digit time); and output E carries the segment G information during T.sub.1 , the segment F information during T.sub.2 , and the decimal point (dp) during T.sub.4 . The actual signals which would appear if a digit 9 were decoded are shown in FIG. 13. The decoding is completed in the anode driver of output display unit 14 as explained hereinafter.

The registers in arithmetic and register circuit 20 hold 14 digits comprising 10 mantissa digits, the mantissa sign, two exponent digits, and the exponent sign. Although the decimal point is not allocated a register position, it is given a full digit position in the output display. This apparent inconsistency is achieved by using both the A and B registers to hold display information. The A register is set up to hold the displayed number with the digits in the proper order. The B register is used as a masking register with digits 9 inserted for each display positiion that is to be blanked and a digit 2 at the decimal point location. When the anode driver of output display unit 14 detects a decimal point code during T.sub.4 , it provides a signal to the cathode driver of the output display unit to move to the next digit position. One digit and the decimal point share one of the 14 digit times. The digit 9 mask in register B allows both trailing and leading zeros to be blanked (i.e., by programming 9's into the B register). Use of all three working registers for display (i.e., the C register to retain the number in normalized form, the A register to hold the number in the displayed form, and the B register as a mask) allows the calculator to have both a floating point and a scientific display format at the expense of only a few more ROM states.

The display blanking is handled as follows. At time T.sub.4 the BCD digit is gated from register A into display buffer 96. If this digit is to be blanked, register B will contain a 9 (1001) so that at T.sub.4 the end bit (B.sub.01) of the B register will be a 1 (an 8 would therefore also work). The input to display buffer 96 is OR-ED with B.sub.01 and will be set to 1111 if the digit is to be blanked. The decimal point is handled in a similar way. A 2 (0010) is placed in register B at the decimal point location. At time T.sub.2 the decimal point buffer flip-flop is set by B.sub.01. Any digit with a one in the second position will set the decimal point (i.e., 2, 3, 6, or 7).

Display decoder 94 also applies a START signal to line 40. This signal is a word synchronization pulse, which resets the digit scanner in the cathode driver of output display unit 14 to assure that the cathode driver will select digit 1 when the digit 1 information is on outputs A, B, C, D, and E. The timing for this signal is shown in FIG. 14.

One other special decoding feature is required. A minus sign is represented in tens complement notation or sign and magnitude notation by the digit 9 in the sign location. However, the display must show only a minus sign (i.e., segment g). The digit 9 in register A in digit position 2 (exponent sign) or position 13 (mantissa sign) must be displayed as minus. The decoding circuitry uses the pulse on I.sub.s buss 28 at bit time b.sub.11 (see FIG. 3) to know that the digit 9 in digit position 2 of register A should be a minus and uses the SYNC pulse to know that the digit 9 in digit position 13 of register A should also be a minus. The pulse on I.sub.s buss 28 at bit time b.sub.11 can be set by a mask option, which allows the minus sign of the exponent to appear in other locations for other uses of the calculator circuits.

Clock Driver The bipolar clock driver 22, one phase of which is shown in FIG. 15, requires less than 25 milliwatts and can drive loads up to 300 picoforads with a voltage swing of +7 to -14 volts. An ENABLE input 98 allows both outputs Q.sub.1 and Q.sub.2 to be held to V.sub.cc , the MOS Logic O state. This is an effective means of strobing the clock. During dc operation, the transistor pair Q.sub.1 -Q.sub.2 allows only one of the output transistor pairs Q.sub.5 -Q.sub.6 or Q.sub.7 -Q.sub.8 to conduct. Diode D.sub.3 prohibits conduction from transistor Q.sub.6 to transistor Q.sub.8 during transient operation. Thus, the only possible transient short circuit current must flow from transistor Q.sub.5 to transistor Q.sub.7. However, the limited current handling capability of Q.sub.5 (a lateral PNP) limits this current to less than 5 milliamps peak. The input signals for clock driver 22 are generated on the anode driver of output display unit 14, and the outputs of the clock driver go to each of the MOS circuits in the system. The timing relationships are shown in FIG. 16.

Anode Driver

As discussed above, the display information is partially decoded in arithmetic and register circuit 20 and completely decoded into seven segment plus decimal point signals in the bipolar anode driver of output display unit 14. The anode driver also includes the basic clock generator for the system and a circuit for detecting low battery voltage to turn on all the decimal points. Such a circuit is shown and described in copending U.S. patent application Ser. No. 206,407 entitled LOW BATTERY VOLTAGE INDICATOR FOR A PORTABLE DIGITAL ELECTRONIC INSTRUMENT, filed on Dec. 9, 1971, by Thomas M. Whitney, and now abandoned. A logic diagram of the anode driver is shown in FIG. 17.

The clock generator uses an external LC series circuit to set the oscillator frequency. The advantages of an LC series circuit to set the frequency are: (1) the components can be specified to up to 2% tolerance; and (2) a crystal can be connected to the same external pin to set the frequency to 0.001% for timing applications.

The square-wave oscillator frequency (all times in this section will be referred to an 800 KHz oscillator frequency, which translates to a 200 KHz clock for the calculator, the actual frequency being somewhat less) is divided by flip-flop BL to 400 KHz. Flip-flops B1 and B2 are clocked off alternate phases of flip-flop B1 to provide two 200 KHz square waves as shown in FIG. 18. Flip-flop B3 is clocked from flip-flop B2 and in turn clocks flip-flop B4 to provide further count-down of the basic clock frequency. The two-phase clock signals Q.sub.1 and Q.sub.2 are generated from flip-flops BL and B1 and the 800 KHz oscillator 100. They are on for 625 nsec and separated by 625 .mu.sec as shown in FIG. 18. One other periodic signal is derived in the anode driver. Once each digit time a signal (counter-clock) is sent to the cathode driver of output display unit 14 (the trailing edge of this signal will step the display to the next digit).

The display consists of 15 characters while the basic calculator word cycle consists of 14 digits. The extra character is the decimal point. As explaind above, a BCD two is placed in register B at the digit position of the decimal point. The display decoder 94 in arithmetic and register circuit 20 indicates this by a signal on outputs B and E during bit time T.sub.4 (see FIG. 12). When this condition is decoded by the anode driver, the decimal point is excited and an extra counter clock signal is given to step the display to the next position (see FIGS. 18, 19, and 20). Therefore all remaining digits in register A are displaced one digit in the display.

FIGS. 19 and 20 show the simplified circuit and the timing relationship for the decimal point. The timing is critical since all the inductor current in segment b (the last to be excited) must be decayed before the counter clock signal is given to step to the next digit or the remaining current would be discharged through the wrong digit and a faint lighting of segment b on the same digit with the decimal point would occur. The decimal point insertion technique is the reason all other seven segments are excited during the first half of the digit time. The decimal point charging time is one-half that of the other segments. The decimal point segment gets the same current in one-half the time and is one-half as bright as the other segments.

An inductive circuit method of driving the light-emitting diodes is employed. Basically the method involves using the time it takes current to build up in an inductor to limit current, rather than using a resistor as is normally done with LED read-outs. This saves power since the only lossy components in the drive system are the parasitic inductor and transistor resistances. The drive circuit for one digit is shown in FIG. 21. Assuming the cathode transistor switch T.sub.c is closed, an anode switch T.sub.a is closed for 2.5 .mu.sec allowing the current to build up to a value I.sub.p along a nearly triangular waveform (the early part of an exponential buildup). When anode switch T.sub.a is opened, the current is dumped through the LED, decaying in about 5 .mu.sec. The anodes are strobed according to the sequence in FIG. 18. The primary reason for sequentially exciting the anodes is to reduce the peak cathode transistor current. Since the decay time is approximately twice the buildup time, it works out that the peak cathode current is about 2.5 times the peak current in any segment. The LED's are more efficient when excited at a low duty cycle. This means high currents for short periods (80 ma. anode current, 250 ma. cathode current). FIG. 18 also shows the relationship between the anode strobing sequence and the display output signals (A-E) from arithmetic and register circuit 20.

Since the anode driver operates from the battery voltage directly and drives the decimal point segment, a circuit is provided that senses when the voltage drops below a certain limit and thereupon turns on all decimal points. An external pin is provided to connect a trimming resistor to set the voltage where the indication is to occur.

Cathode Driver

The cathode driver of output display unit 14 comprises a 15 position shift register for scanning the 15 digit display once each word time. This scanning operation moves from digit to digit in response to counter clock signals from the anode driver. Once each word time a START signal arrives from arithmetic and register circuit 20 to restart the procedure. A block diagram is shown in FIG. 22.

Keyboard

The calculator employs a reliable, low-profile, low cost keyboard with tactile feedback such as that shown and described in copending U.S. patent application Ser. No. 173,754 entitled KEYBOARD HAVING SWITCHES WITH TACTILE FEEDBACK and filed on Aug. 23, 1971, by William W. Misson et al. The keyboard employs metal strips 102 with slots 104 etched or punched out as shown in FIG. 23, leaving an area which can be stretched to form small humps as shown in FIG. 24. The strips are spot welded to a printed circuit board such that orthogonal traces run under each hump. Pressing a key makes electrical contact between one of the horizontal strips and the corresponding vertical trace. The bounce is less than one millisecond (the calculator contains a wait loop to prevent double entries). Extensive life testing of the keyboard indicates more than a million cycles can be expected. Tolerances must be maintained carefully to prevent the possibility that a key is depressed but no contact is made and to insure uniformity.

One of the main advantages of the keyboard is the "over-center" or "fall away" feel. FIG. 25 shows a force-deflection curve for a typical key. As can be seen a force of about 100 grams must be exceeded before the metal hump "breaks" through. After this critical value the operator cannot prevent contact from being made. Similarly when the key is released, contact is maintained until a critical value when the hump bounces back. Again, past a critical point the operator cannot prevent the key from releasing. This type of action prevents a condition known as "teasing" in which a key is nearly depressed and slight movement causes multiple entries. The point on the force deflection curve at which contact is made or released is most desirably on the negative slope portion. In the calculator it is either there or exactly at the bottom (point A in FIG. 25), but never on the final positive slope portion.

LED Display

As mentioned above, the inductive drive technique employed for the LED display is inherently efficient because there are no dissipative components other than parasitic resistances and the forward voltage drop across saturated transistor switches. An inductive driver like that used in the calculator is shown and described in copending U.S. patent application Ser. No. 202,475 entitled LIGHT EMITTING DIODE DRIVER, filed on Nov. 26, 1971, by Donald K. Miller, and issued as U.S. Pat. No. 3,755,697 on Aug. 28, 1973.

The display circuitry used in the calculator is shown in FIG. 26. It comprises an 8 .times. 15 array of LED's in which the eight rows are scanned by the anode driver and the 15 columns by the cathode driver. The timing for this scanning was discussed above. A simplified circuit diagram for one segment is shown in FIG. 27. The equivalent piecewise-linear circuit model is shown in FIG. 28. An analysis of this model shows the inductor current buildup and discharge to be nearly linear for the parameters used in the calculator. The discharge-time to charge-time ratio is approximately: ##EQU1##

FIG. 29 shows the inductor current for a basic calculator clock frequency of 175 KHz. The average LED current can be calculated from the formula ##EQU2##

The worst case display power (i.e., 13 8's and two minus signs) is about 110 milliwatts. FIG. 29 also shows the ringing inherent with inductive drive.

Instruction Set

Every function performed by the calculator is implemented by a sequence of one or more ten-bit instructions stored in ROM's 0-7 of read-only memory circuit 18. The serial nature of the MOS calculator circuits allows the instruction bits to be decoded from LSB to MSB (right to left) serially. If the first bit is a one, the instruction is either a subroutine jump or a conditional branch as selected by the second bit, with eight bits left for an address. The next largest set of instructions, the arithmetic set, starts with a zero followed by a one (right to left), leaving eight bits for encoded instructions. The ten different types of instructions, employed by the calculator are shown in the table below.

There are two type 1 instructions, jump subroutine and conditional branch. They are decoded only by control and timing circuit 16. No word select is generated and all registers in arithmetic and register circuit 20 merely recirculate. The object of the jump subroutine instruction is to move to a new address in the ROM and to save the existing address (plus one) as a return address. The last instruction in a subroutine must be a RETURN to continue the program where it was left previously.

As discussed above, control and timing circuit 16 contains a 20 eight-bit shift register 58-62 which holds the current eight-bit ROM address and also has eight bits of storage for one return address (see FIG. 4). During bit times b.sub.47 -b.sub.54 the current ROM address flows through the adder 64 and is incremented by one. Normally, this address is updated each word time. However, if the first two bits of the instruction, which arrive at bit times b.sub.45 -b.sub.46 are 10, the incremented current address is routed to the return address portion 60 of the 20 eight-bit shift register and the remaining eight bits of the instruction, which are the subroutine address, are inserted into the address portion 58. These data paths with the JSB control line are shown in FIG. 4. In this way the return address has been saved and the jump address is ready to be transmitted to the ROM at bit times b.sub.19- b.sub.26 of the next word time.

The most frequently used instruction is the conditional branch, which based upon data or system status implements the decision-making capability of the calculator. In the calculator system described here this instruction also functions as an unconditional branch.

The format of the branch instruction, as shown in the instruction table above, is two ones followed by an eight-bit branch address. The instruction is received at bit times b.sub.45 -b.sub.54. The last eight bits of the instruction are stored in the address buffer register 68 (see FIG. 4). During the next word time the carry flip-flop 66 is checked at bit time b.sub.19. If the carry flip-flop was set during the previous word time, the current ROM address is transmitted to ROM's 0-7. If the carry flip-flop was not set, the branch address is read from the address buffer register 68 onto the I.sub.a buss 32 and loaded into the ROM address register 74 (see FIG. 6). Thus, the instruction is a BRANCH IF NO CARRY. There are three ways the carry flip-flop 66 can be set: (1) by a carry generated in the arithmetic and register circuit 20; (2) by a successful interrogation of the pointer position; and (3) by a successful interrogation of one of the 12 status bits. An example is given in the table below.

A typical test condition is to determine the sign of a number. Suppose at address P in the program a branch to location Q is desired if the sign of A is positive, while program execution is to continue if the sign is negative. In the example given in the table above, the instruction "increment the A register, word select of sign digit only" is given at location P. During word time N-1 the instruction is received by arithmetic and register circuit 20 and is executed at word time N (the same word time when the CONDITIONAL BRANCH instruction is received by control and timing circuit 16). If the sign of A is negative, there will be a nine in the sign digit. Incrementing this position will generate a carry and set the carry flip-flop 66 in control and timing circuit 16. Since the instruction is a branch if no carry is generated, the program execution will jump to location Q only if the sign is positive (i.e., was a zero), otherwise execution continues at P+2.

Note that during word time N+1 the calculator did nothing more than to select which of two addresses to send next (all registers merely recirculate). To perform a branch actually takes two word cycles to execute, one to ask a question and set the carry flip-flop 66 if the answer is YES, and the other to test if the CARRY flip-flop was set and transmit the proper address. In many cases the asking of the question is an arithmetic operation (i.e., A+B.fwdarw.A) which must be performed anyway. Then the branch takes only one extra instruction.

Contrary to most instruction sets, this set has no unconditional branch instruction. However, since an ordinary "jump" is one of the most used instructions, the conditional branch is also used as an unconditional branch or jump by insuring that the carry flip-flop 66 is reset when an unconditional branch is desired. This is the reason the sense of the conditional branch is BRANCH ON NO CARRY. The carry flip-flop 66 is reset during execution of every instruction except arithmetic (type 2) and interrogation of pointer or status (types 3 and 4). Since only arithmetic and interrogation instructions can set the carry flip-flop 66, the constraint is not severe. The jump subroutine instruction can also be used as an unconditional branch if the previous return address does not have to be saved. In summary, conditional branch can be used as an unconditional branch provided the state of the carry flip-flop 66 is known to be reset (i.e., provided the conditional branch does not follow an arithmetic or an interrogation of pointer or status instruction).

Arithmetic and register (Type 2) instructions apply to the arithmetic and register circuit 20 only. There are 32 arithmetic and register instructions divided into eight classes encoded by the left-hand five bits of the instruction. Each of these instructions can be combined with any of eight word select signals to give a total capability of 256 instructions. The 32 arithmetic and register instructions are listed in the table below.

1. Clear (3);

2. Transfer/Exchange (6);

3. Add/Subtract (7);

4. Compare (6);

5. Complement (2);

6. Increment (2);

7. Decrement (2); and

8. Shift (4).

There are three clear instructions. These instructions are O.fwdarw.A, O.fwdarw.B, and O.fwdarw.C. They are implemented by simply disabling all the gates entering the designated register. Since these instructions can be combined with any of the eight word select options, it is possible to clear a portion of a register or a single digit.

There are six transfer/exchange instructions. These instructions are A.fwdarw.B, B.fwdarw.C, C.fwdarw.A, A.revreaction.B, B.revreaction.C, and C.revreaction.A. This variety permits data in registers A, B, and C to be manipulated in many ways. Again, the power of the instruction must be viewed in conjunction with the word select option. Single digits can be exchanged or transferred.

There are seven add/subtract instructions which use the adder circuitry 84. They are A.+-.C.fwdarw.C, A.+-.B.fwdarw.a, A.+-.C.fwdarw.A, and C+C.fwdarw.C. The last instruction can be used to divide by five. This is accomplished by first adding the number to itself via c+C.fwdarw.C, multiplying by two, then shifting right one digit, and dividing by 10. The result is a divide by five. This is used in the square root routine.

There are six compare instructions. These instructions are always followed by a conditional branch. They are used to check the value of a register or a single digit in a register and still not modify or transfer the contents. These instructions may easily be found in the type two instruction table above since there is no transfer arrow present. They are:

1. 0-B (Compare B to zero);

2. A-C (Compare A and C);

3. c-1 (compare C to one);

4. 0-C (Compare C to zero);

5. A-B (Compare A and B); and

6. A-1 (Compare A to one).

If, for example, it is desired to branch if B is zero (or any digit or group of digits is zero as determined by WS), the 0-B instruction is followed by a conditional branch. If B was zero, no carry (or borrow) would be generated and the branch would occur.The instruction can be read: IF U.gtoreq.V THEN BRANCH. Again it is easy to compare single digits or a portion of a register by appropriate word select options.

There are two complement instructions. The number representation system in the calculator is sign and magnitude notation for the mantissa, and tens complement notation in the exponent field. Before numbers can be substracted, the subtrahend must be tens-complemented (i.e., 0-C.fwdarw.C). Other algorithms require the nines complement (i.e., 0-C-1.fwdarw.C).

There are four increment/decrement instructions (two of each). They are A.+-.1.fwdarw.A and C.+-.1.fwdarw.C.

There are four shift instructions. All three registers A, B, and C can be shifted right, while only A has a shift left capability. The arithmetic and register instructions set is summarized by class in the table below.

The 20 eight-bit register 58-62 in control and timing circuit 16 contains 12 status bits or flags used to remember conditions of an algorithm or some past event (e.g., the decimal point key has already been depressed). These flags can be individually set, reset, or interrogated or all bits can be cleared (reset simultaneously). The format for the status operation (type 3) instructions given in the instruction types table above is repeated below

If status bit N is one when the instruction "interrogate N" is executed, the CARRY flip-flop 66 in control and timing circuit 16 will be set. The status bit will remain set. Interrogate is always followed by a conditional branch instruction. The form of the interrogation is: "If status bit N=0, then branch", or "If status bit N.noteq.1, then branch." The reason for this negative orientation is that all branches occur if the test is false (i.e., CARRY flip-fop=0), a result derived from using the conditional and unconditional branches as the same instruction.

Status bit 0 is set when a key is depressed. If cleared it will be set every word time as long as the key is down.

A four-bit counter 44 in control and timing circuit 16 acts as a pointer or marker to allow arithmetic instructions to operate on a portion of a register. Instructions are available to set and interrogate the pointer at one of 14 locations or to increment or decrement the present position. The pointer instruction decoding is given in the table below.

As with the status interrogate instruction, the CARRY flip-flop 66 is set if the pointer is at P when the "pointer at P?" instruction is executed (as with status interrogation, the actual question is in the negative form: "IF P.noteq.N, THEN BRANCH " or "IF P = OTHER THAN N, THEN BRANCH"). This instruction would be followed by a conditional branch. In a math routine the pointer allows progressive operation on a larger and larger portion of a word. After each iteration (cycle) through a loop, the pointer is decremented (or incremented) and then tested for completion to force another iteration or a jump out of the loop.

The data entry and display (type 5) instructions are used to enter data into arithmetic and register circuit 20, manipulate the stack and memory registers, and blank the display (16 instructions in this set are not recognized by any of the existing circuits, and are therefore available for other external circuits that might be employed with other embodiments of the calculator). The table below contains a detailed decoding of the data entry and display (type 5) instructions.

The first set of 16 instructions (I.sub.5 I.sub.4 = 00) in this table are not used by any of the main MOS circuits. They may be used by additional circuits or external circuitry listening to the I.sub.s line such as may be employed with other embodiments of the calculator.

The next instruction (I.sub.5 I.sub.4 = 01) in this table is called the LOAD CONSTANT (LDC) or DIGIT ENTRY instruction. The four bits in I.sub.9 - I.sub.6 will be inserted into the C register at the location of the pointer, and the pointer will be decremented. This allows a constant, such as .pi. (pi), to be stored in ROM and transfered to arithmetic and register circuit 20. To transfer a ten-digit constant requires only 11 instructions (one to preset the pointer). Several exclusions exist in the use of this instruction. When used with the pointer in position 13, it cannot be followed by an arithmetic and register instruction (i.e., by Type 2 or 5 instructions as there are problems in common use of the five-bit I.sub.s buffer 91 in arithmetic and register circuit 20). With P=12, LDC can be followed by another LDC but not by any other type 2 or 5 instruction. When used with the pointer in position 14, the instruction has no effect. However, when P=12 and LDC is followed by a type 2 or 5 instruction, position 13 in register C is modified. Loading non-digit codes (1010--1111) is not allowed since they will be modified passing through the adder. The next set of instructions (I.sub.6 I.sub.5 I.sub.4 = 01X) in the type 5 instruction decoding table contains two display instructions and six stack or memory instructions. The display flip-flop in arithmetic and register circuit 20 controls blanking of all the LED's. When it is reset, the 1111 code is set into the display buffer 96, which is decoded so that no segments are on. There is one instruction to reset this flip-flop I.sub.9 I.sub.8 I.sub.7 = 100) and another to toggle it (000). The toggle feature is convenient for blinking the display.

The remaining instructions in the type 5 instruction decoding table include two affecting memory (Exchange C.revreaction.M and Recall M.fwdarw.C), three affecting the stack (Up, Down, and Rotate Down), one general clear, one for loading register A from I.sub.s buss 28 (namely, I.sub.7 I.sub.6 I.sub.5 = 011), and one for loading register C from BCD (111). Neither of the two last-mentioned instructions depends on bits I.sub.9, I.sub.8, or I.sub.4. The I.sub.s .fwdarw. A instruction is designed to allow a key code to be transmitted from a program storage circuit to arithmetic and register circuit 20 for display. The entire 56 bits are loaded although only two digits of informaton are of interest. The BCD .fwdarw. C instruction allows data input to arithmetic and register circuit 20 from a data storage circuit or other external source such as might be employed with other embodiments of the calculator.

The ROM select and other type six instructions are denoted by the pattern 10000 in instruction bits I.sub.4 - I.sub.0. The decoding table for these instructions is shown below.

The ROM SELECT instruction allows transfer of control from one ROM to another. Each ROM has a masking option which is programmed to decode bits I.sub.9 - I.sub.7. A Select ROM 3 instruction read from ROM 1 will reset the ROE flip-flop 70 in ROM 1 and set the ROE flip-flop 70 in ROM 3. The address is incremented in control and timing circuit 16 as usual. Thus, if Select ROM 3 is in location 197 in ROM 1, the first instruction read from ROM 3 will be location 198.

There are three ways to arrive at a desired address, on a different ROM as shown in FIG. 30. In path AA', a transfer (via an unconditional branch or a jump subroutine) to an address one before the desired address (L1) is executed in ROM N first. Then a ROM select M is given. In BB', the opposite order is shown (first ROM N select, then a transfer). Because the desired transfer location (L1 or L2) may already be occupied by an instruction, a third possibility may be used that is less efficient in states but does not depend on program locations. A transfer to L3 is made, then a ROM select, and then an additional transfer from L4 to the final desired location. With this method, L3 and L4 are overhead states.

Bits I.sub.6 I.sub.5 = 01 designate a subroutine return (RET). There are eight bits of storage in the 20 eight-bit shift register 58-62 of control and timing circuit 16 for retaining the return address when Jump Subroutine is executed. This address has already been incremented so execution of RET is simply a matter of outputting the address on I.sub.a line 32 at bit times b.sub.19 -b.sub.26 and also inserting it into the ROM address portion 58 of the shift register. It is also still retained in the return address portion 60.

A key code is entered into control and timing circuit 16 by depressing a key on the keyboard. A key depression is detected by a positive interrogation of status bit 0. During a computation the keyboard is locked out because this status bit would ordinarily not be interrogated until return to the display loop. The actual key depression saves the state of the system counter (which is also the key code) in the key code buffer 56 (see FIG. 4) and also sets status bit 0. Execution of the KEYBOARD ENTRY instruction routes the key code (6 bits) in the key code buffer 56 onto I.sub.a line 32 and into ROM address register 58 at bit times b.sub.19 -b.sub.26. The most significant two bits b.sub.25 and b.sub.26 are set to zero so that a keyboard entry always jumps to one of the first 64 states.

The data storage instructions given at the end of the TABLE OF TYPE SIX INSTRUCTION DECODING are used by auxiliary data storage circuit 25, which contains 10 56 bit shift registers. The first of these instructions alerts auxiliary data storage circuit 25 to listen to BCD line 35 for an address transmitted from the C register of arithmetic and register circuit 20. When an address is transmitted over BCD line 35, the selected shift register in auxiliary data storage circuit 25 is enabled. The other two of these instructions allow the selected register in auxiliary data storage circuit 25 to receive data from or send data to the C register of arithmetic and register circuit 20 over BCD line 35. Thus, an address type instruction is normally followed by a SEND DATA (i.e., BCD.fwdarw.C Register) or a RECEIVE DATA (i.e., C.fwdarw.BCD) instruction. More than one data transfer can take place with the same register without additional addressing instructions.

Two algorithms used in the calculator will now be discussed to further illustrate the instruction set. The first of these algorithms is a display wait loop, used after a key has been processed and while waiting for another key to be actuated. The second of these algorithms is a floating point multiply operation.

A flow diagram of the display wait loop is shown in FIG. 31. This loop is entered after a keystroke has been processed, register A has been properly loaded with the number to be displayed, and register B contains the display "mask" as discussed above. Two flags or status bits are required. Status bit 0 (S0) is hardwired in control and timing circuit 16 to automatically set whenever a key is down. Status bit 8 (S8) is used in this program to denote the fact that the key which is presently down has already been processed (since a routine may be finished before the key is released). In states D1S1 and D1S2 these two status bits are initialized. Then a loop is used as a time delay (about 14.4 ms.) to wait out any key bounce. In D1S4 status bit 8 (S8) is checked. The first time through the algorithm it must be 1 since it was set in D1S1 to denote the key has been processed. In state D1S5 the display is turned on (actually it is toggled since it must previously have been off; there is no DISPLAY ON instruction). At this time the answer appears to the user. In D1S6 status bit 0 (S0) is checked to see if a key is down. If not (i.e., S0=0), the previous key has been released, and status bit 8 (S8) is reset to 0 D1S7). The machine is now ready to accept a new key since the previous key has been processed and released. The algorithm cycles through D1S6 and D1S7 waiting for a new key. This is the basic wait cycle of the calculator. If S0=1 in D1S6, the key which is down may be the old key (i.e., the one just processed) or a new key. This can be determined upon return to D1s4 where status bit 8 (S8) is checked. If a new key is down (S8=0), execution jumps to D1S8, the display is blanked, and a jump out is made to service the key. A listing of the algorithm is given in the table below.

The floating point multiply algorithm multiplies x times y, where register C contains x in scientific notation and register D contains y (note that in the calculator register C corresponds to the user's X register and register D to the user's Y register). When the multiply key is depresssed, the wait loop algorithm will jump to a ROM address corresponding to the first step of the multiply algorithm because of the way the instruction KEYS .fwdarw. ROM ADDRESS (state D1S9 in FIG. 31) is executed. The key code actually becomes the next ROM address. At this time the contents of registers A-D are indicated by the following:

The algorithm for executing floating point multiply is given in the table below. The letters in parentheses indicate word select options as follows:

Referring now to FIGS. 1, 2, and 32, a calculator according to the present invention includes a Last-X function which automatically stores the currently displayed number (for example, the last entered from keyboard input unit 12 or the result of the last function performed by the calculator) in a Last-X shift register of auxiliary data storage circuit 25 whenever the next function to be performed by the calculator would destroy the currently displayed number. That stored number may then be immediately recalled and displayed by simply pressing a prefix key 110 and a Last-X key 12 of the keyboard input unit.

In order to perform this Last-X function, a Last-X subroutine is stored in ROM's 3 and 6, as shown in the detailed listing given below for those ROM's. In ROM 3 this subroutine begins on line 4 and ends on line 91, and in ROM 6 begins on line 99 and then jumps to line 165 and continues through line 187 where the subroutine terminates and the recalled number is then displayed. ROM's 3 and 6 are connected by IS instruction line 28 to auxiliary data storage circuit 25 where the Last-X function to be saved is stored. The latter circuit is connected to Start line 40 to synchronize operation of this circuit with the rest of the calculator and is also connected to arithmetic and register circuit 20 by BCD line 35. Referring to FIG. 32, the Last-X subroutine determines whether the currently displayed number would be destroyed by the next function to be performed by the calculator. The number is automatically stored in the Last-X register of auxiliary data storage circuit 25 if the key code of the next key actuated (i.e. the state of the system counter as described above with reference to FIG. 5) corresponds to any key except SCI/FIX, x><y, R.dwnarw., STO, RCL, ENTER, CHS, EEX, CLX and any numeric key or alternate function associated a numeric key.

The Last-X function is useful for correcting errors, such as pressing the wrong arithmetic operator key or entering the wrong number. For example, suppose one were performing a long calculation where the number 3 must be subtracted from the number 12, but instead of pressing the subtaction key, the division key is pressed and as a result the number 4 appears in the display. This error can be corrected by pressing the prefix key 110 and the Last-X key 112 to recall the number 3; by pressing the multiplication key to reverse the division and cause the number 12 to appear in the display; by again pressing the pefix key 110 and the Last-X key 112, to again recall the number 3 to the display; and, finally, by pressing the subtraction key to accomplish the operation originally intended. The convenience afforded by the Last-X function will be appreciated even more if instead of a single number like 3, the number destroyed by pressing the wrong function key were, for instance, 3,56789. The Last-X function is also useful for calculations involving the same number more than once. For exaple, sine N is multiplied by cosine N, were N equals 3.15672, by consecutively entering N, pressing the sine key, pressing the prefix key 110 and the Last-X key 112, pressing the cosine key, and pressing the multiplication key to obtain the final result. While the value of N was used twice in this calculation, it was entered into the calculator only once.

This invention also provides built-in conversion constants, accurate to ten digits, for conversion of a number to and from the following metric and U.S. systems of units: inches and centimeters; gallons and liters; and pounds and kilograms. These constants are: 1 inch = 2.540000000 centimeters; 1 pound = 0.453592370 kilograms; and 1 gallon = 3.785411784 liters. With reference to FIGS. 1, 2, and 33, 12 inches are converted to centimeters by consecutively entering the number 12, pressing the prefix key 110, pressing the centimeter/inches key 114 to obtain and display the conversion factor 2.540000000, and pressing the multiplication function key to obtain and display the result 30.48. Other conversion operations are similarly performed.

These conversions are implemented by storing each conversion constant directly in ROM 6, as part of a conversion subroutine. When the appropriate key is pressed, the instructions of this conversion subroutine load the constant into a particular register for appropriate combination with the entered number. Each conversion subroutine is given in detail below on lines 129-163 of the listing for ROM 6.

A similar feature of the present invention permits conversion of numerical quantities expressed in DMS to decimal notation and conversely. With reference to FIGS. 1, 2, and 34, a number expressed in DMS is converted to decimal notation by consecutively pressing the prefix key 110, pressing the DEG key 116 to set the calculaor in the degree mode, entering the digits representing the number one by one as if they were a homogeneous number, pressing the pefix key 110 again, and pressing the D MS.fwdarw. key 118 to compute and display the decimal degrees. The converse operation is accomplished by pressing the prefix key 110, pressing the DEG key 116, entering the decimal argument, pressing the prefix key 110 again, and pressing the .fwdarw.DMS key 122 to compute and display the final result in DMS The D.MS value is displayed in fixed point notation with four digits to the right of the decimal point regardless of what display format the operator may have otherwise specified. This is accomplished by means of a branch which avoids instructions that check the format setting and directs special entry of the DMS value downstream of the display program. Of the four digits shown to the right of the decimal point, the first two represent minutes and the last two represent seconds.

The implementation of the DMS conversion is accomplished by means of a conversion subroutine stored in ROM 0. The instructions relating to this conversion subroutine are given below on lines 1-19 and 80-96 of the listing for ROM 0.

A calculator according to the preferred embodiment of the present invention also calculates factorials and easily solves combination and permutation problems. Factorials can be calculated for positive integers from 0 to 69. For example, the factorial of the number 5 (i.e., 5-) can be calculated as shown in FIGS. 1, 2, and 37 by consecutively entering the number 5 into the calculator, pressing the prefix key 110, and pressing the factorial (n-) key 124 to obtain and display the result 120. This feature is implemented by a subroutine given below on lines 188-201 and 203-243 of the listing for ROM 6.

In the clock mode of the present invention, the calculator operates as a clock or a stopwatch which stores and displays split times. Referring to FIGS. 1, 2, 35 and 36, the clock mode operates as follows: a time of day is entered into the calculator display where the two digits to the left of the decimal point represent hours, the two digits immediately to the right of the decimal point represent minutes, the next two digits represent seconds, and the last two digits represent hundredths of a second. The clock mode is initiated by pressing Recall key (RCL) 118 followed by Enter key 116. Enter key 116 will always start the clock; Change Sign key (CHS) will toggle the clock and make it start or stop (whichever it is not doing when this key is pressed); Enter Exponent key (EEX) will blank or unblank the hundredths of a second portion of the display (whichever is not being done when this key is pressed), although the clock will continue running. The clear X key (CLX) clears the clock to zero, and the summation key (.SIGMA.+) always stops the clock.

Split times are stored by pressng a digit key while the clock is running, which stores the time at which the digit key is pressed in a storage register of the same number as the digit key pressed. If the clock is not running, pressing a digit key will recall the constant (e.g. previously stored split) in the register of the same number as the digit key pressed.

There are many applications for the clock mode of the present invention. For use as a stopwatch the clock is started when a race begins. When the first runner crosses the finish line, the "one" digit key is pressed and his time of arrival is stored in register one, without interrupting clock operation. When the second runner crosses the finish line, the "two" digit key is pressed and his time is stored in register two, and so forth up to ten finishers. At the end of the race, pressing the summation key (.SIGMA.+) stops the clock. Pressing the digit keys corresponding to the respective arrivals then recalls the elapsed time for each runner during the race.

The clock mode is based on the characteristic that the same number of instructions are executed by the calculator every one-hudredth of a second as controlled by the 800 KHz oscillator 100 shown in FIG. 17. Referring to FIG. 36, loops 1, 2, 3, 4 and 5 each never contain more than 35 instructions which is equal to the time taken to increment the hundredths-of-a-second register. While 35 instructions are required to adhere to the clock standard, many fewer than 35 instructions are required to execute any loop of the program. Therefore, loop execution must include additional instructions equivalent to the difference between 35 instructions and the number of instructions required to execute the loop. However, the amount of delay, i.e. the number of no-op code or other instructions to be added that are unrelated to operation of the clock, is "loop-dependent," since the number of instructions required to execute each loop is different. For example, during execution of loop 1, which is executed when there is no carry in the hudredths-of-a-second register, the status of the keys associated with clock control on the keybord is determined every one hundredth of a second until there is such a carry. During execution of loop 2, a few of the remainder of the 35 instructions available are used to zero the hundreds-of-a-second register and to add one to the seconds register. Every 59 seconds, a few more of the remainder of the 35 available instructions for execution of loop 3 are used to zero the seconds register and add one to the minutes register; every 59 minutes, some more of the remainder of the 35 available instructions for execution of loop 4 are used to zero the minutes register and increment the hours register; and finally every 12 hours a few more of the remainder of the 35 available instructions for execution of loop 5 are used to reset the hours register to one. Thus, every 12 hours the hundreds-of-a-second register is zeroed 360,000 times, the seconds register is zeroed 3,600 times and the minutes register is zeroed 60 times.

Detailed Listing of Routines and Subroutines of Instructions

A complete listing of all of the routines and subroutines of instructions employed by the calculator and of all of the constants employed by these routines and subroutines is given below. All of these routines, subroutines, and constants are stored in ROM's 0-7, as indicated at the top of the first page associated with each ROM. Each line in each ROM is separately numbered in the first column from the left-hand side of the page. This facilitates reference to different parts of the listing. Each address in ROM's 0-7 is represented in octal form in the second column from the left-hand side of the page. The first digit identifies which ROM, and the next three digits represent a nine-bit address (the L preceding these four digits is merely an address identifier). The instruction or constant stored in each address of ROM's 0-7 is represented in binary form in the third column from the left-hand side of the page. Branching addresses are represented in octal form by four digits in the fourth column from the left-hand side of the page. Explanatory comments are given in the remaining columns. ##SPC1## ##SPC2## ##SPC3## ##SPC4## ##SPC5##

OPERATING INSTRUCTIONS

All of the operations described below are controlled or initiated from the keyborad input unit 12 which is shown in FIG. 1.

Fundamental Operations

Getting Started

Slide the power switch to ON. The display blinks when an improper operations is made. The blinking will stop as soon as ##STR96## is pressed and you may enter a new problem.

Keyboard

Almost every key performs two distinct functions. The symbol for the primary function appears on the key, and the symbol for the alternate function appears above the key like this ##STR97## To use the primary function, merely press the selected key; to use the alternate function, press the prefix key 110 before pressing the associated key like this ##STR98## Alternate functions are indicated like this ##STR99## throughout the following pages.

Key In And Entering Numbers

Each time a number key is pressed, that number appears left-justified on the display in the order as pressed. Note that a decimal point symbol is included with the number entry keys; it must be keyed in if it is part of the number. For example, 314.32 would be keyed as ##STR100## To signal that the number string keyed in is complete, press ##STR101## Now you may key in another number string. If you make a mistake when keying in a number, clear the entire number string by pressing ##STR102## Then key in the correct number.

Performing Simple Arithmethic

In the calculator arithmetic answers appear on the display immediately after pressing ##STR103## In an adding machine, the ##STR104## adds whatever is already in the machine to the last entry, and the ##STR105## subtracts this last entry. The calculator not only adds and subtracts the same way as the familiar adding machine, it also multiplies and divides this way too--the ##STR106## multiplies whatever is already in the machine by the last entry, and the ##STR107## divides by the last entry. For example, add 12 and 3.

This same principle is used for calculating any arithmetic problem having two numbers and one arithmetic operator.

Correcting Input Errors

The calculator automatically stores the last number displayed (last input argument) that precedes the last function performed. For example, if you wanted to verify the last input argument from the example above,

A special storage register--LAST X-- is provided for this purpose. As each new function is keyed (executed), the contents of Last X are overwritten with the new value. ##STR112## is a very useful feature for correcting errors, such as pressing the wrong arithmetic operator key or entering the wrong number. For example, if you were performing a long calculation where you meant to subtract 3 from 12 and divided instead, you could compensate as follows:

If you want to correct a number in a long calculation, ##STR123## can save you from starting over. For example, divide 12 by 2.157 after you have divided by 3.157 in error.

Clearing

To clear the display, press ##STR134## To clear the entire calculator (except for certain data storage registers--more about that later), press ##STR135## (Notice that is isn't necessary --although it may be comforting -- to clear the calculator when starting a new calculation.) To clear everything, including all data storage registers, turn the calculator off then on.

Display And Rounding Options

Up to 15 characters can be displayed: mantissa sign, 10-digit mantissa, decimal point, exponent sign, and 2-digit exponent. Two display modes (fixed decimal and scientific notation) and a variety of rounding options are provided. Rounding options affect the display only; the calculator always maintains full accuracy internally. Fixed decimal notation is specified by pressing ##STR136## followed by the appropriate number key to specify the number of decimal places (0 - 9) to which the display is to be rounded. The display is left-justified and includes trailing zeros within the setting specified. When the calculator is turned on, the mode and decimal place settings are ##STR137## For example,

Scientific notation is useful when you are working with very large or very small numbers. It is specified by pressing ##STR149## followed by the appropriate number key to specify the number of decimal places (0 -9) to be displayed. Again, the display is left-justified and includes trailing zeros. For example,

Now return to 2 decimal places in fixed decimal notation.

Keying In Negative Numbers

To enter a negative number, key in the number, then press ##STR159## (change sign key). The number, preceded by a minus (-) sign, will appear on the display.

For example,

To change the sign of a negative or positive number on the display, press ##STR164## For example, to change the sign of -35.00 now in the display,

Keying In Exponents

You can key in numbers having exponents by pressing ##STR168## (Enter Exponent). For example, key in 15.6 trillion (15.6 .times. 10.sup.12), and multiply it by 25.

You can save time when keying in exact powers of ten by pressing ##STR177## and then pressing the desired power of ten. For example, key in 1 million (10.sup.6) and divide by 52.

To see your answer in scientific notation with 6 decimal places,

To key in negative exponents, key in the number, ##STR187## to make the exponent negative, then key in the power of 10. For example, key in Planck's constant (h) --roughly, 6.625 .times. 10.sup.-.sup.27 erg. sec--and multiply it by 50.

If you return to a ##STR198## 2 setting, the result is rounded to zero. For example

Finding Reciprocals

To calculate reciprocals of a display number, key in the number, then press ##STR202## 1020 For example, find the reciprocal of 25.

You can also calculate the reciprocal of a value in a previous calculation without re-entering the number. For example, calculate 1 (1/3+ 1/6).

Finding Square Roots

To calculate the square root of any displayed value, press ##STR214## For example, find the square root of 16.

Now find the square root of the result.

Squaring Numbers ##STR221## permits you to square numbers with a single keystroke. For example, what is the square of the result in the previous example?

Raising Numbers To Powers ##STR224## permits you to raise a positive number (both integers and decimals) to any power. For example, calculate 2.sup.9 (2.times.2.times.2.times.2.times.2.times.2.times.2.times.2.times.2).

Check different decimal settings

Because a logarithmic routine is used internally to compute ##STR234## the results may not be accurate to the last decimal place--as illustrated in the example above.

Now change the decimal setting back to 2 places and find 8.sup.1.2567.

In conjunction with ##STR241## provides a simple way to extract roots. For example, find the cube root of 5.

Sample Case:

Assume that a body moves along a straight line acording to the equation S = 1/2 t.sup.6 - 4t. T. Determine its velocity (V = 3t.sup.5 - 4) and acceleration (A = 15t.sup.4) at t = 2 seconds, where:

Solution:

.pi. is one of the fixed constants provided in the calculator. Merely press ##STR258## whenever you need it in a calculation before executing the applicable operation. For example, calculate 3.pi. .

Using Factorials

The ##STR262## function permits you to handle-combinations and permutations with ease. To caluclate the factorial of a displayed number merely press ##STR263## Factorials can be calculated for positive integers from 0 through 59. Attempting to calculate the factorial of a fractional on negative value is an improper operation and will result in a blinking display. The equation is: ##EQU3##

Sample Case 2, Combinations

Let a pair die be tossed 10 times. What is the probability that you will obtain the number 3 exactly 4 times in the 10 tosses? The required probability is given by the binomial law:

Calculating Percentage Problems

The calculator simplifies the calculation of percentage problems because you do not hve to convert percents to their decimal equivalents before using them; just press the ##STR301## after keying in the percent value. Three types of percentage problems are handled:

Finding percentage of number (base .times. rate)

Finding net amount (base + or - percentage)

Finding percent difference between a number and a base

Finding Percentage

To find the percentage of a number, key in the base number and press ##STR302## Then key in the percent and press ##STR303## For example, to find 14% of 300,

Finding Net Amount

An additional feature is that after finding the percentage, the calculator still contains the original base number from which you may calculate the net amount by simply pressing ##STR306## respectively. For example,

Finding Percent Difference Between Two Numbers

To find the percent differencee between a number and the base, enter the base number and press ##STR315## Enter the second number, press ##STR316## For example, if you want to find the rate of increase of your current mortgate payment ($240/mo) over what you were paying in rent 15 years ago ($70/mo),

OPERATIONAL STACK

Stack Registers

The calculator uses an operational stack and reverse "Polish" (Lukasiewicz notation.

The four temporary memory locations (number registers)-arranged in the form of a vertical stack--are called X (bottom register), Y, Z, and T (top register), respectively.

When you key in a number, it goes into the X-register--the bottom register and the only one displayed. When you press ##STR319## this number is duplicated into the Y-register. At the same time, y is moved up to Z and z is moved up to T like this:

When you press ##STR322## x is added to y, and the entire stack drops to display the answer in X. The same thing happens for ##STR323## Whenever the stack drops, t is duplicated from T into Z, and z drops to Y, as follows:

Look at the contents of the stack as we calculate (3 .times. 4) + (5 .times. 6). Directly above the keys pressed you see the information in X, Y, Z and T after the keystroke.

MANIPULATING THE STACK ##STR326## "rolls down" the stack and lets you review the contents (in last in-first out order) without losing data. It is also used to reposition data within the stack. Here is what happens each time you press ##STR327##

PERFORMING COMBINED ARITHMETIC PROCESSES

The calculator performs combined arithmetic operations --serial, mixed and chained calculations--with ease.

SERIAL CALCULATION

Any time a new number is entered after any calculation, the calculator performs an automatic ##STR338## on the result of the calculation. This feature permits a serial calculation having intermediate results to which a series of new values can be applied without your having to write down or store any of the intermediate results. For example, find the sum of 4, 6, 8 and 10.

The same principle applies to serial multiplication, division and subtraction too. Note that an equals key (=) is not needed since results are displayed when a function key is pressed.

CHAINED CALCULATION

Chained calculations can be used to find the sums of produces (adding the results to two or more multiplication operations) or the product of sums (multiplying the results of two or more addition operations).For example, if you sold 12 items at $1.58 each, 8 items at $2.67 each and 16 items at $0.54 each, the total sale price is:

MIXED CHAINED CALCULATION

Chain calculations can use any arithmetic operator--divide and subtract as well as multiply and divide. In addition, a problem may be calculated with any combination of arithmetic operators in both nested and linked operations. For example, to calculate

LAST X REGISTER

The last input argument of a calculation is automatically stored in the Last X register when a function is executed. This feature provides a handy error correction device, as well as a facility for reusing the same argument in multiple calculations-since it allows recall of the argument by pressing ##STR373## The register is cleared only when the calculator is turned off or when a new argument replaces (or overwrites) the previous one.

DATA STORAGE REGISTERS

In addition to the operational stack and Last X registers, the calculator provides 9 registers for user storage.

UNRESTRICTED STORAGE

Registers R.sub.1 - R.sub.4

Registers R.sub.1 -R.sub.4 can be used for temporary storage without restriction. Values stored in these registers are not affected by calculations or by clearing operations New values are entered by writing over the old contents; that is, by storing a new number. The contents are lost, however, when the calculator is turned off.

RESTRICTED STORAGE

Registers R.sub.5 - R.sub.8

Registers R.sub.5 - R.sub.8 are used internally when performing summations using ##STR374## When summations are not being performed, these registers may be used for general purpose storage. However, since registers R.sub.5 - R.sub.8 are not overwritten by new values, they must be cleared of existing values by pressing ##STR375## before they are used in summations.

Register R.sub.g

Register R.sub.9 is required internally when performing trigonometric functions and polar/rectangular conversions; any values stored there will be lost. Otherwise, register R.sub.g may be used for general purpose storage in a manner identical to registers R.sub.1 - R.sub.4.

STORING AND RECALLING DATA

To store a value appearing on the display (whether the result of a calculation or a keyboard entry), press ##STR376## then press the number key ##STR377## specifying the storage register. To retrieve the value press ##STR378## then press the applicable number key. A copy of the recalled value appears on the display (X-register); the original value remains in the specified constant storage register. The number previously on the display is loaded into the Y-register unless the keystroke immediately preceding ##STR379## (these keys do not cause the stack to be pushed up by the next data entry).

For example, add 8, 20, 17, 43; store the result in R.sub.1 ; and divide the individual numbers by the stored sum to find what part each is of the total.

PERFORMING REGISTER ARITHMETIC

Arithmetic operations (+, -, .times., .div.) can be performed between a data storage register and the X-register (display). To modify the contents of a storage register, press ##STR392## followed by the applicable operator key ##STR393## then the number key specifying the storage register. For example, store 6 in register R.sub.1, then increment it by 2.

to see what is now stored in register R.sub.1,

Now, subtract the register contents (8) from a displayed value (make it 13) and store the result back in the register R.sub.1.

Conversely, to alter a displayed value without affecting the stored value, press ##STR408## the applicable operator, then the number key specifying the storage register. For example, add the current value stored in register R.sub.1 (5.00) to a new entry (2).

Subtract the contents of register R.sub.1 from a new entry (11).

Now combine several operations.

METRIC/U.S. UNIT CONVERSION CONSTANTS

The calculator provides built-in conversion constants (accurate to 10 digits) for:

centimeters-to-inches and inches-to-centimeters (1 inch = 2.540000000 centimeters)

kilograms-to-pounds and pounds-to-kilograms (1 lb. = 0.453592370 kilograms)

liters-to-gallons and gallons-to-liters (1 gal. = 3.785411784 liters)

To use these constants, key in the measure to be converted, press ##STR415## then press the desired constant key followed by the applicable operator: ##STR416## to obtain metric equivalents, ##STR417## to obtain U.S. equivalents.

Note that it isn't necessary to press ##STR418## after keying in the initial value; the HP-45 calculator performs an automatic ##STR419## when a preprogrammed constant key is pressed or when a user stored constant is recalled. For example,

LOGARITHMIC AND EXPONENTIAL FUNCTIONS

The calculator computes both natural and common logarithms as well as their inverse functions (antilogarithms):

STATISTICAL FUNCTIONS

The statistical function ##STR429## is used to find the mean (arithmetic average) and standard deviation (measure of dispersion around the mean) of data entered and summed. Options are provided to enable you to interact with and modify results by adding new data or correcting errors. Also, the number of entries and sum of the squares-as well as the sum of entries in two dimensions-can be obtained. Summation/averaging calculations also use the ##STR430## to sum the numbers used in calculating means and standard deviations. Because the ##STR431## uses storage registers R.sub.5 -R.sub.8, these registers must be cleared with ##STR432## before pressing ##STR433## or errors could result.

Information is entered as follows:

Press ##STR434## to assure that registers R.sub.5 -R.sub.8 are clear of previous data. Key in each value and sum with ##STR435## To correct an incorrect value before it is loaded with the ##STR436## After the value is summed, correct by (a) reentering incorrect value, then (b) pressing ##STR437## followed by (c) entering correct value, and finally (d) pressing ##STR438## then continue entering values. The last ##STR439## pressed provides the number of entries. Press ##STR440## to obtain mean. Press ##STR441## to obtain standard deviation. If there are more values to be included--say, if you want to add to the data sample and modify results--key in and press ##STR442## after each.

Additional information is also available by performing steps 6 - 10 (in any order).

The following trigonometric functions are provided:

Note that trigonometric functions use storage register 9; any value stored there will be overwritten during a trigonometric calculation.

Angular Modes

Trigonometric functions can be performed in any one of three angular modes: decimal degrees, decimal radians and decimal grads--the latter being a 100th part of a right angle in the centesimal system of measuring angles. Note that trigonometric functions assume decimal angles regardless of angular mode. To select a mode, press ##STR461## then press the associated key: ##STR462## The mode selected will remain operative until a different mode is selected, or until the calculator is turned off; when turned back on, the calculator automatically defaults to decimal degrees mode.

Sample Case 1

Find the cosine of 35.degree.. If the calculator is not already in degrees mode, press ##STR463## before performing the calculation.

Sample Case 2

Find the tangent of 6 radians.

Sample Case 3

Find the arc sine of 0.5 in grads.

Degrees-Minutes-Seconds Conversion

Displayed angles can be converted from any decimal angular mode to degress-minutes-seconds, in the format dd.mmss, by pressing ##STR472## Conversely, to convert an angle displayed in degrees-minutes-seconds to the decimal equivalent in the specified angular mode, press ##STR473## This feature is also useful in calculating problems dealing with time (hours-minutes-seconds) too.

Note that the result of a ##STR474## Conversion is rounded to the nearest second both internally and on the display. Conversions involving angles .ltoreq.10.sup.5 degrees are an improper operation.

Sample Case 1

Assume surveyor want to add 2 angles: 10.degree. 8' 56" and 2.degree. 17' 42". These must first be converted to decimal degrees before adding and then converted back to degrees-minutes-seconds.

Sample Case 2

Find the arc sine of 0.55 in degrees mode and convert to degrees-minutes-seconds.

Sample Case 3

Using the data from Sample Case 2, above, calculate the arc sine of 0.55 in radians mode and convert the result to degrees-minutes-seconds.

POLAR/RECTANGULAR COORDINATE CONVERSION

Two functions are provided for polar/rectangular coordinate conversion. To convert values in X and Y-registers, (representing rectangular x, y coordinates, respectively) to polar r, .theta. coordinates (magnitude and angle, respectively), press ##STR491##

Conversely, to convert values in X and Y-registers (representing polar r, .theta., respectively) to rectangular coordinates (x, y, respectively), press ##STR492##

Because polar/rectangular conversions involve trigonometry, storage register 9 is used. Thus, any values previously stored in this register will be overwritten when coordinate conversions are performed.

Sample Case 1

Convert rectangular coordinates (4, 3) to polar form with the angle expressed in degrees.

Sample Case 2

Convert polar coordinates (8, 120.degree.) to rectangular coordinates.

By combining the polar/rectangular function with the accumulation function, ##STR501## you can add and subtract vector components. The sum of these are contained in storage registers R.sub.7 and R.sub.8 :

To display the contents of registers R.sub.7 and R.sub.8, press ##STR502## to obtain the sum of x-coordinates (register 7); then press ##STR503## to obtain the sum of y-coordinates (register 8).

OPERATING LIMITS

Accuracy

Accuracy specifications for the calculator depend on the operation performed. The elementary operations ##STR504## have a maximum error of .+-. 1 count in the 10th (least significant) digit. Errors in these elementary operations are caused by rounding answers to the 10th (least significant) digit. Percent ##STR505## and factorial ##STR506## functions are accurate to .+-. 1 count in the ninth digit. Values converted to degrees-minutes-seconds ##STR507## are rounded to the nearest second.

An example of round off error is seen when evaluating (.sqroot.5).sup.2. Rounding .sqroot.5 to 10 significant digits gives 2.236067977. Squaring this number gives the 19 digit product 4.999999997764872529. Rounding the square to 10 digits gives 4.999999998. If the next larger approximation (2.236067978) is squared, the result is 5.000000002237008484. Rounding this number to 10 significant digits gives 5.000000002. There simply is no 10-digit number whose square is 5.00000000.

Accurcy specifications for operations using the mean function ##STR508## depend upon the data used and number of entries.

The accuracy of the remaining operations (trigonometric, logarithmic and exponential) depends upon the argument. The answer that is displayed will be the correct answer for an input argument having a value that is within .+-.N counts (see table below) in the tenth (least significant) digit of the actual input argument. For example, 1.609437912 is given as the natural log of 5.

However, this is an approximation because the result displayed (1.609437912) is actually the natural log of a number between 4.999999998 and 5.000000002 which is .+-.2 counts (N = 2 for logarithms) in the 10th (least significant) digit of the actual input argument.

Underflow and Overflow Display Formats

To ensure greater accuracy, the calculator performs all calculations using a ten-digit number and a power of 10. This abbreviated form of expressing numbers is called scientific notation; i.e., 23712.45 = 2.371245 .times. 10.sup.4 in scientific notation.

If a number is too large for the display format specified, the calculator automatically displays the number in scientific notation. For example, if you keyed in 100, and pressed ##STR513## the calculator will display the number in scientific notation because there isn't enough room to display 8 digits after the decimal point

Numbers whose magnitude is less than 1, and are too small to be displayed in the specified ##STR517## are displayed as zero. For example, the number 0.000396 is displayed in

When a ##STR526## is used, values are displayed rounded to the number of decimal places specified. Values having a magnitude of .gtoreq. 10.sup.100 are displayed as .+-. 9.99999999999. Values having a magnitude of < 10.sup.-.sup.99 are displayed as zero.

Improper Operations

If you attempt a calculation containing an improper operation--say division by zero--an error signal is triggered and a blinking display appears. To clear, press ##STR527## or any other key that doesn't trigger another error. The following are examples of improper operations:

Claims

We claim:

1. An electronic calculator comprising: an input unit including a plurality of manually operable non-numeric and numeric keys for entering information and numbers into the calculator; a first memory unit coupled to the input unit and including a first storage register for storing a first number in units of decimal degrees having an integer portion and a decimal portion received therefrom, said integer portion referring to all digits to the left of the decimal in conventional decimal notation and said decimal portion referring to all digits to the right of the decimal in conventional decimal notation; a processing unit coupled to the input unit and the first memory unit and including means for converting the first number to a second number having first, second, and third parts representing said first number in units of degrees, minutes, and seconds respectively by multiplying the decimal portion of the first number by a preselected factor to provide a first result having an integer portion and a decimal portion and for multiplying the decimal portion of the first result by said preselected factor to provide a second result having an integer portion and a decimal portion; and an output display unit coupled to the processing unit for providing a visual display of the second number; said first part of the second number being the integer portion of the first number and appearing to the left of the decimal in said visual display; said second part of the second number being the integer portion of the first result and appearing in said visual display as the first two digits to the right of the decimal; said third part of the second number being the integer portion of the second result and appearing in said visual display as the second two digits to the right of the decimal.

2. An electronic calculator as in claim 1 wherein the preselected is the number 60.

3. An electronic calculator as in claim 1 wherein: said first number has first, second, and third parts representing units of degrees, minutes, and second, respectively; said second number has an integer portion and a decimal portion representing units of decimal degrees; and said means are effective for converting the first number to the second number by dividing the second part of the first number by the preselected factor to provide the first result and for dividing the third part of the first number by the preselected factor to provide the second result; said integer portion of the second number being the first part of the first number and appearing to the left of the decimal in said visual display; said first two digits of the decimal portion of the second number being the integer portion of the first result and appearing in said visual display as the first two digits to the right of the decimal; said second two digits of the decimal portion of the second number being the integer portion of the second result and appearing in said visual display as the second two digits to the right of the decimal.

4. An electronic calculator as in claim 3 wherein the preselected factor is the number 60.

5. An electronic calculator as in claim 3 for converting a first number in units of inches to a second number in units of centimeters wherein: first memory unit further includes a second storage register for storing a first preselected conversion factor; and the processing unit includes means responsive to actuation of one or more of the keys of the input unit for automatically multiplying the first number by said first preselected conversion factor to obtain the second number, and for causing the output display unit to provide a visual display thereof.

6. An electronic calculator as in claim 5 wherein the first preselected factor is 2.540000000.

7. An electronic calculator as in claim 3 for converting a first number in units of gallons to a second number in units of liters wherein: the first memory unit further includes a second storage register for storing a second preselected conversion factor; and the processing unit includes means reponsive to actuation of one or more of the keys of the input unit for automatically multiplying the first number by said second preselected conversion factor to obtain the second number, and for causing the output display unit to provide a visual display thereof.

8. An electronic claculator as in claim 7 wherein the second preselected factor is 0.453592370.

9. An electronic calculator as in claim 3 for converting a first number in units of pounds to a second number in units of centimeters wherein: the first memory unit further includes a second storage register for storing a third preselected conversion factor; and the processing unit includes means responsive to actuation of one or more of the keys of the input unit for automatically multiplying the first number by said third preselected conversion factor to obtain the second number, and for causing the output display unit to provide a visual display thereof.

10. An electronic calculator as in claim 9 wherein the third preselected factor is 3.785411784.

Patent Citations (4)

Patent	Date	Inventor
US3700872	1972-10-01	May
US3801803	1974-04-01	McDaniel
US3816731	1974-06-01	Jennings et al.
US3855459	1974-12-01	Hakata

Abstract

Description