Detecting Malfunction in Cylinders of Internal Combustion Engines

There is an undisputed need for rapid, accurate, reliable and inexpensive means for and method of testing and diagnosing malfunctioning in internal combustion engines of both the spark-ignition and the compression-ignition (diesel) types. The need can best be met by using electronic means, particularly by means including a minicomputer or microprocessor. One troublesome diagnostic task is determining whether the cause of irregular or inferior operation of an engine is due to causes affecting all cylinders in a random fashion, or to causes affecting only a particular one or ones of the cylinders. That is, parts of the ignition system and of the fuel-supplying system affect all cylinders randomly or equally, and other parts affect solely one cylinder. For example, a carburetor and an ignition timer each affect all cylinders, whereas a spark plug, a fuel injector, and a valve each affect only one cylinder.

A diagnostic apparatus and method for internal combustion engines relies on the fact that the speed of an engine crankshaft experiences an almost instantaneous increase during the firing of the fuel in each fully operative individual cylinder; and experiences an almost instantaneous decrease whenever a cylinder fails to fire or for any reason operates marginally. The deceleration rate during each power period (time from when one cylinder should ignite fuel to when next cylinder should ignite fuel) is compared with an average deceleration for the respective cylinder to identify a random malfunction affecting any cylinder. The average deceleration rates of the respective cylinders are compared to identify a malfunction affecting solely one cylinder in a very repetitive manner. Deceleration rates during a misfire are substantially constant at all engine speeds, so that the test comparisons validly can be made at any desired or convenient engine speed.

FIG. 1 is a block diagram of an internal combustion engine diagnostic system;

FIG. 2 is a detailed diagram of the elapsed time device in FIG. 1;

FIG. 3 is a chart of instantaneous speed changes in a normal engine;

FIG. 4 is a chart of instantaneous speed changes in an engine suffering a random misfire in one cylinder;

FIG. 5 is a chart of instantaneous speed changes in an engine suffering repeated misfiring in one cylinder;

FIGS. 6a and 6b are a flow chart of a program used in the computer in FIG. 1 to control the test procedure and compute the test results; and

FIG. 7 is a block diagram of an alternative apparatus for diagnosing malfunctions in individual cylinders of an internal combustion engine.

Referring now in greater detail to the drawing, FIG. 1 shows an internal combustion engine 10, equipped with a tachometer 12, from which electrical pulses are applied over line 13 to an elapsed time device 14. The elapsed time device (shown in detail in FIG. 2) operates under the control of a computer 16 to measure time intervals. The computer 16 computes the test results for display by a display device 18.

If the internal combustion engine 10 is a spark ignition engine, the tachometer 12 may be a conventional commercially available unit for obtaining one pulse per power period from the spark ignition system of the engine. If the internal combustion engine 10 is a compression-ignition or diesel engine, the tachometer 12 may be simply a housing with a shaft driven by the engine, and a tooth or teeth on the shaft which passes or pass a magnetic pick-up to produce one electrical pulse in the winding or coil of the pick-up for each tooth on the shaft. The pulse tachometer 12 produces one or more electrical pulses per power period of the engine, and these pulses are applied to an elapsed time device 14 which, if necessary reduces the number of pulses to one pulse per power period.

The engine test to be described utilizes one electrical pulse per power period. One full engine cycle is defined as the time taken for the engine to accomplish intake, compression, power and exhaust in one cylinder. One engine cycle occurs in one crankshaft revolution of a two stroke engine because all four functions are accomplished in two strokes of the piston. On the other hand; one engine cycle occurs during two crankshaft revolutions of a four-stroke engine because the four functions are accomplished in four strokes of the piston. There are as many power periods per engine cycle as there are cylinders in the engine being tested.

FIG. 2 is a circuit diagram of the elapsed time device 14 of FIG. 1. Device 14 receives electrical pulses from tachometer 12 over line 13 and applies them through a divide-by-N-counter 15 to a one-shot multivibrator 114. The divider 15 is provided if the tachometer used produces more than one pulse per power period. The output 29 from the divider 15 is one pulse per power period.

The elapsed time device 14 includes a 16-bit counter each consisting of four 4-bit integrated circuits 102. The counter counts the pulses applied over clock line 104 from a clock (not shown). The 16 outputs from the counter are coupled to 16 stages of a corresponding count latch consisting of integrated circuits 106. The count latch 106 receives and holds the count in the counter 102 when enabled by a transfer signal on line 108 from the transfer latch 112. Transfer latch 112 receives relatively infrequent pulses having a duration greater than the 0.1 msec duration of one cycle of the 10 kHz clock from a one-shot multivibrator 114, which responds to input pulses on line 29 from the divide-by-N counter 24.

The elapsed time unit 14 also includes a 16-bit buffer 126 consisting of four integrated circuits, which can be enabled over line 128 to transfer the 16-bit count in the count latch 106 to the computer 16 via the 16-conductor data bus 132. The buffer 126 is enabled by signals through inverter 134 from nand gate 136. Gate 136 provides an output when it receives both a device select signal over line DS from the computer and an appropriate "data in" control signal over line DI from the computer. In this way the computer can sample the data stored in the counter latches under program control as required. From the counter latches, the computer periodically receives the count which represents the time period between two pulses representative of the engine speed.

In normal operation the elapsed time device 14 is initialized by the computer 16 by a "start" signal applied over line 138 to nand gate 142, simultaneously with a device select signal over line DS. The output of gate 142 causes the third latch 124 to assume a "busy" state. The latch 124 remains in the busy state until set to the "done" state by a signal through inverter 144 from the one-shot 118 when the count in counter 102 is transferred to the count latch 106. The busy or done status of the counter of the timing unit is available to the computer 41 through line B and D whenever the gates 146 and 148 are enabled by a "device select" signal on line DS from the computer.

In summary, the elapsed time device 14 continually measures and latches the time periods between successive pulses occurring once per engine power period, and sets its own state to "done" each time an engine power time period is stored. The computer can then cause a transfer of the stored count in the latch through the buffer to the computer. The computer sets the timing device to the "busy" state whenever continued measuring of time periods is needed.

The elapsed time device 14 is not needed if the computer 16 employed includes a real time clock, and the program for the computer causes the computer to perform the time period measuring and storing function performed by the device 14.

The computer 16 may, by way of example only, be a "Nova 1200" minicomputer manufactured and sold by Data General Corporation, Southboro, Mass. 01772. The Nova 1200 is a low cost minicomputer designed for general purpose applications. It has a 16-bit word, multi-accumulator central processor, and a full memory cycle time of 1200 nanoseconds. It executes arithmetic and logical instructions in 1350 nanoseconds. The entire Nova 1200 central processor fits on a single 15-inch-square printed circuit subassembly board. The basic computer includes four thousand 16-bit words of core memory, a Teletype interface, programmed data transfer, automatic interrupt source identification, and a direct memory access channel. User programming conveniently can be in the BASIC language.

The display device 18 (FIG. 1) for use with the Nova 1200 computer may be a conventional Teletypewriter, a printer, a 4-digit display such as one including Numitron character display tubes, or any other similar display device.

The operation of the system of FIG. 1 will now be briefly described with references to the charts of FIGS. 3, 4, and 5, and later will be described in greater detail with references to the flow chart of FIG. 6.

In the initial cndition, the engine 10 is operated at an idle speed which may be any speed in the range of about 500, 600 or 700 rpm, the tachometer 12 supplies pulses to the elapsed time device 14 which is continuously counting the time periods between power period pulses after receiving a "start" signal from the computer 16. If the engine is operating normally at an idle speed of about 620 rpm, the data accumulated and processed by computer 16 may be as shown in Table 1-3 below, and as plotted in FIG. 3. The Input Time Periods listed in Table 1-3 correspond with the power periods bounded by the vertical lines in FIG. 3. The .DELTA. Time Measurements in Table 1-3 represent changes in Input Time Periods from one engine power period to the next engine power period. The Average Speed in Table 1-3 is the reciprocal of the Input Time Period for the corresponding engine power period multiplied by a constant so that the Average Speed is given in revolutions per minute (RPM). The Average Speed is represented in FIG. 3 by the horizontal lines in each power period at appropriate levels relative to the RPM scale at the left of the chart. The wavy line in FIG. 3 is a hand-drawn approximation of the instantaneous and continuous fluctuations in engine speed due to time-spaced explosions in individual cylinders in a normally functioning engine under test.

A random single misfire in one cylinder of a four-cylinder, four-cycle engine is represented by the data in Table 1-4 and the chart of FIG. 4. The misfire results in an abrupt reduction in instantaneous speed during the power period in which the misfire occurs.

Repeated misfires in the same one cylinder of the engine are represented by the data in Table 1-5 and the chart of FIG. 5. The three abrupt speed reductions shown occur in every fourth power period of the four cylinder engine.

The three engine conditions illustrated are distinguished by computing and comparing the deceleration rates between power periods during the test, which may extend over about 200 engine cycles. The three conditions are accurately and positively distinguished without regard for the actual idle speed of the engine during the test. It will be noted that the three illustrated tests were performed with the engine operating at average speeds of about 620 rpm, 750 rpm and 470 rpm. The actual speed reductions during misfires vary in accordance with engine speed, and therefore a simple comparison of speed change from one engine cycle to the next is not a reliable way to detect misfires at all idle speeds normally encountered in practice.

The last columns in each of Tables 1-3, 1-4 and 1-5 contain calculated deceleration rates between the corresponding engine cycle and the preceding engine cycle. Positive values represent deceleration, and negative values represent acceleration. A misfire is indicated whenever the deceleration rate exceeds 250. A deceleration rate exceeding 250 in the next following engine cycle is ignored because it is due to the preceding misfire.

The computer program, to be described in detail, first collects Input Time Periods for about 200 power periods in a four cycle engine. The average Deceleration Rate for the 50 power periods of each cylinder are calculated, and each individual Deceleration Rate is compared with the average Deceleration Rate for the respective cylinder to detect individual random misfires. If the number of random misfires exceeds a predetermined limit value, the conclusion EXCESSIVE RANDOM MISFIRES is displayed on the display device 18.

A comparison is also made of the average Deceleration Rates of the 50 power periods in the four different cylinders to determine the weakest cylinder having the largest average Deceleration Rate and the strongest cylinder having the smallest average Deceleration Rate. If the difference between the largest and smallest average Deceleration Rates exceeds a predetermined value, the conclusion CYLINDER POWER UNBALANCE is displayed on the display device 18. Otherwise, the conclusion PASSED IDLE PERFORMANCE TEST is displayed.

The operation of the system in performing the test of an internal combustion engine will now be described in detail with references to the flow chart of FIGS. 6a and 6b.

Reference is now made to FIG. 7 for a description of an alternative apparatus for detecting malfunctioning in individual cylinders of an internal combustion engine 10. The output pulses from the tachometer 12 are applied over lead 601 to a time delays unit 602 which has a plurality of outputs each of which provides output pulses having a desired delay relative to the input pulses on line 13. The purpose of time delays unit 602 is to provide gate-enabling pulses timed to insure the orderly transfer of counts from a counter 600 down through intervening units to a comparator 632. That is, data is transferred on from a unit slightly before new data is applied to the unit.

The power period counter 600 counts the input pulses applied to it from a clock 604. The clock 604 runs at a rate of 10 kHz or more in order to provide a sufficient resolution in the time periods measured by the counter 600 in the intervals between the applications of successive reset pulses thereto from the time delays unit 602.

The count in counter 600 is transferred to first register 606 through a gate 608, which is enabled over lead 609 from time delays unit 602 at a time slightly earlier than the time when a reset pulse is applied over line 13 to the counter 600. The gate symbol 608 represents an array of gates equal in number to the number of bits in the counter 600.

The count in the first register 606 is transferred through a gate 610 to a second register 612 every time the gate 610 is enabled over line 611, which is a time slightly earlier than the time when gate 608 is enabled.

The contents of the first register 606 and the contents of the second register 612 are simultaneously transferred through multi-unit gates 614 and 616, respectively, to the two inputs of a subtractor 618. These transfers are made by enabling the gates over line 617 at a time slightly prior to the time that gate 610 is enabled. The subtractor may, of course, be an adder in which the sign of one of the inputs is made to be negative, so that the addition performed is actually subtraction. The count in the second register 612 is subtracted from the count representing the following time period in the first register 606.

The time-difference-representing count produced by the subtractor is transferred to a comparator 620 through a multi-unit gate 622 when enabled over line 623 by a pulse occurring slightly prior to the pulse which enables gates 614 and 616. The comparator 620 also receives a count over multi-conductor line 621 which represents a time-difference reference value for comparison with the measured time difference from subtractor 618. If the measured time difference is greater than the reference value, the comparator 620 produces a misfire-representing output which is passed, if present, through multi-unit gate 624 enabled over line 625 to a misfire counter 626 at a time slightly after the time that gate 622 is enabled.

The misfire counter 626 is reset to zero by a pulse over line 627 from a test duration counter 628. The counter 628 receives pulses at the power period frequency over line 629 from time delays unit 602, and the counter 628 provides an output after counting a number, such as 200, if the input pulses to provide a time period during which the number of misfires are counted by the misfire counter 626.

The count in the misfire counter 626 is transferred out through multi-unit gate 630 when enabled by a pulse over line 631 from test duration counter 628 at a time slightly following the resetting of the misfire counter 626. The count passed by gate 630 is applied to a comparator 632 which also receives, at 633, a number-of-misfires reference value. If the measured number of misfires from misfire counter 626 exceeds the reference number of misfires entered at 633, the comparator provides a "test failed" output at 635. Otherwise, a "test passed" output is provided at 637.

The apparatus of FIG. 7 for detecting malfunctioning in individual cylinders of an internal combustion engine is seen to include a tachometer 12, a period counter 600 and a clock 604 for measuring the engine power time periods between crankshaft positions representing the successive ignition times in successively-fired cylinders of the engine. The subtractor 618 subtracts each measured time interval in the second register 612 from the following measured time period in first register 606 to detect whether there is a positive difference representing a momentary reduction in engine speed. The comparator 620 produces a fault output whenever a time difference exceeds a predetermined reference limit value, to provide an indication of a significant fault in an individual cylinder. The misfire counter 626 counts the number of faults occurring during a predetermined period. And, comparator 632 determines whether the number of faults exceeds a predetermined reference limit value above which engine performance is considered unsatisfactory.