Measurement Bandwidth Enhancement in Phase Lock Loops

The present invention relates to feedback control loops of the type wherein the loop error signal is measured. More particularly, the invention relates to increasing the effective bandwidth of the phase error signal in a phase lock loop.

It is known in the prior art to utilize the phase error signal in a phase lock loop as a measure of phase jitter appearing on an input signal. As examples of this technique, reference is made to U.S. Pat. Nos. 3,546,588 (to Campbell, Jr.) and 3,711,773 (to Hekimian et al). The phase error or measurement signal is derived from the loop phase detector and provides measure of phase modulation of the loop input signal over a band of phase modulation frequencies determined by the loop bandwidth. This loop bandwidth is normally designed as a compromise between optimum acquisition to achieve phase lock and optimum tracking to maintain phase lock. Specifically, acquisition is most optimally effected with a wide loop bandwidth wherein the loop can virtually instantaneously lock onto the signal; tracking, once phase lock is achieved, is most efficiently performed in a narrow band loop. Hence, there is a need for compromise in selecting loop bandwidth.

Quite often it is desirable to be able to measure phase jitter at phase modulation frequencies below the low frequency cut-off of the loop passband. One approach to doing this would be to re-design the loop to include the lower frequencies in the loop passband; however, this destroys the compromise referred to above and adversely affects the reliability of the loop operation in the tracking mode. Other possibilities exist, but they involve use of complex circuits and attendent cost increase.

It is therefore a primary object of the present invention to provide a simple and inexpensive technique for measuring phase jitter in a frequency band extending below the low frequency cut-off of a phase lock loop bandwidth without affecting loop operation or design.

It is another object of the present invention to provide a circuit which permits phase jitter measurement to be extended to phase modulation frequencies residing outside the bandwidth of a phase lock loop from which the measurement signal is derived.

In a broader context, it is an object of the present invention to provide a technique wherein the bandwidth of the error signal in a feedback loop can be expanded to frequencies below the low frequency cut off of the loop bandwidth without affecting loop operation.

According to the present invention, the phase error signal, derived from the phase detector in a phase lock loop, is summed with an integrated version of the VCO-controlling signal derived from the loop filter circuit. The combined effects of the loop filter and integrator provides an enhanced low frequency response which, when summed with phase error signal, provides a phase jitter measurement signal with a bandwidth extending below the low frequency cut-off of the loop itself. Loop operation remains unaffected in spite of the fact that part of the low frequency enhancement is derived from the loop filter.

The above and still further objects, features and advantages of the present invention will become apparent upon consideration of the following detailed description of one specific embodiment thereof, especially when taken in conjunction with the accompanying drawing, wherein:

The single FIGURE is a functional block diagram of a phase lock loop employing the measurement bandwidth enhancement technique of the present invention.

Referring to the drawing in greater detail, the illustrated circuit has as one of its functions the measurement of phase jitter appearing on the INPUT SIGNAL. The INPUT SIGNAL itself has a regular wave form (such as sinusoid, square wave, triangular wave, etc.) which is amplitude-limited and filtered at circuit 11 to provide a square wave at known nominal frequency. This signal is in turn applied to one input terminal of a phase detector 12 which may, for example, be an exclusive-OR gate as described in the aforementioned U.S. Pat. No. 3,711,773. The other input terminal of phase detector 12 receives a signal from voltage-controlled oscillator (VCO) 13 via limiter circuit 14. VCO 13 provides a signal of regular waveform at the same nominal frequency as the INPUT SIGNAL. Limiter 14 amplitude-limits the VCO signal to provide a square wave at the phase detector.

If phase detector 12 is an exclusive-OR gate, its output signal is a square wave of frequency twice the nominal frequency of the INPUT SIGNAL and VCO. The duty cycle of the phase detector output signal varies from 50% in proportion to variations from 90.degree. in the phase difference between the input and VCO signals. Therefore the duty cycle of the phase detector output signal provides a measure of the phase displacement between the two signals. This phase detector output signal is applied to a filter circuit 15 which is a low pass filter having a high cut-off frequency which is below the nominal frequency of the INPUT and VCO signals. Filter 15 therefore passes phase variations of interest but blocks the signal frequency. The effect is a duty cycle-to-DC conversion wherein the varying DC level follows INPUT signal phase variations.

The phase error signal from filter 15 is applied to the loop filter network 16 which has a low pass characteristic to limit the frequency response of VCO 13. Specifically, network 16 would typically have a high cut-off on the order of 5 Hz and thereby prevents the VCO from responding to short term input signal phase variations of less than 200 milliseconds duration. Shorter phase variations are in the nature of impulse noise which is measured by other equipment. The output signal from loop delay circuit is applied to VCO 13 to control the phase of the VCO output signal accordingly.

The circuit as thus far described, including elements 11-16, is conventional and well known. The VCO tracks INPUT SIGNAL phase variations, and the phase error signal provided by phase detector 12, through filter 15, serves as a phase measurement signal. As noted previously, filter 15 defines the upper frequency limit of the bandwidth of this phase measurement signal; the low frequency limit for the signal is somewhat higher than DC. This latter fact may best be understood by considering the INPUT SIGNAL phase as changing suddenly and then remaining at that new phase. The loop acts to change the VCO phase accordingly until the output signal from the phase detector has a 50% duty cycle and the output signal from filter 15 is at zero level. In other words, there is no DC response. In fact, the low frequency cut-off is typically on the order of 20 Hz, below which there is a heavily attenuated response at the output signal of filter 15. It is conventional to apply this signal to phase jitter metering circuitry through a high pass filter 17. Filter 17 has a low cut-off frequency (typically 10 Hz) below the low frequency cut-off of the signal from filter 15 and serves primarily to eliminate any DC component introduced by amplifier bias levels, etc. The signal passed to metering circuitry 22 from filter 17 therefore has a bandwidth which is limited at its low end by the low frequency cut-off of the phase lock loop bandwidth.

In order to permit phase jitter measurement at phase modulation frequencies below the loop cut-off frequency (i.e., in order to extend the low frequency response of the phase jitter measurement), I employ an integrator circuit 19 and summing circuit 20. Specifically, integrator 19 operates on the VCO control signal supplied by the loop filter 16. As illustrated, a high pass DC blocking filter, with a low frequency cut-off on the order of 1 or 2 Hz, may be employed to eliminate DC from the measurement. Integrator 19 is preferably not a pure integrator but instead would have a low pass response up to a few Hertz and a 6 db per octave roll off thereafter. This permits the operating point of the integrator to be determined. The output signal from integrator 19 is summed with the conventional phase measurement signal (from filter 15) at summing circuit 20. The summed output signal is applied through switch 21 to metering circuits 22. Switch 21, as shown, is connected to select the output signal from either of filter 17 or summing circuit 20 for metering.

The significance of this technique for enhancing the low frequency response of the measurement signal is the fact that advantage is taken of the low frequency "boost" provided by network 16 yet loop operation is in no way affected. This low frequency "boost" is further enhanced by the low frequency response characteristic of integrator 19. When this signal with a boosted low frequency response is summed with the phase error signal at circuit 20, the resulting signal has a wideband response corresponding to the bandwidth of the original error signal increased at its low end by the low frequency boost circuits. This can be illustrated mathematically by the following analysis wherein the effect of filter 15 is ignored because it affects the high frequency end of the passband which is not of interest.

The phase lock loop, by virtue of the presence of filter circuit 16 and VCO 13 (which acts an an integrator in the sense that the phase of its output signal is proportional to the integral of the applied control voltage), is a second order loop. The transfer function of a second order loop may be represented as follows: ##EQU1## wherein: .phi..sub.VCO is the phase of the VCO output signal; .phi..sub.IN is the phase of the INPUT SIGNAL, H(s) is the transfer function of the feedback path, considered here to be lumped in filter circuit 16; K.sub.1 is a constant dependent upon circuit components; s is a mathematical operator equal to j.omega.; and .omega. is frequency in radians. If the output signal amplitude from filter 15 is designated V.sub.A, then

wherein K.sub..phi. is a constant dependent upon the phase detector characteristic. Expression (2) can be re-arranged to yield: ##EQU2## Substituting from expression (1) into expression (3) and simplifying, ##EQU3## If the output signal from network 16 is designated V.sub.B , then

and dividing both sides through by .phi..sub.IN yields: ##EQU4## Substituting expression (4) for V.sub.A /.phi..sub.IN in expression (6), ##EQU5## If V.sub.B is integrated (as it is by integrator V.sub.I ), the output signal V.sub.I from the integrator is represented by dividing V.sub.B by s. Therefore, from expression (7), ##EQU6## wherein K.sub.I is a constant dependent upon the integrator circuit components. Summing expression (4) with expression (8) to represent the function of circuit 20, ##EQU7## From expression (9), it is clear that the response is flat (i.e., unity) for all values of s (i.e., all frequencies) if K.sub.I and K.sub.1 are equal. This can be achieved by proper selection of integrator circuit constants. In fact, the selection is made so that integrator 19 matches the integrating characteristic of VCO 13.

It is noted that the illustrated circuit permits measurement of phase jitter within the limited loop bandwidth (in the HI position of switch 21). The additional bandwidth is achieved with minimum additional cost and circuitry since it makes use of the low frequency boost supplied by loop filter network 16. On the other hand, loop operation is completely unaffected by the additional circuitry.

It should also be noted that the technique described herein for phase lock loops can be employed in other type feedback loops wherein it is desired to extend the low frequency end of the measurement signal passband bdyond the low frequency cut off of the loop response. In such a loop the phase detector would correspond to a comparator between the input and feedback signals, and the feedback signal would be controlled by the loop filter. The technique merely requires utilization of a circuit (to replace elements 18, 19) having a transfer characteristic which matches the transfer characteristic in feedback path between the loop filter 16 and the comparator 12. In second order loops, such as illustrated in the FIGURE, an integrator such as integrator 19 would be required because the feedback path in a second order loop would include an integrator such as VCO 13 (i.e. output phase is an integral function of input voltage). In a first order loop, no integrator would be required; rather a network having the same transfer function as the feedback path would be used.

While I have described and illustrated specific embodiments of my invention, it will be clear that variations of the details of construction which are specifically illustrated and described may be resorted to without departing from the true spirit and scope of the invention as defined in the appended claims.