DISTORTION CURRENT MITIGATION IN A RADIO FREQUENCY PLASMA PROCESSING CHAMBER

[0001] Embodiments of the present disclosure generally relate to a system used in semiconductor device manufacturing. More specifically, embodiments of the present disclosure relate to a plasma processing system used to process a substrate.

[0002] Reliably producing high aspect ratio features is one of the key technology challenges for the next generation of semiconductor devices. One method of forming high aspect ratio features uses a plasma-assisted etching process in which a plasma is formed in a processing chamber and ions from the plasma are accelerated towards a surface of a substrate to form openings in a material layer disposed beneath a mask layer formed on the surface of the substrate.

[0003] In a typical plasma-assisted etching process, the substrate is positioned on a substrate support disposed in a processing chamber, a plasma is formed over the substrate, and ions are accelerated from the plasma towards the substrate across a plasma sheath, i.e., region depleted of electrons, formed between the plasma and the surface of the substrate.

[0004] In certain cases, plasma processing may use a combination of input powers with different frequencies, for example, a low frequency pulsed voltage signal (e.g., at 100 kHz to 5 MHz) and a high frequency radio frequency (RF) signal (e.g., at 10 MHz to 200 MHz). The plasma and the oscillating sheath may constitute a nonlinear load, which may generate distortion currents from the input powers. The distortion currents may include sidebands of an RF signal, such as a band of frequencies higher or lower than the frequency of the RF signal. For example, if a high RF frequency f1 provided by a first source and a low pulsed voltage signal frequency f2 provided by a second source are used, the distortion currents may include the sum and/or difference of f1 and f2, resulting in sideband frequencies f1-f2 and f1+f2 that are close to the frequency f1. In certain cases, the distortion currents may include harmonic distortions. For example, if square pulse waveforms and tailored waveforms are used, a sum of harmonic frequencies associated with the waveforms can contribute to the sidebands. The distortion currents may travel back to the power source (e.g., an RF signal generator) manifesting as reflected power. A signal filter may be arranged at the output the RF signal generator to protect the RF signal generator from the low frequency bias power provided in the pulse voltage signal generated from the low frequency source. The signal filter may not be able to block all of the reflected distortion currents coming back from the plasma load. RF reflected powers may be monitored and trigger the system safety interlock loop to protect against sudden abnormal changes in a process chamber. Such safety measures may interrupt the substrate processing operations. In certain cases, the reflected power can damage the power source and/or other electrical components. In certain cases, the reflected power can also affect the results of substrate processing.

[0005] Accordingly, there is a need in the art for plasma processing and biasing methods that are able to mitigate the effect of distortion currents on plasma-assisted etching process results and plasma-assisted etching hardware.

[0006] Embodiments provided herein generally include apparatus, plasma processing systems and methods for generation of a waveform for plasma processing of a substrate in a processing chamber.

[0007] One embodiment of the present disclosure is directed to a plasma processing system. The plasma processing system generally includes a voltage source coupled to an input node, which is coupled to an electrode disposed within a processing chamber, wherein the voltage source is configured to generate a pulsed voltage signal at the input node; a radio frequency (RF) signal generator having an output, wherein the RF signal generator is configured to deliver a first RF signal at a first RF frequency to the input node; a bandpass filter coupled between the output of the RF signal generator and the input node, wherein the bandpass filter is configured to attenuate second RF signals that are outside a range of frequencies that include the first RF frequency of the first RF signal; and an impedance matching circuit coupled between the bandpass filter and the input node.

[0008] One embodiment of the present disclosure is directed to a plasma processing system. The plasma processing system generally includes a voltage source coupled to an input node coupled to an electrode disposed within a processing chamber, wherein the voltage source is configured to generate a pulsed voltage signal at the input node; a RF signal generator having an output, wherein the RF signal generator is configured to generate the RF signal overlaid on the pulsed voltage signal at the input node; and an RF circulator coupled between the output of the RF signal generator and the input node. The plasma processing system further includes a memory and a processor coupled to the memory. The process and the memory are configured to monitor a power of signals reflected from the processing chamber at the RF circulator, and stop generation of the RF signal at the RF signal generator if the monitored power is greater than or equal to a threshold for a duration.

[0009] One embodiment of the present disclosure is directed to a method of processing a substrate. The method generally includes generating, by a voltage source, a pulsed voltage signal at an input node coupled to an electrode disposed within a processing chamber; and delivering, by a signal generator, a first RF signal through at least a bandpass filter to the input node, wherein: the first RF signal comprises a first RF frequency, the bandpass filter is disposed between the RF signal generator and the input node, an impedance matching circuit is disposed between the bandpass filter and the input node, and the bandpass filter is configured to attenuate second RF signals that are outside of a range of frequencies including the first RF frequency of the first RF signal.

[0021] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one aspect may be beneficially utilized on other aspects without specific recitation.

[0022] With technology node advancing towards 2 nm, fabrication of smaller features with larger aspect ratios involve atomic precision for plasma processing. For etching processes where the plasma ions play an important role, ion energy control is challenging the semiconductor equipment industry. Traditionally, RF biased techniques use a sinusoidal wave to excite plasma and accelerate ions.

[0023] Some embodiments of the present disclosure are generally directed to techniques and apparatus for mitigation of distortion currents reflected back to signal source(s) from a complex plasma load. For example, a bandpass filter can be arranged between an output of a radio frequency (RF) signal generator and the plasma load. In certain aspects, tuning of the RF signal generator and/or bandpass filter may be used to increase the input power to the plasma load and/or attenuate the distortion currents from the plasma load. For certain aspects, an RF circulator can may be arranged between the output of the RF signal generator and the plasma load to isolate the RF signal generator from the distortion currents. In some aspects, a bandpass filter, an RF match and a signal filter can be arranged in sequential order between an output of an RF signal generator and the plasma load.

[0024] The techniques and apparatus for distortion current mitigation described herein may protect certain electrical devices (e.g., signal sources) from electrical damage, enable substrate processing operations without interruptions due to reflected powers, and/or facilitate higher energy substrate processing operations.

[0025] FIG. 1 is a schematic cross-sectional view of a plasma processing system 10 configured to perform one or more of the plasma processing methods set forth herein. In some embodiments, the processing system 10 is configured for plasma-assisted etching processes, such as a reactive ion etch (RIE) plasma processing. However, it should be noted that the embodiments described herein may be also be used with processing systems configured for use in other plasma-assisted processes, such as plasma-enhanced deposition processes, for example, plasma-enhanced chemical vapor deposition (PECVD) processes, plasma-enhanced physical vapor deposition (PEPVD) processes, plasma-enhanced atomic layer deposition (PEALD) processes, plasma treatment processing or plasma-based ion implant processing, for example, plasma doping (PLAD) processing.

[0026] As shown, the processing system 10 is configured to form a capacitively coupled plasma (CCP), where the processing chamber 100 include an upper electrode (e.g., chamber lid 123) disposed in a processing volume 129 facing a lower electrode (e.g., the substrate support assembly 136) also disposed in the processing volume 129. In a typical capacitively coupled plasma (CCP) processing system, a radio frequency (RF) source is electrically coupled to one of the upper or lower electrode delivers an RF signal configured to ignite and maintain a plasma (e.g., the plasma 101), which is capacitively coupled to each of the upper and lower electrodes and is disposed in a processing region therebetween. Typically, the opposing one of the upper or lower electrodes is coupled to ground or to a second RF power source for additional plasma excitation. As shown, the processing system 10 includes a processing chamber 100, a support assembly 136, and a system controller 126.

[0027] The processing chamber 100 typically includes a chamber body 113 that includes the chamber lid 123, one or more sidewalls 122, and a chamber base 124, which collectively define the processing volume 129. The one or more sidewalls 122 and chamber base 124 generally include materials that are sized and shaped to form the structural support for the elements of the processing chamber 100 and are configured to withstand the pressures and added energy applied to them while a plasma 101 is generated within a vacuum environment maintained in the processing volume 129 of the processing chamber 100 during processing. In one example, the one or more sidewalls 122 and chamber base 124 are formed from a metal, such as aluminum, an aluminum alloy, or a stainless steel alloy.

[0028] A gas inlet 128 disposed through the chamber lid 123 is used to deliver one or more processing gases to the processing volume 129 from a processing gas source 119 that is in fluid communication therewith. A substrate 103 is loaded into, and removed from, the processing volume 129 through an opening (not shown) in one of the one or more sidewalls 122, which is sealed with a slit valve (not shown) during plasma processing of the substrate 103.

[0029] In some embodiments, a plurality of lift pins (not shown) movably disposed through openings formed in the substrate support assembly 136 are used to facilitate substrate transfer to and from a substrate supporting surface 105A. In some embodiments, the plurality of lift pins 132 are disposed above and are coupled to and/or are engageable with a lift pin hoop (not shown) disposed in the processing volume 129. The lift pin hoop may be coupled to a shaft (not shown) that sealingly extends through the chamber base 124. The shaft may be coupled to an actuator (not shown) that is used to raise and lower the lift pin hoop. When the lift pin hoop is in a raised position, it engages with the plurality of lift pins 132 to raise the upper surfaces of the lift pins above the substrate supporting surface 105A, lifting the substrate 103 therefrom and enabling access to a non-active (backside) surface the substrate 103 by a robot handler (not shown). When the lift pin hoop is in a lowered position, the plurality of lift pins 132 are flush with or recessed below the substrate supporting surface 105A, and the substrate 103 rests thereon.

[0030] The system controller 126, also referred to herein as a processing chamber controller, includes a central processing unit (CPU) 133, a memory 134, and support circuits 135. The system controller 126 is used to control the process sequence used to process the substrate 103, including performing certain aspects of the distortion current mitigation as further described herein. The CPU 133 is a general-purpose computer processor configured for use in an industrial setting for controlling the processing chamber and sub-processors related thereto. The memory 134 described herein, which is generally non-volatile memory, may include random access memory, read-only memory, floppy or hard disk drive, or other suitable forms of digital storage, local or remote. The support circuits 135 are conventionally coupled to the CPU 133 and comprise cache, clock circuits, input/output subsystems, power supplies, and the like, and combinations thereof. Software instructions (program) and data can be coded and stored within the memory 134 for instructing a processor within the CPU 133. A software program (or computer instructions) readable by CPU 133 in the system controller 126 determines which tasks are performable by the components in the processing system 10.

[0031] Typically, the program, which is readable by CPU 133 in the system controller 126, includes code, which, when executed by the processor (CPU 133), performs tasks relating to the plasma processing schemes described herein. The program may include instructions that are used to control the various hardware and electrical components within the processing system 10 to perform the various process tasks and various process sequences used to implement the methods described herein. In one embodiment, the program includes instructions that are used to perform one or more of the operations described below in relation to FIG. 6 and/or FIG. 8.

[0032] The plasma control system generally includes a first source assembly 196 for establishing at least a first pulsed voltage (PV) waveform at a bias electrode 104 (on a complex load as depicted in FIGS. 4A, 4B, and 4C), and a second source assembly 197 for establishing at least a second PV waveform at an edge control electrode 115. The first PV waveform or the second PV waveform may be generated using one or more components (e.g., PV sources) within a waveform generator assembly 150, which may correspond to a voltage source and/or current source as described in more detail herein with respect to FIGS. 4A, 4B and 4C. In some embodiments, the waveform generator assembly 150 is configured to generate pulsed voltage (PV) waveform, wherein the PV waveform is a non-sinusoidal voltage pulse. FIGS. 2A and 2B illustrate examples of a typical PV waveforms that are generated at an electrode and substrate, respectively, and may be used in conjunction with one or more embodiments of the disclosure provided herein. In one example, the waveform generator assembly 150 is configured to deliver PV pulses at frequencies between about 100 kHz to 400 kHz and voltages between about 100 volts and 10,000 volts.

[0033] In some embodiments, as shown in FIG. 1, a separate waveform generator assembly 160 within a third source assembly 198 includes at least an RF signal generator that is configured to deliver an RF signal to the support base 107 (e.g., power electrode or cathode) and/or bias electrode 104. In some embodiments, the waveform generator assembly 160 delivers an RF signal to the support base 107 (e.g., power electrode or cathode) and/or bias electrode 104, and thus may be used to generate (maintain and/or ignite) a plasma 101 in a processing region disposed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the third source assembly 198 may alternately be coupled to the chamber lid 123, such as in place of the ground shown in FIG. 1.

[0034] For certain aspects, a distortion current manager 152, impedance matching circuit 153, and/or a signal filter 154 may be arranged between the waveform generator assembly 160 within the third source assembly 198 and the support base 107 (e.g., power electrode or cathode) and/or bias electrode 104. In some embodiments in which the waveform generator assembly 160 is configured to generate an RF signal and a waveform generator assembly 150 is configured to generate a lower frequency signal, the signal filter 154 is a high-pass filter that is configured to allow a signal provided from the waveform generator assembly 160 to be delivered through the signal filter 154 and to the support base 107 and/or bias electrode 104. The support base 107, bias electrode 104, and/or edge control electrode 115 may be collectively and/or individually referred to as an input node of the processing chamber 100. In this example, the impedance matching circuit 153 may be arranged between the distortion current manager 152 and the signal filter 154.

[0035] The distortion current manager 152 may be configured to block and/or attenuate the distortion currents reflected back to the waveform generator assembly 160 from the plasma load. For example, the distortion current manager 152 may include a bandpass filter and/or an RF circulator as further described herein.

[0036] The impedance matching circuit 153 may be configured to match the input impedance of the input node. For example, the output impedance of the waveform generator assembly 150 may be matched via the impedance matching circuit 153 to the input impedance of the input node. The impedance matching circuit 153 may enable efficient transfer of power from the waveform generator assembly 160 to the input node.

[0037] The signal filter 154 may be configured to allow the RF signal generated by the waveform generator assembly 160 to travel to the input node. In certain aspects, the signal filter 154 may include a high pass filter. The signal filter 154 may isolate the waveform generator assembly 160 of the third source assembly 198 from the low frequency signals generated by the other waveform generator assemblies 150 of the first source assembly 196 and/or the second source assembly 197.

[0038] The applied waveforms provided from the first source assembly 196, the second source assembly 197 and/or the third source assembly 198 may be configured to generate (maintain and/or ignite) a plasma 101 in a processing region disposed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the RF signal provided from the waveform generator assembly 160 is used to ignite and maintain a processing plasma 101 using the processing gases disposed in the processing volume 129 and fields generated by the RF power (RF signal) delivered to the support base 107 and/or bias electrode 104. In some aspects, the RF signal may be generated by an RF signal generator (not shown) disposed within the waveform generator assembly 160. In some embodiments, the RF signal generator of the waveform generator assembly 160 may be configured to deliver an RF signal having a frequency that is greater than 1 MHz and/or between 2 MHz and 200 MHz, such as 13.56 MHz, 40 MHz, 60 MHz, 120 MHz, or 162 MHz.

[0039] The processing volume 129 is fluidly coupled to one or more dedicated vacuum pumps through a vacuum outlet 120, which maintain the processing volume 129 at subatmospheric pressure conditions and evacuate processing and/or other gases, therefrom. In some embodiments, the substrate support assembly 136, disposed in the processing volume 129, is disposed on a support shaft 138 that is grounded and extends through the chamber base 124.

[0040] The substrate support assembly 136, as briefly discussed above, generally includes the substrate support 105 (e.g., an electrostatic chuck (ESC) substrate support) and support base 107. In some embodiments, the substrate support assembly 136 can additionally include an insulator plate 111 and a ground plate 112, as is discussed further below. The support base 107 is electrically isolated from the chamber base 124 by the insulator plate 111, and the ground plate 112 is interposed between the insulator plate 111 and the chamber base 124. The substrate support 105 is thermally coupled to and disposed on the support base 107. In some embodiments, the support base 107 is configured to regulate the temperature of the substrate support 105, and the substrate 103 disposed on the substrate support 105, during substrate processing. In some embodiments, the support base 107 includes one or more cooling channels (not shown) disposed therein that are fluidly coupled to, and in fluid communication with, a coolant source (not shown), such as a refrigerant source or water source having a relatively high electrical resistance. In some embodiments, the substrate support 105 includes a heater (not shown), such as a resistive heating element embedded in the dielectric material thereof. Herein, the support base 107 is formed of a corrosion-resistant thermally conductive material, such as a corrosion-resistant metal, for example aluminum, an aluminum alloy, or a stainless steel and is coupled to the substrate support with an adhesive or by mechanical means.

[0041] Typically, the substrate support 105 is formed of a dielectric material, such as a bulk sintered ceramic material, such as a corrosion-resistant metal oxide or metal nitride material, for example, aluminum oxide (Al₂O₃), aluminum nitride (AlN), titanium oxide (TiO), titanium nitride (TiN), yttrium oxide (Y₂O₃), mixtures thereof, or combinations thereof. In embodiments herein, the substrate support 105 further includes the bias electrode 104 embedded in the dielectric material thereof.

[0042] In one configuration, the bias electrode 104 is a chucking pole used to secure (i.e., chuck) the substrate 103 to the substrate supporting surface 105A of the substrate support 105 and to bias the substrate 103 with respect to the processing plasma 101 using one or more of the pulsed-voltage biasing schemes described herein. Typically, the bias electrode 104 is formed of one or more electrically conductive parts, such as one or more metal meshes, foils, plates, or combinations thereof.

[0043] In some embodiments, the bias electrode 104 is electrically coupled to a clamping network, or high voltage DC supply 312 (FIG. 3), which provides a chucking voltage thereto, such as static DC voltage between about -5000 V and about 5000 V, using an electrical conductor, such as the coaxial power delivery line 106 (e.g., a coaxial cable). The clamping network includes a DC power supply 155 (e.g., a high voltage DC (HVDC) supply) and a filter 151 (e.g., a low-pass filter).

[0044] The substrate support assembly 136 may further include the edge control electrode 115 that is positioned below the edge ring 114 and surrounds the bias electrode 104 and/or is disposed a distance from a center of the bias electrode 104. In general, for a processing chamber 100 that is configured to process circular substrates, the edge control electrode 115 is annular in shape, is made from a conductive material, and is configured to surround at least a portion of the bias electrode 104. In some embodiments, such as shown in FIG. 1, the edge control electrode 115 is positioned within a region of the substrate support 105. In some embodiments, as illustrated in FIG. 1, the edge control electrode 115 includes a conductive mesh, foil, and/or plate that is disposed a similar distance (i.e., Z-direction) from the substrate supporting surface 105A of the substrate support 105 as the bias electrode 104.

[0045] The edge control electrode 115 can be biased by use of a waveform generator assembly that is different from the waveform generator assembly 150, which is used to bias the bias electrode 104. In some embodiments, the edge control electrode 115 can be biased by use of a waveform generator assembly 150 that is also used to bias the bias electrode 104 by splitting part of the power to the edge control electrode 115. In one configuration, a first waveform generator assembly 150 of the first source assembly 196 is configured to bias the bias electrode 104, and a second waveform generator assembly 150 of a second source assembly 197 is configured to bias the edge control electrode 115.

[0046] In one embodiment, a power delivery line 157 electrically connects the output of the waveform generator assembly 150 of the first source assembly 196 to the bias electrode 104. While the discussion below primarily discusses the power delivery line 157 of the first source assembly 196, which is used to couple a waveform generator assembly 150 to the bias electrode 104, the power delivery line 158 of the second source assembly 197, which couples a waveform generator assembly 150 to the edge control electrode 115, and/or the power delivery line 159 of the third source assembly 198, which couples a waveform generator 160 to the support base 107, will include the same or similar components. The electrical conductor(s) within the various parts of the power delivery line 157 may include: (a) one or a combination of coaxial cables, such as a flexible coaxial cable that is connected in series with a rigid coaxial cable, (b) an insulated high-voltage corona-resistant hookup wire, (c) a bare wire, (d) a metal rod, (e) an electrical connector, or (f) any combination of electrical elements in (a) - (e).

[0047] In some embodiments, the processing chamber 100 further includes the quartz pipe 110, or collar, that at least partially circumscribes portions of the substrate support assembly 136 to prevent the substrate support 105 and/or the support base 107 from contact with corrosive processing gases or plasma, cleaning gases or plasma, or byproducts thereof. Typically, the quartz pipe 110, the insulator plate 111, and the ground plate 112 are circumscribed by a liner 108 (e.g., a cathode liner). In some embodiments, a plasma screen 109 is positioned between the cathode liner 108 and the sidewalls 122 to prevent plasma from forming in a volume underneath the plasma screen 109 between the liner 108 and the one or more sidewalls 122.

[0048] FIG. 2A shows an example voltage waveform that may be established at an electrode or input node (e.g., the bias electrode 104 and/or support base 107) of a processing chamber. FIG. 2B illustrates an example of different types of voltage waveforms 225 and 230 established at a substrate due to different voltage waveforms, similar to the voltage waveform shown in FIG. 2A, that are separately established at an electrode within the processing chamber. The waveforms include two stages: an ion current stage and a sheath collapse stage, as shown. As illustrated in FIG. 2A, the example voltage waveform may include a pulsed voltage signal (e.g., a pulsed signal at 100 kHz to 5 MHz with a duty cycle ranging from 5% to 95%) overlaid with an RF signal (e.g., a sinusoidal high frequency signal at a frequency greater than 10 MHz). For current compensation (e.g., during the ion current stage), the example voltage waveform shown in FIG. 2A may also include a voltage ramp with a negative slope overlaid with the RF signal. At the beginning of the ion current stage, a drop in substrate voltage creates a high voltage sheath above the substrate, accelerating positive ions to the substrate.

[0049] The positive ions that bombard the surface of the substrate during the ion current stage deposit a positive charge on the substrate surface, which if uncompensated causes a gradually increasing substrate voltage during the ion current stage, as illustrated by voltage waveform 225 in FIG. 2B. However, the uncontrolled accumulation of positive charge on the substrate surface undesirably gradually discharges the sheath and chuck capacitors, slowly decreasing the sheath voltage drop and bringing the substrate potential closer to zero, as illustrated by voltage waveform 225. The accumulation of positive charge results in the voltage droop in the voltage waveform established at the substrate (FIG. 2B). However, a voltage waveform that is established at the electrode that has a negative slope during the ion current stage, as shown in FIG. 2A, can be desirably generated so as to establish a square shaped region (e.g., near zero slope) for an established substrate voltage waveform, as shown by curve labelled 230 in FIG. 2B. Implementing the slope in the waveform established at the electrode during the ion current stage (FIG. 2A) may be referred to as ion current compensation. The voltage difference between the beginning and end of the ion current phase determines an ion energy distribution function (IEDF) width. The greater the voltage difference, the wider the IEDF width, which is undesirable in most current high precision plasma processes. To achieve monoenergetic ions and a narrower IEDF width, operations are performed to flatten the substrate voltage waveform in the ion current phase using the ion current compensation.

[0050] Certain embodiments of the present disclosure are generally directed to techniques and apparatus for mitigation of distortion currents reflected from the plasma load to a signal source of a plasma processing system.

[0051] In certain aspects, the distortion current manager may employ a bandpass filter to attenuate the distortion currents. FIG. 3 is a diagram illustrating an example plasma processing system 300 employing a bandpass filter 306 for distortion current mitigation, in accordance with certain aspects of the present disclosure. The plasma processing system 300 may depict an example of the processing system 10. As shown, the plasma processing system 300 may include a voltage source 302 (e.g., the waveform generator assemblies 150 of the first and second source assemblies 196, 197), an RF generator 304 (e.g., the waveform generator assembly 160 of the third source assembly 198), a bandpass filter 306 (e.g., the distortion current manager 152), and an impedance matching circuit 308 (e.g., the impedance matching circuit 153).

[0052] The voltage source 302 may include a waveform generator 310, which may generate the pulsed voltage signal, and an HVDC supply 312, which may provide the DC bias for the voltage waveform. The voltage source 302 may be coupled to an input node 314, which may be coupled to an electrode 316 (e.g., the support base 107 and/or bias electrode 104) disposed within a processing chamber 318 (e.g., the processing chamber 100). The voltage source 302 may be configured to generate a pulsed voltage signal (e.g., a pulsed signal at 100 kHz to 5 MHz with a duty cycle ranging from 5% to 95%) at the input node 314.

[0053] The RF generator 304 may have an output 320 coupled to the input node 314 through at least the bandpass filter 306 and impedance matching circuit 308. The RF generator 304 may generate a first RF signal overlaid on the pulsed voltage signal at the input node 314, for example, as described herein with respect to FIGS. 1 and 2A. The first RF signal may have at least one first RF frequency, such as a frequency that is greater than 1 MHz and/or between 1 MHz and 200 MHz, such as 13.56 MHz, 40 MHz, 60 MHz, 120 MHz, or 162 MHz. The RF generator 304 may be referred to as an RF plasma generator or an RF signal generator.

[0054] The bandpass filter 306 may be coupled between the output 320 of the RF generator 304 and the input node 314. The bandpass filter 306 may prevent or attenuate harmful reflected power signals from damaging the RF generator 304. For example, the bandpass filter 306 may be configured to attenuate the distortion currents reflected back to the RF generator 304 from the plasma load in the processing chamber 318. The bandpass filter 306 may have a high quality factor (e.g., a quality factor greater than or equal to fifty) with low insertion loss. The bandpass filter 306 may have a narrow bandwidth (e.g., measured at half power points or cut off frequencies) of ±0.1% to ±0.5% from the center frequency of the bandpass filter 306. A bandwidth of ±0.1% to ±0.5% from the center frequency may represent a bandwidth of 0.2% to 1% of the center frequency, where the lower cutoff frequency is -0.1% to -0.5% from the center frequency, and the higher cutoff frequency is 0.1% to 0.5% from the center frequency, for example. For example, the bandwidth of the bandpass filter 306 may be from 100 kHz to 800 kHz. The bandpass filter 306 may be configured to attenuate second RF signals (e.g., the distortion currents described herein) that are outside a range of frequencies (e.g., a bandwidth of ±0.1% to ±0.5% from the center frequency of the bandpass filter 306) including the first RF frequency of the first RF signal.

[0055] The impedance matching circuit 308 may be coupled between the bandpass filter 306 and the input node 314. The output impedance of the RF generator 304 and/or bandpass filter 306 may be matched via the impedance matching circuit 308 to the input impedance of the input node 314.

[0056] In certain aspects, a signal filter 322 (e.g., the signal filter 154) may be disposed between the impedance matching circuit 308 and the input node 314. The signal filter 322 may isolate the RF generator 304 from the pulsed signal generated by the voltage source 302. A low pass filter 324 (e.g., the filter 151) may be coupled between the voltage source 302 and the input node 314. The low pass filter 324 may isolate the voltage source 302 from the RF signal generated by the RF generator 304.

[0057] The processing chamber 318 may include a substrate support that comprises a dielectric layer disposed over the electrode 316, for example, as described herein with respect to FIG. 1. The plasma processing system 300 may also include the system controller 126, which may perform one or more of the operations described herein with respect to FIG. 6 and/or FIG. 8.

[0058] FIGS. 4A-4C are diagrams illustrating examples of bandpass filters for mitigation of distortion currents. The bandpass filter(s) depicted in FIGS. 3A-3C may be examples of the bandpass filter 306 depicted in FIG. 3. In certain cases, the bandpass filter(s) depicted in FIGS. 4A-4C may include lumped electrical components. The bandpass filters can be configured to allow RF signals at frequencies greater than 1 MHz, such as greater than 10 MHz, or greater than 60 MHz, or even greater than 100 MHz to pass therethrough.

[0059] Referring to FIG. 4A, a bandpass filter 400A may include a capacitor 402 and an inductor 404 coupled in parallel along a signal line 406, which may representative of the power delivery line 159. The inductor 404 may have an inductance of 0.1 µH to 5 µH, and the capacitor may have a capacitance of 3 pF to 100 pF, for example. The bandpass filter 400A may provide various advantages and/or benefits, such as being low cost, and having a small footprint.

[0060] For certain aspects, the bandpass filter may include a distributed-element filter. Referring to FIG. 4B, a bandpass filter 400B may include a vacuum capacitor 408 coupled in parallel with a transmission line inductor 410 to the inner surface of a metal enclosure 412. The metal enclosure 412 may be coupled to the shielding of an RF coaxial cable (e.g., the power delivery line 159), which may provide an RF return path. The inductance of the distributed inductor 410 may vary with the conductor length, which may be shorter than a quarter wavelength of the RF signal, for example. In certain embodiments, the vacuum capacitor 408 may include a motorized vacuum capacitor to adjust the center frequency of the bandpass filter 400B. In other words, the bandpass filter 400B may include a tunable element, such as a tunable capacitor. The tunable bandpass filter 400B can be tuned such that the center frequency of the bandpass filter 400B matches the output frequency used by the RF signal generator (e.g., the RF generator 304 depicted in FIG. 3). The bandpass filter 400B may provide various advantages and/or benefits, such as offering less filter-to-filter variation and improved control over the frequency accuracy for the center frequency and/or cutoff frequencies.

[0061] For certain aspects, the bandpass filter may employ multiple reactive components, which may facilitate a narrow bandwidth and high quality factor. Referring to FIG. 4C, a bandpass filter 400C may include a first shunt capacitor 414, a second shunt capacitor 416, and a third capacitor 418 coupled in series with an inductor 420 along a signal line 422, which may be representative of the power delivery line 159. The third capacitor 418 and the inductor 420 may be coupled between the first shunt capacitor 414 and the second shunt capacitor 416. The shunt capacitors 414, 416 may be coupled along separate shunt branches 424, 426, respectively, from the signal line 422. As an example, the inductor 420 may have an inductance of 0.1 µH to 5 µH. The first and second shunt capacitors 414, 416 may each have a capacitance of 200 pF to 1000 pF, and the third capacitor 418 may have a capacitance of 3 pF to 100 pF. The first, second, third capacitors 414, 416, 418 may have a fixed or tunable capacitance, such as a motorized vacuum capacitor. As a tunable filter, the center frequency of the bandpass filter 400C can be tuned to match the output frequency of the RF signal generator (e.g., the RF generator 304 depicted in FIG. 3). The bandpass filter 400C may provide various advantages and/or benefits, such as providing desirable filter performance with a narrow bandwidth and high quality factor.

[0062] FIG. 5 is a graph of an example frequency response 500 of a bandpass filter for distortion current mitigation, in accordance with certain aspects of the present disclosure. The frequency response 500 shows the output power of the bandpass filter versus frequency. In this example, the frequency response may have a center frequency 502, which may match the output frequency of the signal generator, and a bandwidth 504, which may be ±0.1% to ±0.5% from the center frequency 502. In aspects, the bandwidth 504 may be determined at half power points from the power of the center frequency 502.

[0063] FIG. 6 is a process flow diagram illustrating a method 600 for distortion current mitigation using a bandpass filter. The method 600 may be performed by a plasma processing system, such as the processing system 10.

[0064] At activity 602, a voltage source (e.g., the voltage source 302) may generate a pulsed voltage signal at an input node (e.g., the input node 314) coupled to an electrode (e.g., the support base 107 and/or bias electrode 104) disposed within a processing chamber (e.g., the processing chamber 100, 318). For example, the voltage source may generate the pulsed voltage signal as described herein with respect to FIG. 2A. The pulsed voltage signal may be pulsed at a frequency of 100 kHz to 5 MHz with a duty cycle ranging from 5% to 95%.

[0065] At activity 604, an RF signal generator (e.g., the RF generator 304) may deliver a first RF signal at a first RF frequency (and/or other RF frequencies) to the input node. The RF signal generate may generate the first RF signal overlaid on the pulsed voltage signal through at least a bandpass filter (e.g., the bandpass filter 306). For example, the RF signal may be overlaid on the pulsed voltage signal as described herein with respect to FIG. 2A. The bandpass filter may be disposed between the RF signal generator and the input node. An impedance matching circuit (e.g., the impedance matching circuit 308) may be disposed between the bandpass filter and the input node. The bandpass filter may be configured to attenuate second RF signals (e.g., distortion currents from the plasma load) that are outside of a range of frequencies (e.g., ±0.1% to ±0.5% from the output frequency of the RF signal generator) including the first RF frequency of the first RF signal.

[0066] In certain aspects, the output frequency of the RF signal generator may be tuned to improve the power delivered to the plasma load and/or improve the attenuation of the distortion currents. At activity 608, the RF signal generator may sweep through a range of output frequencies for the RF signal, where the RF signal generator is configured to sweep through the range of output frequencies. At activity 610, a processor and memory (e.g., the system controller 126) may select a frequency from the range of output frequencies that provides a peak power for the RF signal through the bandpass filter. At activity 612, the RF signal generator may generate the RF signal at the selected frequency. In some embodiments, the frequency tuning may start after pulsed voltage waveforms or tailored voltage waveforms are applied to the plasma chamber. In other embodiments, the frequency tuning may start before the pulsed voltage waveforms or tailored voltage waveforms are applied to the plasma chamber. The frequency tuning may continue until a minimum reflected power and/or maximum of delivered power is achieved. The frequency scan range can be from 0.1% to 1% of an initial output frequency. Frequency tuning may enable the distortion current mitigation to compensate for bandpass filter performance variations, for example, due to impedance variations in the components of the bandpass filter. Due to component impedance variations, the center frequency of the bandpass filter may be offset from the designed value, and the RF signal generator then adjusts its output frequency to match the center frequency of the bandpass filter. The frequency tuning scan can compensate center frequency shifts by changing the output frequency of the RF signal generator frequency to the actual center frequency.

[0067] In certain aspects, the bandpass filter may be tuned to improve the power delivered to the plasma load and/or improve the attenuation of the distortion currents. At activity 606, the bandpass filter may be tuned.

[0068] At activity 614, the center frequency (e.g., the center frequency 502) of the bandpass filter may be tuned. For example, the center frequency of the bandpass filter may be adjusted until the center frequency matches the output frequency of the RF signal generator. In certain cases, the center frequency may be adjusted until a maximum delivered power at the plasma load is observed. The center frequency of the bandpass filter may be tuned with at least one capacitor (e.g., the third capacitor 418) of the bandpass filter to match the output frequency of the first RF signal allowing a peak power for the first RF signal at the output frequency. For example, a range of center frequencies may be set for the bandpass filter, and the center frequency that provides the maximum power delivered may be considered the peak power for the RF signal. In some embodiment of activity 614, the capacitance of a variable capacitor (e.g., motorized vacuum capacitor) is adjusted in order to change the center frequency of the bandpass filter. FIGS. 4A-C illustrate various configurations of the bandpass filter that can be tuned in order to desirably match the frequency setpoint of the RF generator. As an example, referring to FIG. 4C, the capacitance of the third capacitor 418 may be adjusted to tune the center frequency of the bandpass filter 400C.

[0069] At activity 616, the bandwidth (e.g., the bandwidth 504) of the bandpass filter may be tuned. The bandwidth of the bandpass filter may be tuned attenuate the second RF signals reflected from the processing chamber. For example, the bandwidth may be adjusted until a minimum reflected power from the plasma load is observed. The bandwidth may be adjusted to be within ±5% from the output frequency of the first RF signal, for example, after the center frequency is tuned. In certain aspects, tuning the bandpass filter may include adjusting the capacitance of at least one of the capacitors, such as the capacitors depicted in FIGS. 4A-4C. The bandpass filter may be tuned within 5% of a tuning range of the bandpass filter until a minimum reflected power and/or maximum delivered power is obtained. As an example, referring to FIG. 4C, the capacitance of the first capacitor 414 and/or the second capacitor 416 may be adjusted to tune the bandwidth of the bandpass filter 400C.

[0070] For certain aspects, the RF signal overlaid on the pulsed voltage signal may be used for plasma etching applications. For example, a plasma may be generated over a substrate supporting surface of a substrate support disposed in the processing chamber, as described herein with respect to FIG. 1. The substrate support may include the electrode and a dielectric layer disposed between the electrode and the substrate supporting surface.

[0071] In certain aspects, the distortion current manager may employ an RF circulator to isolate the RF signal generator from the distortion currents reflected from the plasma load. FIG. 7 is a diagram illustrating an example plasma processing system 700, in accordance with certain aspects of the present disclosure. The plasma processing system 700 may depict an example of the processing system 10. As shown, the plasma processing system 700 may include the voltage source 302, the RF generator 304, an RF circulator 730, and the system controller 126.

[0072] The RF circulator 730 may be disposed between the output 320 of the RF generator 304 and the input node 314. The RF circulator 730 may be configured to isolate the RF generator 304 from the distortion currents reflected back from the plasma load. The RF circulator 730 may include a first port 732, a second port 734, and a third port 736. The first port 732 may be coupled to the output 320 of the RF generator 304, the second port 734 may be coupled to at least the input node 314, and the third port 736 may be coupled to at least a dummy load 738. The RF circulator 730 may allow the RF signal from the RF generator 304 to travel from the first port 732 to the second port 734, but not the third port 736. The RF circulator may allow the distortion currents travelling towards the RF circulator 730 to travel from the second port 734 to the third port 736, but not the first port 732.

[0073] The system controller 126 may monitor power of signals reflected from the processing chamber 318 at the RF circulator 730 through the dummy load 738. For example, a power meter 740 may be coupled between the dummy load 738 and the third port 736 of the RF circulator 730. The system controller 126 may be in communication with the power meter 740 to receive the measured powers at the third port 736 of the RF circulator 730. The RF circulator 730 may direct reflected distortion currents to the dummy load 738, which may include a high power resistive load (e.g., 50 ohm). The system controller 126 may stop generation of the RF signal at the RF generator 304 if the monitored power is greater than or equal to a threshold for a specific duration (e.g., 5 seconds). In other words, the RF generator 304 may be shut off if the reflected distortion currents exceed a certain threshold power. Triggering the shut off of the RF generator 304 may prevent the distortion currents from damaging the signal generator 304, RF circulator 730 and/or other electrical components in the plasma processing system 700.

[0074] FIG. 8 is a process flow diagram illustrating a method 800 for distortion current mitigation using an RF circulator. The method 800 may be performed by a plasma processing system, such as the processing system 10.

[0075] At activity 802, a voltage source (e.g., the voltage source 302) may generate a pulsed voltage signal at an input node (e.g., the input node 314) coupled to an electrode (e.g., the support base 107 and/or bias electrode 104) disposed within a processing chamber (e.g., the processing chamber 100, 318). For example, the voltage source may generate the pulsed voltage signal as described herein with respect to FIG. 2A.

[0076] At activity 804, an RF signal generator (e.g., the RF generator 304) may deliver an RF signal to the input node. The RF signal generator may generate an RF signal overlaid on the pulsed voltage signal (e.g., as described herein with respect to FIG. 2A) through at least an RF circulator (e.g., the RF circulator 730). For example, the RF signal generator may generate the RF signal overload on the pulsed voltage signal as described herein with respect to FIG. 2A.

[0077] At activity 806, a processor and memory (e.g., the system controller 126) may monitor a power of signals reflected from the processing chamber at the RF circulator, for example, as described herein with respect to FIG. 7.

[0078] At activity 808, the processor and memory may stop generation of the RF signal at the RF signal generator if the monitored power is greater than or equal to a threshold for a specific duration (e.g., 5 seconds), for example, as described herein with respect to FIG. 7.

[0079] In certain aspects, the distortion current manager may employ an RF circulator and a bandpass filter. FIG. 9 is a diagram illustrating an example of a plasma processing system 90 that includes the bandpass filter 306, the RF circulator 730, the dummy load 738, and the power meter 740 as described herein with respect to FIGS. 3 and 7. In one embodiment, as discussed above in conjunction with FIG. 7, the signals monitored by the system controller 126 and various controlling elements within the system controller 126 are used to adjust the center frequency and/or tune the bandpass filter, as discussed above in conjunction with activities 614 and 616 of method 600, to maximize the delivered power and/or attenuate the RF signals reflected from the processing chamber. Therefore, during plasma processing, if the system controller 126 detects an undesirable amount of reflected power making it through the bandpass filter and to the power meter 740 the system controller 126 will provide a signal that will cause components within the bandpass filter to be adjusted or tuned (e.g., adjust the capacitance in a bandpass filter 400A, 400B or 400C) to adjust the center frequency and/or tune the bandpass filter to minimize the amount of energy that is provided to the dummy load 738.

[0080] It will be appreciated that the techniques and apparatus described herein may protect certain electrical devices (e.g., the RF signal generator) from electrical damage, enable substrate processing operations without interruptions due to reflected powers, and/or facilitate higher energy substrate processing operations.

[0081] The term “coupled” is used herein to refer to the direct or indirect coupling between two objects. For example, if object A physically touches object B and object B touches object C, then objects A and C may still be considered coupled to one another-even if objects A and C do not directly physically touch each other. For instance, a first object may be coupled to a second object even though the first object is never directly physically in contact with the second object.

[0082] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.