CONTROLLING METHOD AND TOUCH PANEL USING THE SAME

[0001] 1. Field of Invention

[0002] The present invention relates to a touch panel. More particularly, the present invention relates to a controlling method and a touch panel in which a base capacitance of a panel capacitor is equivalently decreased.

[0003] 2. Description of Related Art

[0004] With the rapid development of technology, electronic devices such as notebooks, mobile phones or portable multimedia players usually adopt touch panels as a human-machine interface. The touch panels are generally categorized into capacitive touch panels and resistive touch panels. The capacitive touch panels are operated by approaching or touching the touch panels with a finger or a conductive material to change capacitances of the touch panels. When the variation in capacitances is detected, the approached or touched location can be identified to further execute a predetermined operation corresponding to the foregoing approached or touched location.

[0005] FIG. 1 illustrates a conventional touch panel. As shown in FIG. 1, a conventional touch panel includes a plurality of panel capacitors (e.g. panel capacitors C11-C15), and the panel capacitors are disposed at the intersections of the columns X1˜X8 and the rows Y1˜Y8. The touch panel scans the panel capacities on the rows and the columns to obtain the capacitances of the panel capacitors. Every capacitance includes two parts, in which the first part is a base capacitance representing a capacitance without touching, and the second part is a capacitance variance generated by a touch.

[0006] In general, a signal corresponding to the capacitance will be converted into digital data by an analog digital converter (ADC). Obtaining the capacitances at different time points and calculating the variance of the capacitances can acquire a touched position. However, a resolution of the ADC is required to be high when the base capacitance is large and the capacitance variance is relatively small. For example, if the base capacitance is 21.4 pF, the capacitance variance is 0.1 pF, and the capacitance variance is quantized into 256 levels, then the ADC has to recognize X levels, in which 256/X=0.1/21.4 (i.e. X=54784) so that the ADC is required to have 16 bits of resolution. Therefore, how to decrease a resolution requirement of the ADC is an issue concerned by people skilled in the art.

[0007] To solve the above problems, the present invention provides a controlling method and a touch panel using the controlling method, in which the resolution requirement can be reduced.

[0008] An embodiment of the invention provides a touch panel. The touch panel includes a panel capacitor, a first circuit, a first capacitor, a second circuit and a controlling circuit. The first circuit is coupled to a first terminal of the panel capacitor, and configured to transmit a scan signal to the panel capacitor. A first terminal of the first capacitor is coupled to a second terminal of the panel capacitor. The second circuit is coupled to a second terminal of the first capacitor, and is configured to transmit an inverting signal to the first capacitor. The inverting signal is synchronized with the scan signal, a frequency of the inverting signal is identical to a frequency of the scan signal, and the inverting signal is phase-inverted from the scan signal. The controlling circuit is coupled to the second terminal of the panel capacitor, and is configured to output a touch signal in response to a voltage at the second terminal of the panel capacitor, in which the touch signal is configured to estimate a capacitance of the panel capacitor.

[0009] In one embodiment, the scan signal is a first pulse signal, and the first circuit raises the first pulse signal to a first reference voltage at a first time point. The inverting signal is a second pulse signal, and the second circuit controls the second pulse signal to drop to a second reference voltage at the first time point. The second reference voltage is lower than the first reference voltage.

[0010] In one embodiment the second circuit comprises a first switch and a second switch. A first terminal of the first switch is coupled to the second terminal of the first capacitor, a second terminal of the first switch is coupled to the second reference voltage, and the first switch is controlled by a first phase signal. A first terminal of the second switch is coupled to the second terminal of the first capacitor, a second terminal of the second switch is coupled to a third reference voltage, and the second switch is controlled by a second phase signal. The second reference voltage is lower than the third reference voltage. The second phase signal is phase-inverted from the first phase signal, and the second phase signal is not overlapped with the first phase signal.

[0011] In one embodiment the first circuit comprises a third switch and a fourth switch. A first terminal of the third switch is coupled to the first reference voltage, a second terminal of the third switch is coupled to the first terminal of the panel capacitor, and the third switch is controlled by the first phase signal. A first terminal of the fourth switch is coupled to a fourth reference voltage, a second terminal of the fourth switch is coupled to the first terminal of the panel capacitor, and the fourth switch is controlled by the second phase signal. The fourth reference voltage is lower than the first reference voltage.

[0012] In one embodiment, the controlling circuit includes an integrator, a comparing circuit and a counter. An input terminal of the integrator is coupled to the second terminal of the panel capacitor, and an output terminal of the integrator outputs an integrating signal. An input terminal of the comparing circuit is coupled to an output terminal of the integrator. The comparing circuit determines if the integrating signal is higher than a comparing voltage to output a comparing signal according to the first phase signal. The counter is coupled to the comparing circuit and configured to count according to the comparing signal to generate the touch signal.

[0013] In one embodiment, the integrator includes an operational amplifier and a second capacitor. A first input terminal of the operational amplifier is coupled to a fifth reference voltage, and a second input terminal of the operational amplifier is coupled to the second terminal of the panel capacitor. A first terminal of the second capacitor is coupled to the second terminal of the panel capacitor, and a second terminal of the second capacitor is coupled to an output terminal of the operational amplifier.

[0014] In one embodiment the controlling circuit further includes a fifth switch, a third capacitor, and a sixth switch. A first terminal of the fifth switch is coupled to a sixth reference voltage, and the fifth switch is controlled by the first phase signal. A first terminal of the third capacitor is coupled to a ground terminal, and a second terminal of the third capacitor is coupled to a second terminal of the fifth switch. A first terminal of the sixth switch is coupled to the second terminal of the second capacitor, a second terminal of the sixth switch is coupled to the second terminal of the panel capacitor, and the sixth switch is controlled by the comparing signal.

[0015] In one embodiment, the touch panel is an in-cell touch panel.

[0016] In one embodiment, the scan signal has a scan voltage level, the inverting signal has an inverting voltage level, the panel capacitor has a base capacitance, and the first capacitor has a first capacitance. The product of the inverting voltage level and the first capacitance is less than the product of the scan voltage level and the base capacitance.

[0017] An embodiment of the invention provides a controlling method for a touch panel. The touch panel includes a panel capacitor and a first capacitor. The controlling method includes the following steps. A scan signal is provided to a first terminal of the panel capacitor, in which a second terminal of the panel capacitor is coupled to a first terminal of the first capacitor. An inverting signal is provided to a second terminal of the first capacitor. The inverting signal is synchronized with the scan signal, a frequency of the inverting signal is identical to a frequency of the scan signal, and the inverting signal is phase-inverted from the scan signal. A touch signal is outputted in response to a voltage at the second terminal of the panel capacitor, in which the touch signal is configured to estimate a capacitance of the panel capacitor.

[0018] In one embodiment, the scan signal is a first pulse signal, and the inverting signal is a second pulse signal. The controlling method further includes the following steps. The first pulse signal is raised to a first reference voltage at a first time point. The second pulse signal is controlled to drop to a second reference voltage at the first time point. The second reference voltage is lower than the first reference voltage.

[0025] Specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings, however, the embodiments described are not intended to limit the present invention and it is not intended for the description of operation to limit the order of implementation. Moreover, any device with equivalent functions that is produced from a structure formed by a recombination of elements shall fall within the scope of the present invention. Additionally, the drawings are only illustrative and are not drawn to actual size.

[0026] FIG. 2 is a schematic diagram illustrating a touch panel according to an embodiment. A touch panel 200 includes a first circuit 210, a second circuit 220, a controlling circuit 230, a panel capacitor CP and a capacitor C1 (also referred to first capacitor). In one embodiment, the touch panel 200 is an in-cell touch panel, but the invention is not limited thereto. The first circuit 210 is coupled to a first terminal of the panel capacitor CP, a second terminal of the panel capacitor CP is coupled to a first terminal of the capacitor C1, and the second terminal of the capacitor C1 is coupled to the second circuit 220. The first circuit 210 transmits a scan signal TX to the panel capacitor CP to charge the panel capacitor CP. In particular, the second circuit 220 transmits an inverting signal S1 to the capacitor C1, in which the inverting signal S1 is synchronized with the scan signal TX. Herein, “synchronized” means that when the scan signal TX changes its level, the inverting signal S1 changes its level at the same time. In addition, the frequency of the inverting signal S1 is identical to the frequency of the scan signal TX, and the inverting signal S1 is phase-inverted from the scan signal TX. In other words, when the scan signal TX is raised, the inverting signal S1 drops simultaneously; or, when the scan signal TX drops, the inverting signal S1 is raised simultaneously. As a result, when the panel capacitor CP is charged, the capacitor C1 decreases the quantity of the charges on the panel capacitor CP.

[0027] The controlling circuit 230 is coupled to the second terminal of the panel capacitor CP, and configured to output a touch signal 231 in response to the voltage at the second terminal of the panel capacitor CP. Due to a change of the capacitance of the panel capacitor CP, the voltage at the second terminal of the panel capacitor CP changes correspondingly. Because the touch signal 231 is generated in response to the voltage at the second terminal of the panel capacitor CP, the touch signal 231 can be used to estimate the capacitance of the panel capacitor CP. However, since the capacitor C1 decreases the quantity of the charges on the panel capacitor CP, the capacitance estimated by the touch signal 231 is smaller such that a base capacitance of the panel capacitor CP is equivalently decreased and a resolution requirement of the controlling circuit 230 is accordingly reduced.

[0028] In detail, assume the capacitance of the panel capacitor CP is C_p when it is not touched, and the capacitance of the panel capacitor CP is C_p+ΔC when it is touched (i.e. C_p is a base capacitance, and ΔC is a capacitance variance). Also assume that the voltage level of the scan signal TX is V_x (also referred to a scan voltage level), the capacitance of the capacitor C1 is C₁ (also referred to a first capacitance), and the voltage level of the inverting signal S1 is −V₁ (also referred to an inverting voltage level). Therefore, the quantity of the charges on the panel capacitor CP when it is not touched is represented as the following formula (1), and the quantity of the charges on the panel capacitor CP when it is touched is represented as the following formula (2).

V_x×C_p−V₁×C₁   (1)

V_x×(C_p+ΔC)−V₁×C₁   (2)

[0029] Then, the formula (1) is subtracted from the formula (2) to obtain V_x×ΔC (not related to C₁), and therefore the capacitor C1 does not affect the estimation of the capacitance variance ΔC.

[0030] The equivalently decreased capacitance is related to the product of C₁ and V₁. Notice that the capacitance of the capacitor C1 and the voltage level of the inverting signal S1 can be arbitrarily adjusted to equivalently decrease any quantity of the capacitance in the invention. For example, the capacitor C1 may be implemented as a variable capacitor. In general, the product of V₁ and C₁ is less than the product of T_x and C_p. If C₁ and V₁ equivalently decrease 20 pF, the base capacitance C_p is 21.4 pF, and the capacitance variance ΔC is 0.1 pF and quantized into 256 levels, then the controlling circuit 230 is required to recognize X levels, in which 256/X=0.1/1.4 (X=3584). That is, the controlling circuit 230 is required to have 12 bits of resolution.

[0031] FIG. 3 is a circuit diagram illustrating the touch panel according to an embodiment. Notice that FIG. 3 is just an example, and people skilled in the art can implement the first circuit 210, the second circuit 220 and the controlling circuit 230 in another way according to the disclosure above. The invention should not be limited thereto.

[0032] In the embodiment of FIG. 3, the second circuit 220 includes a first switch SW1 and a second switch SW2. A first terminal of the first switch SW1 and a first terminal of the second switch SW2 are coupled to the second terminal of the capacitor C1. A second terminal of the first switch SW1 is coupled to a second reference voltage VR2, and a second terminal of the second switch SW2 is coupled to a third reference voltage VR3. The first switch SW1 is controlled by a first phase signal ph1. The second switch SW2 is controlled by a second phase signal ph2. The first circuit 210 includes a third switch SW3 and a fourth switch SW4. A first terminal of the third switch SW3 is coupled to a first reference voltage VR1, and a second terminal of the third switch SW3 is coupled to the first terminal of the panel capacitor CP. The third switch SW3 is controlled by the first phase signal ph1. A first terminal of the fourth switch SW4 is coupled to a fourth reference voltage VR4, and a second terminal of the fourth switch SW4 is coupled to the first terminal of the panel capacitor CP. The fourth switch SW4 is controlled by the second phase signal ph2. The first phase signal ph1 is phase-inverted from the second phase signal ph2, and the first phase signal ph1 is not overlapped with the second phase signal ph2 (see an example shown in FIG. 4). In addition, the second reference voltage VR2 is lower than the third reference voltage VR3, and the fourth reference voltage VR4 is lower than the first reference voltage VR1. For example, first reference voltage VR1 is 6V (volts), the second reference voltage VR2 and the fourth reference voltage VR4 are 0 V, and the third reference voltage is 3V. In other words, in the embodiment of FIG. 3, the scan signal TX is a pulse signal (also referred to a first pulse signal), and the first circuit 210 raises the scan signal TX to the first reference voltage VR1 at a certain first time point. Besides, the inverting signal S1 is also a pulse signal (also referred to a second pulse signal), and the second circuit 220 controls the inverting signal S1 to drop to the second reference voltage VR2 at the same first time point. Therefore, the capacitor C1 can decrease the quantity of the charges on the panel capacitor CP.

[0033] In another embodiment, the reference voltages VR1 to VR4 may have any other voltage levels. In one embodiment, the reference voltages VR1 to VR4 can be set from 0V to 6V, but the invention is not limited thereto.

[0034] In the embodiment of FIG. 3, the controlling circuit 230 includes an integrator 310, a comparing circuit 320 and a counter 330. An input terminal of the integrator 310 is coupled to the second terminal of the panel capacitor CP, and an output terminal of the integrator 310 outputs an integrating signal S2. An input terminal of the comparing circuit 320 is coupled to the output terminal of the integrator 310, and is configured to determine if the integrating signal S2 is higher than a comparing voltage and output a comparing signal S3 according to the first phase signal ph1. In the embodiment, the integrator 310 integrates the voltage at the second terminal of the panel capacitor CP. The greater the capacitance of the panel capacitor CP is, the higher the voltage level of the integrating signal S2 is. In detail, the integrator 310 includes an operational amplifier 311 and a capacitor C2 (also referred to a second capacitor). A first input terminal (e.g. inverting terminal) of the operational amplifier 311 is coupled to a fifth reference voltage VR5 (e.g. 1.5V), and a second input terminal (e.g. non-inverting terminal) of the operational amplifier 311 is coupled to the second terminal of the panel capacitor CP. A first terminal of the capacitor C2 is coupled to the second terminal of the panel capacitor CP, and a second terminal of the capacitor C2 is coupled to the output terminal of the operational amplifier 311. If the integrating signal S2 is higher than the comparing voltage, then the comparing signal S3 is at a high (or low in another embodiment) voltage level, and the comparing circuit 320 outputs the comparing signal S3 only when the first phase signal ph1 is at a raising edge. For example, the comparing circuit 320 may include a comparator and a latch, but the invention is not limited thereto.

[0035] The controlling circuit 230 further includes a fifth switch SW5, a sixth switch SW6 and a capacitor C3 (also referred as a third capacitor). A first terminal of the fifth switch SW5 is coupled to a sixth reference voltage VR6 (e.g. 2V), and the fifth switch is controlled by the first phase signal ph1. A first terminal of the capacitor C3 is coupled to a ground terminal and a second terminal of the capacitor C3 is coupled to a second terminal of the fifth switch SW5. A first terminal of the sixth switch SW6 is coupled to the second terminal of the capacitor C2, and a second terminal of the sixth switch SW6 is coupled to the second terminal of the panel capacitor CP. The sixth switch SW6 is controlled by the comparing signal S3. When the sixth switch SW6 is on, the voltage level of the integrating signal S2 is decreased and may be lower than the comparing voltage.

[0036] The counter 330 is coupled to the comparing circuit 320, and is configured to count according to the comparing signal S3 to generate the touch signal 231. When the capacitance of the panel capacitor CP becomes larger, the times that the integrating signal S2 is higher than the comparing voltage are greater. The counter 330 counts the times that the integrating signal S2 is higher than the comparing voltage in a system period to output the touch signal 231. And then, the logical unit 340 estimates the capacitance of the panel capacitor CP according to the touch signal 231. The logical unit 340 can be implement as software or hardware, and the invention is not limited thereto.

[0037] FIG. 5 is a flowchart of a controlling method for the touch panel according to an embodiment. In a step S501, a scan signal is provided to a first terminal of a panel capacitor, and an inverting signal is provided to a second terminal of the first capacitor, in which the inverting signal is synchronized with the scan signal, a frequency of the inverting signal is identical to a frequency of the scan signal, and the inverting signal is phase-inverted from the scan signal. In a step S502, a touch signal is outputted in response to the voltage at a second terminal of the panel capacitor. However, each step in FIG. 5 has been described above, and they will not be repeated.

[0038] In the controlling method and the touch panel provided in the embodiments of the invention, an inverting signal is provided to the capacitor C1 when the panel capacitor CP is charged. Therefore, the quantity of the charges on the panel capacitor CP is decreased and the base capacitance is equivalently decreased. As a result, a resolution requirement of the controlling circuit 230 can be reduced.

[0039] Although the present invention has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims.