Detection and Estimation of Narrowband Interference By Matrix Multiplication

[0001] This patent application is related to and incorporates by reference herein in their entirety, the following patent applications that are co-owned and concurrently filed herewith:

• • [0002] (1) US Patent Application, entitled “Stabilized Digital Quadrature Oscillator” by Dariush Dabiri et al., Attorney Docket No. AMC026 US;
  • [0003] (2) US Patent Application, entitled “Narrowband Interference Cancellation Method and Circuit” by Dariush Dabiri, Attorney Docket No. AMC025 US;
  • [0004] (3) US Patent Application, entitled “Confirmation of Presence of Narrowband Interference By Harmonic Analysis” by Dariush Dabiri et al., Attorney Docket No. AMC028 US;
  • [0005] (4) US Patent Application, entitled “Adaptive Spectral Enhancement and Harmonic Separation” by Dariush Dabiri et al., Attorney Docket No. AMC029 US;
  • [0006] (5) US Patent Application, entitled “Adaptive Narrowband Interference Prediction Circuit and Method” by Dariush Dabiri et al., Attorney Docket No. AMC030 US; and
  • [0007] (6) US Patent Application, entitled “Multi-Input IIR Filter with Error Feedback” by Maged F. Barsoum, et al., Attorney Docket No. AMC031 US.

[0008] In a local area network, a PHY device 12 in a computer 10 (FIG. 1A) may be connected to another PHY device 22 in an Ethernet Switch 20 by use of a cable 32. Cable 32 typically includes four twisted-pair copper conductors 32A-32D (which may be shielded or unshielded) that carry analog signals between four transceivers 12A-12D in PHY device 12 (that in turn is coupled to MAC device 11) and four transceivers 22A-22D in PHY device 22 (that in turn is coupled to MAC device 21). Each of transceivers 12A-12D typically includes a transmit data path and a receive data path in an integrated circuit (IC) die that forms PHY device 12. The transmit data path typically includes an FEC encoder, transmit circuitry, a digital to analog converter, an analog filter, and a line driver, illustrated unlabeled in FIG. 1A. Similarly, the receive data path typically includes corresponding components in a reverse order, e.g. a receive amplifier, an analog filter, an analog to digital converter, receive circuitry and an FEC decoder (also see FIG. 1A).

[0009] A signal received from cable 32 by any of transceivers 22A-22D is typically weak, and any degradation affects the bit error rate (BER). Degradation of the signal during transmission across cable 32 occurs for a number of known reasons, such as echo due to reflections in cable 32, near end cross talk (NEXT) and far end cross talk (FEXT) due to the adjacency of conductors in cable 32, attenuation caused by length of cable 32, etc. Such reasons for degradation are internal to a communication channel that is formed between transceivers 12A-12D, 22A-22D by cable 32. Such internally-originated noise depends strictly on the physical characteristics of cable 32 and its connections to transceivers 22A-22D. Several prior art techniques have been developed, to suppress or cancel such internally-originated noise.

[0010] The signal transmitted through cable 32 (FIG. 1A) is occasionally further degraded by noise that originates externally (“externally-generated noise”). For example, coupling of electromagnetic energy radiated by a wireless device 31, such as a walkie-talkie typically occurs in cable 32, resulting in noise therein due to electromagnetic interference (EMI). The amount of such EMI noise that gets injected into a signal in cable 32 increases as the distance reduces between wireless device 31 and cable 32. When wireless device 31 is sufficiently close, the EMI noise picked up by cable 32 can so severely corrupt a signal carried therein that a link drop occurs. The amount of EMI noise that is picked up by a signal travelling through cable 32 depends on various characteristics of cable 32, such as shielding and grounding. When cable 32 is used to transfer data at a high rate, such as 10 Gbps, the current inventor believes that prior art shielding and become insufficient e.g. because electromagnetic fields penetrate through such shielding and induce currents in cable 32.

[0011] Some prior art methods may remove EMI from a signal that is received by any of transceivers 22A-22D by applying spectral analysis directly to the received signal. For further information on spectral analysis of a signal, see the following books: (1) Introduction to Spectral Analysis, by P. Stoica and R. Moses. Prentice Hall, NJ, 1997 and (2) Modern Spectral Estimation: Theory and Practice, by S. M. Kay, Prentice Hall, NJ 1988. Also see the article entitled “Electromagnetic Coupling of Twisted Pair Cables” by Reinhard Stolle, published in IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, VOL. 20, NO. 5, JUNE 2002, which is incorporated by reference herein in its entirety. This article provides a theoretical background and supplies simple approximation formulae for prediction of EMI.

[0012] To detect and generate a reliable estimate of EMI, several prior art methods of the type described in the preceding paragraph above, require collection of a large amount of data because the interference signal is embedded in the received signal. Depending on the method, the time required to collect such data can become so large as to result in a link drop between the transmitter and the receiver. Hence, the current inventor believes there is a need for detection and estimation of narrow band interference (EMI/RFI), as discussed below.

[0013] One or more processing units are programmed in accordance with the invention to select from among M tones (e.g. 512 tones) in a frequency domain representation of an input signal (e.g. output by a front end processing circuit after receipt via a twisted pair cable), a set identifying two or more tones (and therefore their frequencies) of a narrowband interference including at least a strongest tone and a tone adjacent thereto. The strongest tone is identified for being at a maximum value across all M tones relative to background noise.

[0014] The one or more processing units then identify from among M complex numbers in the frequency domain representation, a set of complex numbers (denoted as a vector Z) that correspond to the selected set of tones. Vector Z is then multiplied with each of the columns of a matrix G (e.g. 2L in number, with L being 8) that is predetermined. All elements in matrix G are predetermined, i.e. G is setup ahead of time, designed to identify a sub-resolution maxima in vector Z. Based on M products that result from vector multiplication of Z and G, one or more processing units determine and store in a computer memory coupled thereto, at least one of: (A) a flag indicating presence or absence of narrow band interference in the input signal; and (B) an estimate of a frequency of narrow band interference in the input signal.

[0024] A remote signal 104 sent by a transmitter is typically received at a receiver as a received signal that includes noise 103, in addition to the remote signal 104. The noise in the received signal depends on various characteristics of the transmission medium as well as external interference. Detection and estimation of narrow band interference (NBI) in accordance with the invention is implemented in some embodiments based on the assumption that the frequency content of the NBI is identifiable from background noise.

[0025] In order to make NBI easily identifiable in accordance with the invention, a received signal is initially processed by a Front End Processing Circuit to cancel certain types of noise, such as echo, FEXT and NEXT, e.g. as described in a US Patent Application, with Dariush Dabiri as the first-named inventor, that is concurrently filed herewith, and co-owned as follows:

[0026] (1) “Narrowband Interference Cancellation Method and Circuit”, Attorney Docket No. AMC025 US.

The just-described patent application is hereby incorporated by reference herein, in its entirety.

[0027] In a signal 101 (shown in the time domain in FIG. 1B) generated by such a Front End Processing Circuit, when narrowband interference (NBI) is present, it may appears as one or more peaks in the frequency domain, e.g. see peak 102 illustrated in FIG. 1C. Accordingly, in several aspects of the invention, a slicer 201 (FIG. 2A) receives the signal 101 and generates a decision signal on bus 201O (FIG. 2A) that is representative of remote signal 104 (FIG. 1C), in the normal manner. Slicer 201 can be implemented in any manner well known in the art, e.g. as described in a book entitled “Digital Communication” by John R Barry, Edward A. Lee, and David G. Messerschmitt, published in 2004 by Kluwer Academic Publishers. In one illustrative example, slicer 201 is implemented by a processing unit that is coupled to an Ethernet transceiver of the type illustrated in FIG. 1 of US Patent Publication 2009/0238102 entitled “Generating An Estimated Non-Linear Echo Signal”, incorporated by reference herein in its entirety.

[0028] In several embodiments, an estimate of remote signal 104 as generated by slicer 201 on bus 201O is supplied to a switch 202 that operates a subtractor 203. Subtractor 203 in turn supplies one of two signals to NBI detector/estimator 204 as the input signal 299: (1) in mode 1, input signal 299 includes (a) noise, (b) NBI and (c) error in estimation of the remote signal as illustrated in FIG. 2B and (2) in mode 0, input signal 299 includes (a) noise, (b) NBI, (c) error in estimation and (d) remote signal as illustrated in FIG. 2C. In both modes, NBI detector/estimator 204 performs the acts 301-306 illustrated in FIG. 3 after transforming its input signal 299 into the frequency domain, as follows.

[0029] Specifically, in act 301, NBI detector/estimator 204 selects, from among M tones in a frequency domain representation S[0]-S[M−1] of input signal 299 (FIG. 2A), a strongest tone 211 (FIGS. 2B, 2C). In act 301, NBI detector/estimator 204 also selects at least one additional tone 212 that is located adjacent to strongest tone 211, for use in estimating a sub-resolution frequency at which another tone stronger than the selected tones occurs. Estimating a sub-resolution frequency as described herein reduces quantization noise that arises from binning of input signal 299 into a finite number of discrete values and transformation of the discrete values into M discrete frequencies. In some embodiments, the number of samples of input signal 299 in the time domain (e.g. represented as a first set of complex numbers) is identical to the number of tones M in the frequency domain representation (e.g. a second set of complex numbers). In several such embodiments, transformation from the time domain to the frequency domain is done by a fast fourier transform or FFT although alternative embodiments may use any other technique that computes a discrete fourier transform or DFT using M discrete samples of input signal 299.

[0030] After a frequency domain representation S[0]-S[M−1] is obtained from the M discrete samples of input signal 299, NBI detector/estimator 204 of some embodiments selects a strongest tone 211 from among the M tones, for having a maximum value (e.g. at a frequency k_max) relative to background noise. The background noise is everything in a received signal other than a remote signal transmitted on the twisted pair cable and narrowband interference in the form of EMI that is picked up by the twisted pair cable due to coupling with a wireless source. In the example illustrated in FIG. 2B, background noise includes white noise (which remains relatively constant e.g. varies no more than 10%) across the frequency spectrum (for example at −55 dB) as well as non-white noise. In the example of FIG. 2B, the strongest tone 211 occurs at frequency k_max=240 MHz. However, even in situations where background noise is frequency dependent as illustrated in FIG. 2C, NBI detector/estimator 204 identifies strongest tone 211 to be at frequency k_max=240 MHz, e.g. by use of frequency-specific thresholds. The specific manner in which strongest tone 211 is selected by NBI detector/estimator 204 from frequency domain representation S[0]-S[M−1] is different in different embodiments.

[0031] As noted above, in addition to selection of strongest tone 211 at frequency k_max, NBI detector/estimator 204 also selects at least one tone that is located immediately adjacent to frequency k_max of strongest tone 211 in the ordered sequence of M tones in the vector S[0]-S[M−1], sequenced from the lowest frequency to the highest frequency, as follows: 0≦k_max−1<k_max<k_max+1≦M−1. Depending on the embodiment, either or both of the two frequencies namely k_max−1 and frequency k_max+1 which are adjacent to strongest frequency k_max may be selected in act 301. In one specific illustrative embodiment, a tone 212 at frequency k_max−1 is selected, for being stronger than tone 213 at frequency k_max+1. In another illustrative embodiment, exactly three tones are selected in act 301, and NBI detector/estimator 204 identifies the three frequencies k_max−1 and k_max and k_max+1 as a selected set of tones.

[0032] Next, in act 302, from among M complex numbers (such as Fourier transform values) in the vector S[0]-S[M−1] representing the input signal in the frequency domain, NBI detector/estimator 204 uses the set of tones selected in act 301 to identify a corresponding set of complex numbers, and denotes them as vector Z. Depending on the embodiment, vector Z may have two elements (i.e. two complex numbers) or three elements (i.e. three complex numbers) or four elements (i.e. four complex numbers) or five elements (i.e. five complex numbers) or even more than five elements (and therefore even more than five complex numbers). The specific number of elements of vector Z depends on the resolution and accuracy of a curve fit to be done in each embodiment as discussed next, to find a sub-resolution frequency at which the strongest tone occurs in the frequency domain representation S[0]-S[M−1].

[0033] Next, in act 303, NBI detector/estimator 204 multiplies vector Z with a predetermined matrix G. Matrix G is designed ahead of time, to identify a sub-resolution maxima in vector Z. Specifically, matrix G in accordance with the invention is stored in computer memory, and readily available to NBI detector/estimator 204 in act 303. Matrix G has as many rows as vector Z and matrix G has 2L columns. The number of elements in vector Z and the number of columns 2L of matrix G are both predetermined for each embodiment, based on engineering tradeoffs between preciseness in identifying the location of a maxima independent of quantization into M tones, and the amount of hardware needed to perform the vector multiplication and use (e.g. compare) the 2L products of vector multiplication. In one illustrative embodiment, the value of 2L is selected to be 16 (and hence L is 8), although other embodiments use 8 as the value of 2L and still other embodiments use 32 as the value of 2L.

[0034] The current inventor believes that multiplication of vector Z with columns of matrix G to perform curve fitting as described in the preceding paragraph above is faster and requires less hardware than all prior art techniques known to the current inventor, for detection and estimation of narrow band interference (such as EMI/RFI). Therefore, vector multiplication is performed in many embodiments of the invention, for detection and estimation of narrow band interference (e.g. EMI/RFI). Note, however, that vector multiplication in accordance with the invention may be implemented differently in different embodiments. For example, in some embodiments, vector multiplication is implemented by a processor performing a table lookup, as discussed in reference to FIG. 6B below.

[0035] In some embodiments, at the end of act 303, the 2L products of vector multiplication are stored in a memory 314 as per act 304, although in alternative embodiments the 2L vector products are not stored to memory and instead they are directly processed further. For example, in the alternative embodiments, the 2L vector products resulting from act 303 are directly supplied to a selector which instantaneously selects one of the 2L vector products based on a predetermined criterion. An identifier m of the selected vector product is stored in memory 310 and/or used to detect/identify narrowband interference.

[0036] Hence, one or more of the 2L products of vector multiplication and/or a position therein of a selected vector product is/are used by NBI detector/estimator 204 (with or without storage in a memory) to do either or both of the following: (1) as per act 305, determine and store in memory 315, a flag indicating presence/absence of narrowband interference and (2) as per act 306, compute and store in memory 316, a sub-resolution estimate of frequency (finer than the resolution into M frequencies) of narrowband interference. When performing act 305, NBI detector/estimator 204 functions strictly as an NBI detector, i.e. not as an NBI estimator. Moreover, when performing act 306, NBI detector/estimator 204 functions strictly as an NBI estimator, i.e. not as an NBI detector.

[0037] As will be readily apparent to the skilled artisan, some embodiments may perform only act 305 as described herein, but not perform act 306 e.g. by using any NBI estimator well known in the prior art. Moreover, other embodiments may perform only act 306 as described herein, but not perform act 305 e.g. by using any NBI detector well known in the prior art. Certain embodiments perform both acts 305 and 306 and therefore NBI detector/estimator 204 functions as both: an NBI estimator and an NBI detector.

[0038] Different embodiments apply different techniques to the 2L vector products at the end of act 303, to determine the presence or absence of narrowband interference in the input signal 299 (FIG. 2A). In some embodiments the predetermined criterion is to find a maximum among the vector products, and if that maximum is greater than a predetermined threshold, then NBI detector/estimator 204 sets the flag in memory 315, to indicate presence of narrowband interference. In certain embodiments the predetermined criterion is to check if any one of the vector products is greater than another predetermined threshold, then NBI detector/estimator 204 sets the flag in memory 315, to indicate presence of narrowband interference.

[0039] Moreover, different techniques may also be applied to the vector products at the end of act 303, to determine the frequency of narrowband interference in input signal 299, depending on the embodiment. Some embodiments find a maximum among the vector products, and use a position m of this maximum in the sequence of 2L vector products (generated by act 303) to compute the frequency. For example, in several embodiments that identify a set of three complex numbers as vector Z, the following formula is used: k_max+½(−1+m/L) to calculate the frequency which is then stored in memory 316. However, other embodiments use other formulae, e.g. in certain embodiments that identify a set of only two complex numbers based on the two adjacent frequencies namely k_max−1 and frequency k_max, as vector Z, the following formula is used: k_max−(m/2L). Accordingly, a specific formula that is used in act 306 for each embodiment is readily apparent to the skilled artisan in view of this detailed description.

[0040] In some embodiments, one or more of memories 314, 315, and 315 are implemented as latches and/or flip-flops coupled to NBI detector/estimator 204. Hence, one or more of memories 314, 315, and 315 may be implemented as portions of a memory 310 built with NBI detector/estimator 204 into a single IC chip. However, depending on the embodiment, memory 310 may be implemented as either volatile memory (such as a dynamic random access memory or DRAM) or non-volatile memory (such as a static random access memory or SRAM). In several embodiments, one or more of memories 314, 315, and 315 are implemented on a separate memory chip 310 that is electrically coupled to one or more processor(s), such as microprocessors or electrically coupled to hardwired state machines and custom circuitry, to perform one or more of acts of FIG. 3, to implement NBI detector/estimator 204. Hence, several such embodiments will be readily apparent to the skilled artisan, in view of this detailed description.

[0041] In some embodiments, the strongest tone is identified in act 301 by NBI detector/estimator 204 finding a frequency k_max at which T⁻¹[k]*S[k] is maximized, wherein T[k] is the k^th element in the vector T⁻¹ which has a single row of M elements, proportional to power spectrum of background noise, and wherein S[k] is the k^th element in the vector S[0]-S[M−1] (i.e. at frequency k). In several such embodiments, the vector T and its inverse T⁻¹ are computed ahead of time, e.g. in a laboratory in the absence of EMI. The values of the elements in vector T are chosen in some embodiments by trial and error, so as to screen out false positives in detecting the strongest tone. Thereafter the vector T⁻¹ (a row of M elements) is kept in memory 310 for ready use by NBI detector/estimator 204 in multiplying with the vector S (a row of M elements) of complex numbers in the frequency domain representation of input signal 299. In several such embodiments, an element-wise vector multiplication T⁻¹[k]*S[k] yields products, from among which a single frequency k_max is selected, at which a maximum occurs.

[0042] A maximum among products T⁻¹[i]*S[i], such as those described in the immediately preceding paragraph, as well as a maximum among the M products at the end of act 303 can be determined by different maxima identification techniques known to be applicable to complex numbers, depending on the embodiment. For example, a first type of embodiments compare absolute values of complex numbers for use in finding the maximum, while a second type of embodiments compare the sum of squares of the complex numbers for use in finding the maximum. For example, if the complex number is x+jy where j is an imaginary number (square root of −1), then the second type of embodiments compute a function A of these two parameters (x, y) such as the function A=x²+y² (or an approximation thereof) and use this value for finding a position m of the maximum (e.g. by sorting all such values), while the first type embodiments compute as function A the square-root of the just-described x²+y² i.e. the absolute value, also called magnitude (or an approximation thereof) and use the absolute value in finding the position m of the maximum. Hence, several such types of embodiments will be readily apparent to the skilled artisan, in view of this detailed description. One such approximation is described in Subsection B below and is incorporated by reference herein in its entirety.

[0043] In some embodiments, a group of candidate tones are first selected from among M tones in the frequency domain representation S[0]-S[M−1], by use of a threshold 410 as illustrated in FIG. 4A. Specifically, NBI detector/estimator 204 of one illustrative embodiment compares the power of each of the M tones to a threshold 410 (e.g. predetermined based on background noise), to identify tones 411-414 and 211-213 which are then designated as candidate tones (see act 501 in FIG. 5). Note that threshold 410 is a constant for all frequencies because in FIG. 4A the signal is being input to NBI detector/estimator 204 in mode 1, wherein the input signal contains noise and NBI (such as EMI/RFI) and error in estimation of the remote signal. However, a frequency-specific threshold 420 is used as illustrated in FIG. 4B when the signal is being input to NBI detector/estimator 204 in mode 0, wherein the input signal includes the remote signal in addition to noise and EMI and error in estimation. By use of appropriate thresholds 410 and 420, the same tones 411-414 and 211-213 (FIGS. 4A and 4B) are grouped to form the group of candidate tones at the end of act 501.

[0044] Next, from among the group of candidate tones 411-414 and 211-213, a tone 211 at which a highest power occurs in vector S[0]-S[M−1] relative to background noise is selected in act 503 and this tone 211 is designated as frequency k_max. Specifically, in some embodiments of act 503, a comparison is made based on background noise at each tone, e.g. by subtracting the power of background noise at each candidate tone k from the signal's power S[k] at that candidate tone, followed by comparison of the results of subtraction. Next, in act 503, three frequencies k_max−1 and k_max and k_max+1 are identified as a selected set of tones. Therefore, acts 501-503 of FIG. 5 together implement act 301 of FIG. 3.

[0045] In one illustrative embodiment, vector Z has three elements, which are identified based on three frequencies k_max−1 and k_max and k_max+1 as described above and matrix G has eight columns. In this illustrative embodiment, matrix G is obtained as shown in Subsection A below (which is an integral portion of this detailed description and is incorporated by reference herein in its entirety).

[0046] In the computation shown in Subsection A, note that X is a vector with only one row which is computed by starting with the value −1+dx as a first element in the row, and computing each next element in the row by adding to it the value dx, and when this is done L times the value 0 is reached, and the adding is repeated until 1−dx is reached, thereby to generate M elements in the row. Next, a matrix H is computed, which has the same number of columns as vector X, i.e. there are 2L columns although matrix H has three rows as follows. Each element in first row of matrix H is obtained by applying the following function x/(1+x), wherein x is the corresponding value in the same column in vector X. Each element in the second row of matrix H is a constant, of value 1 (i.e. the second row is a row of 1s). Each element in third row of matrix H is obtained by applying the following function x/(x−1), wherein x is the corresponding value in the same column in vector X. Thereafter, matrix G is constructed by dividing each column of matrix H by the norm of the column. The norm (also called length), is the square-root of the sum of squares of all elements in the column.

[0047] In some embodiments, vector multiplication of the type described above is performed by a processing unit (such as a central processing unit or CPU), or a microprocessor that is programmed with software, as would be readily apparent to the skilled artisan, although in other embodiments, the vector multiplication is performed in generic hardware (such as an arithmetic logic unit or ALU) or customized hardware (such as multipliers coupled to adders) of the type illustrated in FIG. 6A. Specifically, in one illustrative embodiment, customized hardware includes a set of multipliers 611-613 (FIG. 6A) that are hardwired to receive as inputs the respective elements of each vector and/or matrix, such as corresponding elements of vector Z namely Z[1]-Z[3], and the first row of matrix G, namely G[1, 1]-G[1, 3]. The results of multiplication of set of multipliers 611-613 are fed to an adder 619 (in the customized hardware) that adds the products of multiplication and supplies its output to a comparator 690 (in the customized hardware). As shown in FIG. 6A, multiple sets of customized hardware of the type just described are included in the illustrative embodiment, such as multipliers 621-623 that are respectively coupled to the same elements of vector Z namely Z[1]-Z[3], but to the second row of matrix G, namely G[2, 1]-G[2, 3] and so on.

[0048] As noted above, in some embodiments, vector multiplication is implemented by a processing unit performing a table lookup, as shown in FIG. 6B. Specifically, a first embodiment selects a column and a row of a two-dimensional table 699 (FIG. 6B) using each of two multiplicands, to retrieve a single value therefrom, as a product of multiplication. Two or more such values (one value for each element in vector Z) are summed up by the processing unit to obtain a product of vector multiplication. Moreover, a second embodiment of the processing unit selects a row of a first table using a real component of a complex number in vector Z and further selects a column of the first table corresponding to the column of matrix G, to retrieve a real component of the product of vector multiplication. In the second embodiment, a second table is used by the processing unit in a similar manner, with an imaginary component of the complex number in vector Z, to retrieve an imaginary component of the product of vector multiplication. Although two examples of a table have been described, as will be readily apparent to the skilled artisan, other such tables may be used in performing vector multiplication of the type described herein.

[0049] After detection and estimation of narrowband interference by matrix multiplication as discussed above, some embodiments confirm that the NBI is not a false positive by checking for presence of and disambiguating among, one or more harmonics of a fundamental frequency as described in a related patent application, with Dariush Dabiri as the first-named inventor, that is concurrently filed herewith, and co-owned as follows:

• • [0050] “Confirmation of Presence of Narrowband Interference By Harmonic Analysis”, Attorney Docket No. AMC028 US.
    The just-described patent application is hereby incorporated by reference herein, in its entirety.

[0051] Embodiments of the type described herein may be used to implement 10 GBASE-T PHYs of the type described in a Preliminary Product Brief document entitled “Triveni Dual/Quad Port 10 GBASE-T PHY” published July 2010 by AMCC that is incorporated by reference herein in its entirety, and available at the following address on the Internet, wherein forward slash has been replaced by “%” sign. http:%%www.appliedmicro.com%MyAMCC%retrieveDocument%MXD%TechDocs%AP M9xxxx%APM96892_—93_—94_—95%APM96892_—93_—94_—95_Triveni_PB2162.pdf

[0052] One or more circuits and/or methods described herein may be implemented and/or performed in various ways. For example, one or more features and/or circuit elements and/or method steps/acts described above and/or illustrated in FIGS. 2A, 3, 5, 6A and 6B may be implemented in hardware, firmware, software, or a combination thereof. For several implementations, one or more features and/or circuit elements and/or method steps/acts described above and/or illustrated in the just-described figures may be used and/or implemented within specific hardware, e.g. one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, micro-controllers, microprocessors, electronic devices, circuits and systems designed to perform the functions described herein, or a combination thereof. For certain implementations, one or more features and/or circuit elements and/or method steps/acts described above and/or illustrated in the just-described figures may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein by use of software and/or firmware executing in hardware of the type just described in the previous sentence. Additionally, any non-transitory machine readable medium tangibly embodying instructions may be used in implementing one or more features and/or circuit elements and/or method steps/acts described above and/or illustrated in the above-described figures. Also, as used herein the terms “memory” and “storage element” refer to any type of long term, short term, volatile (e.g. DRAM), nonvolatile (e.g. SRAM), flip-flop, latch, or other memory that is non-transitory and accessible by any circuitry, such as a processor.

[0053] Numerous modifications and adaptations of the embodiments described herein will become apparent to the skilled artisan in view of this disclosure. For example, in an alternative embodiment, NBI detector/estimator 204 simply sorts all the M tones in descending order based on power, and then designates whichever tone is at the top of the sorted list as the frequency kmax of the strongest tone. Numerous modifications and adaptations of the embodiments described herein are encompassed by the scope of the invention.

[0054]

	function G
	‘dx = 1/L;
	X = 0.5*(−1+dx:dx:1.0−dx);’
	‘H = [X / (1 + X); ones(size(X)); X / (X−1)];’
	‘E = 1 / sqrt(sum(H2));’
	‘G = H * (ones(3, 1) * E);’
	‘end’

[0055] Several embodiments compute

A*max(x, y)+B*min(x, y)

as an approximation of the magnitude or absolute value of a complex number x+jy where j is the imaginary number (square root of −1). In this computation, the function max identifies whichever of x and y is larger, and the function min identifies whichever of x and y is smaller. In some embodiments A and B are constants that are predetermined, e.g. based on tradeoffs, such as error and hardware requirements. In other embodiments, A and B are variables that are looked up from a predetermined table, using (x, y) as indices into the table.