Variable-persistence molecular memory devices and methods of operation thereof

[0002] The present invention relates to memory devices, and more particularly, to molecular memory devices.

[0003] Traditionally, semiconductor materials, such as silicon, have been used to implement memory circuits. Typically, the semiconductor materials are used in combination with dielectric and conductive materials to fashion transistors, capacitors, resistors, inductors and other basic circuit elements, which are arranged in various combinations to form memory cells and other components of memory devices.

[0004] Other types of materials are currently being investigated to replace semiconductor materials in memory devices and other electronics applications, due to the ongoing need to produce electronic devices with greater information storage density, lower cost, higher speed, and other desirable characteristics. Such new materials include organic molecular materials that can store information by taking on various oxidation states in response to applied signals. Such materials offer potentially higher component density, response speeds, and energy efficiency in memory applications.

[0005] A variety of approaches have been proposed for molecular memory devices. For example, a hybrid molecular-silicon transistor for use in memory devices and other applications has been proposed. Applying a negative potential between the gate and drain of the molecular transistor charges a layer of redox-active molecules; applying a higher potential discharges the same molecular layer. Because the molecules have two possible states, charged or discharged, this device can be used as a 1-bit memory cell. A logical 1 is written by charging the redox-active molecules, also called programming. A logical 0 is written by discharging the redox-active molecules, also called erasing. A logical 0 or 1 is read by sensing a drain-to-source current, which is modulated by the charged state of the redox-active molecules. Programming and erasing typically involves transfer of electrons to and from the molecules, typically by electron tunneling.

[0006] Conventional electronic devices, such as personal computers (PCs), laptop computers, personal digital assistants (PDAs), wireless terminals, digital cameras, and the like, often employ a two-tier data storage strategy to enable the device to store and retrieve data quickly and efficiently while in a normal, powered operational mode, and to retain valued data when the device transitions to an unpowered state or a low-powered quiescent or sleep state. In particular, typical electronic devices may include volatile storage, such as static random access memory (SRAM) and/or dynamic random access memory (DRAM), as well as non-volatile storage, such as a magnetic disk, non-volatile random access memory (NVRAM) and/or flash memory. An exemplary implementation of such a strategy is illustrated in FIG. 1, which shows volatile SRAM/DRAM backed by non-volatile magnetic disk storage.

[0007] Although such a strategy can be effective, and is used in a wide variety of conventional devices, it can entail a certain amount of overhead. For example, a typical personal computer loads its operating system from non-volatile storage, typically a flash memory and/or disk, upon powering up the computer. Loading the operating system may take a long time and may consume significant power. After operating system loading, significant time may elapse and significant power may be consumed while the operating system re-initializes the overall system. In addition, a user may need to restart applications where he/she left off the last time the computer was in use, which often involves loading the applications from the non-volatile storage, typically the disk drive, into faster, volatile storage, typically DRAM. Turning off the computer typically requires a comparable software shutdown sequence, so that data integrity can be maintained.

[0008] According to some embodiments of the present invention, a molecular memory cell includes first and second electrodes. First and second charge storage molecules have respective first and second oxidation potentials and are disposed between the first and second electrodes. A molecular linkage couples the first and second charge storage molecules to the first electrode and provides respective first and second electron transfer rates for the first and second charge storage molecules, wherein the first and second different oxidation potentials are different and/or the first and second electron transfer rates are different. In particular, in some embodiments, the second oxidation potential may be greater than the first oxidation potential and the first electron transfer rate may be greater than the second electron transfer rate, such that the first charge storage molecule may be used as fast, volatile primary memory and the second charge storage molecule can be used as slower, less volatile secondary memory.

[0009] In further embodiments of the present invention, a molecular memory cell includes first and second electrodes and an admixture of charge storage molecules disposed between the first and second electrodes. The admixture includes a first charge storage molecule including a first charge storage unit with a first oxidation potential and a first linker that couples the first charge storage unit to the first electrode and provides a first electron transfer rate. The admixture further includes a second charge storage molecule including a second charge storage unit with a second oxidation potential and a second linker that couples the second charge storage unit to the first electrode and provides a second electron transfer rate. The first and second oxidation potentials are different and/or the first and second electron transfer rates are different. In particular, the second oxidation potential may be greater than the first oxidation potential, and the first electron transfer rate may be greater than the second electron transfer rate, to provide multiple levels of programming speed and/or data retention. In some embodiments, the first and second electrodes are coupled to first and second conductors of a conductor array, e.g., in a crossbar structure. In other embodiments, the molecular memory cell includes an access transistor coupled to one of the first and second electrodes, similar to a conventional DRAM structure. In further embodiments, such a molecular memory cell may include a molecular transistor including the first electrode, the first charge storage molecule, the second charge storage molecule, and the second electrode. An electrolyte may be disposed between the first and second storage molecules and the gate electrode.

[0010] The first and second charge storage units may be selected from a group consisting of porphyrinic macrocycles, metallocenes (including ferrocenes), linear polyenes, cyclic polyenes, tetrathiafulvalenes, tetraselenafulvalenes, metal coordination complexes, sandwich coordination compounds, triarylamines, 1,4-phenylenediamines, xanthenes, flavins, phenazines, phenothiazines, acridines, quinolines, 2,2-bipyridyls, 4,4-bipyridyls, tetrathiotetracenes, and peri-bridged naphthalene dichalcogenides. The first and second linkers may be selected from a group consisting of 4-carboxyphenyl, 2-(4-carboxyphenyl)ethynyl, 4-(2-(4-carboxyphenyl)ethynyl)phenyl, 4-carboxymethylphenyl, 4-(2-(4-carboxymethylphenyl)ethynyl)phenyl; 4-hydroxyphenyl, 2-(4-hydroxyphenyl)ethynyl, 4-(2-(4-hydroxyphenyl)ethynyl)phenyl, 4-hydroxymethylphenyl, 4-(2-(4-hydroxymethylphenyl)ethynyl)phenyl; 4-mercaptophenyl, 2-(4-mercaptophenyl)ethynyl, 4-(2-(4-mercaptophenyl)ethynyl)phenyl, 4-mercaptomethylphenyl, 4-(2-(4-mercaptomethylphenyl)ethynyl)phenyl; 4-selenylphenyl, 2-(4-selenylphenyl)ethynyl, 4-(2-(4-selenylphenyl)ethynyl)phenyl, 4-selenylmethylphenyl, 4-(2-(4-selenylphenyl)ethynyl)phenyl; 4-tellurylphenyl, 2-(4-tellurylphenyl)ethynyl,4-(2-(4-tellurylphenyl)ethynyl)phenyl, 4-tellurylmethylphenyl, 4-(2-(4-tellurylmethylphenyl)ethynyl)phenyl; 4-vinylphenyl, 4-allylphenyl, 2-(4-vinylphenyl)ethynyl, 4-(2-(4-vinylphenyl)ethynyl)phenyl, 4-allylphenyl, 4-(2-(4-allylphenyl)ethynyl)phenyl, 4-(dihydroxyphosphoryl)phenyl, 2-4- (dihydroxyphosphoryl)phenylethynyl, 4-2-4-(dihydroxyphosphoryl)phenylethynylphenyl, 4-(dihydroxyphosphoryl)methylphenyl, 4-2-(dihydroxyphosphoryl)ethylphenyl, 4-2-4-(dihydroxyphosphoryl)methylphenylethynylphenyl; 4-(hydroxy(mercapto)phosphoryl)phenyl, 2-4-(hydroxy(mercapto)phosphoryl)phenylethynyl, 4-2-4-(hydroxy(mercapto)phosphoryl)phenylethynylphenyl, 4-(hydroxy(mercapto)phosphoryl)methylphenyl, 4-2-(hydroxy(mercapto)phosphoryl)ethylphenyl, 4-2-4-(hydroxy(mercapto)phosphoryl)methylphenylethynylphenyl; 4-cyanophenyl, 2-(4-cyanophenyl)ethynyl, 4-2-(4-cyanophenyl)ethynylphenyl, 4-(cyanomethyl)phenyl, 4-(2-cyanoethyl)phenyl, 4-2-4-(cyanomethyl)phenylethynylphenyl, 4-cyanobiphenyl, 4-aminophenyl, 2-(4-aminophenyl)ethynyl, 4-2-(4-aminophenyl)ethynylphenyl, and 4-aminobiphenyl.

[0011] In some exemplary embodiments, the first charge storage unit includes a first metalloporphyrin unit, and the first linker includes a p-phenylene unit including a first surface attachment moiety configured to electrically couple the first linker to the first electrode and to provide a first electron transfer rate. The second charge storage unit includes a second metalloporphyrin unit having an oxidation potential that is shifted with respect to the first metalloporphyrin unit. The second linker includes a butyl chain, a plurality of bicyclooctane units, a p-phenylene unit, and a second surface attachment moiety configured to couple the second linker to the first electrode and to provide a second electron transfer rate less than the first electron transfer rate.

[0012] In further exemplary embodiments, the first charge storage unit includes a first metallocene unit, and the first linker includes a first p-phenylene unit including a surface attachment moiety configured to electrically couple the first linker to the first electrode and to provide a first electron transfer rate. The second charge storage unit includes a second metallocene unit having an oxidation potential that is shifted with respect to the first metallocene molecule. The second linker includes a second p-phenylene unit including a surface attachment moiety configured to couple the second linker to the first electrode and to provide a second electron transfer rate less than the first electron transfer rate. The first and second metallocene units may bear respective different sets of electron-withdrawing and/or electron-releasing peripheral substituent groups to provide desired oxidation potentials.

[0013] In additional embodiments of the present invention, a molecular memory cell includes first and second electrodes. A first charge storage unit is disposed between the first and second electrodes and has a first oxidation potential, and is coupled to the first electrode by a first linker that provides a first electron transfer rate. A second charge storage unit is disposed between the first and second electrodes and has a second oxidation potential. A second linker couples the second charge storage unit to the first charge storage unit and provides a second electron transfer rate. The first and second oxidation potentials are different and/or the first and second electron transfer rates are different. In particular, the second oxidation potential may be greater than the first oxidation potential, and the first electron transfer rate may be greater than the second electron transfer rate, to provide multiple levels of programming speed and/or data retention. In some embodiments, the first and second electrodes are coupled to first and second conductors of a conductor array, e.g., in a crossbar structure. In other embodiments, the molecular memory cell includes an access transistor coupled to one of the first and second electrodes, similar to a conventional DRAM structure. In further embodiments, the memory cell includes a molecular transistor including the first electrode, the first charge storage unit, the first linker, the second charge storage unit, the second linker, and the second electrode, wherein the second electrode is coupled to a gate electrode of the molecular transistor and wherein the first electrode is coupled to a channel region of the molecular transistor.

[0014] In exemplary embodiments, the first charge storage unit includes a first metalloporphyrin, and the first linker includes a p-phenylene unit including a surface attachment moiety configured to electrically couple the first linker to the first electrode. The second charge storage unit includes a second metalloporphyrin having an oxidation potential that is shifted with respect to the first metalloporphyrin, and the second linker includes a butyl chain, a plurality of bicyclooctane units, and a p-phenylene unit configured to couple the second linker to the first charge storage unit.

[0015] In still further embodiments of the present invention, a molecular transistor includes a substrate, spaced-apart first and second source/drain regions in the substrate, and a gate electrode disposed between the first and second source/drain regions. First and second charge storage molecules having respective first and second oxidation potentials are disposed between the gate electrode and a portion of the substrate between the first and second source/drain regions and are coupled to the substrate by a molecular linkage that provides respective first and second electron transfer rates for the first and second charge storage molecules. The first and second oxidation potentials are different and/or the first and second electron transfer rates are different.

[0016] The present invention offers many potential benefits. In particular, the use of a molecular memory cell with multiple levels of speed and persistence in place of conventional combinations of volatile and non-volatile memory described in the preceding background can provide an advantageous combination of speed and persistence, without undue size and/or circuit complexity. The present invention may also find beneficial application in other applications. For example, many applications may utilize variable-persistence memory cells as described herein to implement power-saving regimes or other features.

[0017] FIG. 1 illustrates a conventional memory organization.

[0018] FIG. 2 illustrates a variable-persistence molecular memory transistor according to some embodiments of the present invention.

[0019] FIGS. 3 and 4 illustrate exemplary information storage molecules for variable-persistence memory cells according to various embodiments of the present invention.

[0020] FIG. 5 illustrates a variable-persistence molecular memory transistor according to further embodiments of the present invention.

[0021] FIG. 6 illustrates exemplary information storage molecules for variable-persistence memory cells according to further embodiments of the present invention.

[0022] FIG. 7 illustrates an exemplary memory device according to some embodiments of the present invention.

[0023] FIG. 8 illustrates exemplary operations of the memory device of FIG. 7.

[0024] FIG. 9 illustrates an exemplary DRAM-type architecture according to further embodiments of the present invention.

[0025] FIG. 10 illustrates an exemplary electrochemical cell array architecture according to further embodiments of the present invention.

[0026] The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like items throughout. It will be understood that when structures are referred to as being coupled to one another, this coupling may be direct or via one or more intervening structures.

[0027] According to some embodiments of the invention, variable-persistence molecular memory cells may be provided by using a combination of first and second charge storage molecules linked to an electrode of the cell by a molecular linkage that provides respective first and second electron transfer rates for the first and second charge storage molecules. Differing oxidation potentials and/or electron transfer rates for the first and second charge storage molecules can allow the charge storage molecules to be independently accessed for reading and/or writing. Different electron transfer rates for the first and second charge storage molecules may also be used to provide different levels of persistence for the respective charge storage molecules. Memory cells with multiple speeds, programming voltages and/or levels of volatility can thereby be provided.

[0028] According to some embodiments of the invention, variable-persistence molecular transistors are provided. Such transistors can be used, for example, to implement a variable-persistence memory using, for example, a cell array structure similar to that used in flash memory devices. Memory cells according to the invention can be embodied in other ways, e.g., in other forms of electrochemical cell arrays, such as those having a structure similar to that of a DRAM or a crossbar conductor structure, as shown in FIGS. 9 and 10. It will be appreciated that other structures may fall within the scope of the present invention.

[0029] FIG. 2 illustrates a variable-persistence molecular transistor 200 according to some embodiments of the present invention. The transistor includes a substrate 250 (e.g., p-type silicon), in which source/drain regions 240a, 240b are formed. A gate structure of the transistor 200 includes a gate electrode 210. A molecular information storage element 230 attaches to an electrolyte 220 underlying the gate electrode. The molecular information storage element 230 includes first charge storage molecules 232a including first charge storage units 233a linked by first linkers 234a to a channel region 260, i.e., a portion of the substrate disposed between the source/drain regions 240a, 240b that supports formation of a channel. The molecular information storage element 230 further includes second charge storage molecule 232b including second charge storage units 233b, linked to the channel region 260 by second linkers 234b.

[0030] The first and second charge storage units 232a, 232b may have respective different oxidation potentials, such that they can be independently programmed by application of selected potentials between the gate electrode 210 and the source/drain regions 240a, 240b. The first and second linkers 234a, 234b may provide respective different electron transfer rates to and from the first and second charge storage units 233a, 233b, such that the information storage element 230 can have multiple program/erase rates and multiple leakage rates. Thus, for example, if the second linker 234b provides a lower electron transfer rate than the first linker 234a, the first charge storage molecules 232a can be used as fast, volatile storage, e.g., storage that may be quickly accessed, but that will quickly discharge and may require refreshing, while the second charge storage molecules 232b may serve as slower, non-volatile or less volatile storage.

[0031] According to the embodiments illustrated in FIG. 2, the information storage element 230 includes an admixture of at least two types of charge storage molecules, e.g., a first charge storage molecule 232a including the first charge storage unit 233a and the first linker 234a, and a second charge storage molecule 232b including the second charge storage unit 233b and the second linker 234b, each of which are separately coupled to the channel region 260 of the substrate 250. Although an admixture of two types of information storage molecules is illustrated in FIG. 2, it will be appreciated that admixtures of more than two types of information storage molecules may also be used within the scope of the invention.

[0032] The linkers 234a, 234b may include surface attachment groups that are configured to attach the linkers 234a, 234b to the channel region 260. A gate electrolyte 220 may be disposed between the charge storage molecules 232a, 232b and the gate electrode 210. The electrolyte can be, for example, a solution (e.g., Bu₄NPF₆ in CH₂Cl₂ solution; LiClO₄ in CH₃CN), a gel (e.g., Bu₄NPF₆ in propylene carbonate followed by solvent evaporation), or a polymer gel (e.g., polypropylene oxide containing LiN(CF₃SO₂)₂). Although the embodiments of FIG. 2 are shown as including a gate electrolyte 220, in further embodiments of the invention, the gate electrolyte 220 may be eliminated such that the charge storage units 233a, 233b are directly attached to the gate electrode 210. Capping groups may be present or absent from the charge storage molecules 232a, 232b, as required to attach the charge storage units 233a, 233b to the electrolyte 220 or the gate electrode 210.

[0033] The charge storage molecules 232a, 232b can provide single bit or multi-bit storage, depending on the number of oxidation states the charge storage units 233a, 233b possess. Discrimination in writing/reading to the first and second charge storage molecules 232a, 232b may be achieved by differences in rates of electron transfer (kinetics) and/or differences in oxidation potentials (thermodynamics). Preferably, the potential for each oxidation state in the second charge storage unit 233b is greater than that of any oxidation state in the first charge storage unit 233a.

[0034] A difference in rate of electron transfer may be achieved by differences in the linkers 234a, 234b. In general, for a given structural type, longer linkers afford slower electron-transfer rates. In addition, for a given length, linkers with larger HOMO-LUMO (highest occupied molecular orbital-lowest unoccupied molecular orbital) gaps than that of the charge storage unit may afford slower rates. Appropriate choices of linker length and HOMO-LUMO gap may enable electron-transfer rates to be obtained that are suitable for the desired design. The surface attachment moieties of the linkers 234a, 234b and/or the capping groups of the first and second charge storage units 233a, 233b may also affect electron transfer rates.

[0035] Charge storage units are, in general, covalently bonded to the linkers, which are in turn covalently bonded to an electrode, but it will be appreciated that other types of bonds may be used within the scope of the present invention. Charge storage molecules and/or associated nomenclature applicable to the present invention are generally described in U.S. Pat. No. 6,451,942 to Li et al.; U.S. Pat. No, 6,420,648 to Lindsey; U.S. Pat. No. 6,407,330 to Lindsey et al.; U.S. Pat. No. 6,381,169 to Bocian et al.; U.S. Pat. No. 6,324,091 to Gryko et al.; U.S. Pat. No. 6,272,038 to Clausen et al.; U.S. Pat. No. 6,212,093 to Lindsey; U.S. Pat. No. 6,208,553 to Gryko et al.; U.S. patent application Ser. No. 10/193,827, to Lindsey et al., entitled Substrates Carrying Polymers of Linked Sandwich Coordination Compounds and Methods of Use Thereof (Attorney Docket No. 5051-484IPDV); U.S. patent application Ser. No. 09/670,463 to Lindsey et al., entitled Trans Beta Substituted Chlorins and Methods of Making and Using the Same (Attorney Docket No. 5051-508IPCX2); U.S. patent application Ser. No. 09/852,560 (Publication No. 2002-0033192) to Lindsey et al., entitled Trans Beta Substituted Chlorins and Methods of Making and Using the Same (Attorney Docket No. 5051-508IP2); U.S. patent application Ser. No. 10/011,121 (Publication No. 2002-0137925) to Lindsey et al., entitled Regioisomerically Pure Oxochlorins and Methods of Synthesis (Attorney Docket No. 5051-508IP3); U.S. patent application Ser. No. 10/141,654 to Lindsey et al. entitled Solar Cells Incorporating Light Harvesting Arrays (Attorney Docket No. 5051-510CT); U.S. patent application Ser. No. 10/135,220 to Lindsey et al., entitled Rational Syntheses of Heteroleptic Lanthanide Sandwich Coordination Complexes (Attorney Docket No. 5051-539); U.S. patent application Ser. No. 10/140,654 to Lindsey et al., entitled Refined Routes to Chlorin Building Blocks (Attorney Docket No. 5051-543); U.S. patent application Ser. No. 09/932,196 to Lindsey et al., entitled Convergent Synthesis of Multiporphyrin Light-Harvesting Rods (Attorney Docket No. 5051-577); U.S. patent application Ser. No. 09/962,742 to Lindsey et al., entitled Methods of Making Porphyrins and Related Compounds with Lewis Acids (Attorney Docket No. 5051-578); U.S. patent application Ser. No. 10/164,474 to Lindsey, entitled Soluble Perylene-Porphyrin Building Blocks for Use in Light-Harvesting Rods (Attorney Docket No. 5051-580); U.S. patent application Ser. No. 10/040,059, filed Oct. 26, 2001 to Bocian et al., entitled Formation of Self-Assembled Monolayers on Silicon Substrates; U.S. patent application Ser. No. 10/017,999, filed Feb. 26, 2002 to Misra et al., entitled Method and System for Molecular Charge Storage Field Effect Transistor; U.S. patent application Ser. No. ______ , filed Feb. 19, 2002 to Lindsey et al., entitled Multistate Triple-Decker Dyads in Three Distinct Architectures for Information Storage Applications; and U.S. patent application Ser. No. 10/098,996, filed Mar. 14, 2002 to Kuhr et al., entitled Open Circuit Potential Amperometry and Voltammetry, all of which are incorporated by reference herein.

[0036] Linkers that may be used for the first and second linkers according to some embodiments of the invention include methyl, ethyl, propyl, butyl, 1,4-phenylene, 1,4-phenylethyne, ethyne, 4,4-diphenylethyne, 4,4-diphenylbutadiyne, 4,4-biphenyl, 4,4-stilbene, 1,4-bicyclooctane, 4,4-azobenzene, 4,4-benzylideneaniline, 4,4-terphenyl, 4,4-quatterphenyl, 1,4-bicyclo2.2.2octane, 1,4-adamantane, and combinations thereof. Linkers may also include cholestane (steroidal) units or other structurally rigid aliphatic molecules. A charge storage unit can also be attached without a linker (i.e., carbon-carbon single bond).

[0037] Surface attachment moieties may be a protected or unprotected reactive site or groups on the linker, and include the following: carboxy, hydroxy, mercapto, selenyl, telluryl, vinyl, dihydroxyphosphoryl, hydroxy(mercapto)phosphoryl, cyano, and amino group. Alternatively, no attachment group may be needed. It will be understood that loss of a proton, cleavage of a protecting group, loss of a labile group, or change in valency on the reactive site may occur upon attachment to the surface.

[0038] Examples of linkers/surface attachment combinations may include, but are not limited to: 4-carboxyphenyl, 2-(4-carboxyphenyl)ethynyl, 4-(2-(4-carboxyphenyl)ethynyl)phenyl, 4-carboxymethylphenyl, 4-(2-(4-carboxymethylphenyl)ethynyl)phenyl; 4-hydroxyphenyl, 2-(4-hydroxyphenyl)ethynyl, 4-(2-(4-hydroxyphenyl)ethynyl)phenyl, 4-hydroxymethylphenyl, 4-(2-(4-hydroxymethylphenyl)ethynyl)phenyl; 4-mercaptophenyl, 2-(4-mercaptophenyl)ethynyl, 4-(2-(4-mercaptophenyl)ethynyl)phenyl, 4-mercaptomethylphenyl, 4-(2-(4-mercaptomethylphenyl)ethynyl)phenyl; 4-selenylphenyl, 2-(4-selenylphenyl)ethynyl, 4-(2-(4-selenylphenyl)ethynyl)phenyl, 4-selenylmethylphenyl, 4-(2-(4-selenylphenyl)ethynyl)phenyl; 4-tellurylphenyl, 2-(4-tellurylphenyl)ethynyl, 4-(2-(4-tellurylphenyl)ethynyl)phenyl, 4-tellurylmethylphenyl, 4-(2-(4-tellurylmethylphenyl)ethynyl)phenyl; 4-vinylphenyl, 4-allylphenyl, 2-(4-vinylphenyl)ethynyl, 4-(2-(4-vinylphenyl)ethynyl)phenyl, 4-allylphenyl, 4-(2-(4-allylphenyl)ethynyl)phenyl, 4-(dihydroxyphosphoryl)phenyl, 2-4-(dihydroxyphosphoryl)phenylethynyl, 4-2-4-(dihydroxyphosphoryl)phenylethynylphenyl, 4(dihydroxyphosphoryl)methylphenyl, 4-2-(dihydroxyphosphoryl)ethylphenyl, 4-2-4-(dihydroxyphosphoryl)methylphenylethynylphenyl; 4-(hydroxy(mercapto)phosphoryl)phenyl, 2-4-(hydroxy(mercapto)phosphoryl)phenylethynyl, 4-2-4-(hydroxy(mercapto)phosphoryl)phenylethynylphenyl, 4(hydroxy(mercapto)phosphoryl)methylphenyl, 4-2-(hydroxy(mercapto)phosphoryl)ethylphenyl, 4-2-4-(hydroxy(mercapto)phosphoryl)methylphenyl, ethynylphenyl; 4-cyanophenyl, 2-(4-cyanophenyl)ethynyl, 4-2-(4-cyanophenyl)ethynylphenyl, 4-(cyanomethyl)phenyl, 4-(2-cyanoethyl)phenyl, 4-2-4-(cyanomethyl)phenylethynylphenyl, 4-cyanobiphenyl, 4-aminophenyl, 2-(4-aminophenyl)ethynyl, 4-2-(4-aminophenyl)ethynylphenyl, and 4-aminobiphenyl. Synthesis techniques for such linkers are known to those skilled in the art, as described, for example, in: Thiol-Derivatized Porphyrins for Attachment to Electroactive Surfaces, Gryko, D. T.; Clausen, P. C.; Lindsey, J. S. J. Org. Chem. 1999, 64, 8635-8647; Synthesis of Porphyrin-Linker-Thiol Molecules with Diverse Linkers for Studies of Molecular-Based Information Storage, Gryko, D. T.; Clausen, C.; Roth, K. M.; Dontha, N.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7345-7355; Synthesis of Thiol-Derivatized Ferrocene-Porphyrins for Studies of Multibit Information Storage, Gryko, D. T.; Zhao, F.; Yasseri, A. A.; Roth, K. M.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7356-7362; Synthesis of Thiol-Derivatized Porphyrin Dimers and Trimers for Studies of Architectural Effects on Multibit Information Storage, Clausen, C.; Gryko, D. T.; Dabke, R. B.; Dontha, N.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7363-7370; Investigation of Tightly Coupled Porphyrin Arrays Comprised of Identical Monomers for Multibit Information Storage, Clausen, C.; Gryko, D. T.; Yasseri, A. A.; Diers, J. R.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7371-7378; Synthesis of Thiol-Derivatized Europium Porphyrinic Triple-Decker Sandwich Complexes for Multibit Molecular Information Storage, Li, J.; Gryko, D.; Dabke, R. B.; Diers, J. R.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7379-7390; and Molecular Rods: Synthesis and Properties, Zimmerman, H. E.; King, R. K.; Meinhardt, M. B. J. Org. Chem. 1992, 57, 5484-5492. Those skilled in the art will appreciate that the nomenclature applied to these exemplary linkers presupposes single bonding of the linker, but that the nomenclature applied to a linker generally depends on the nature in which the linker is bonded to other structures. Accordingly, the present invention includes not only the linkers as recited above, but also structural equivalents that may bear different names due to different bonding arrangements.

[0039] A wide variety of structures can be used as charge storage units. These may include, but are not limited to, porphyrinic macrocycles, metallocenes, linear polyenes, cyclic polyenes, tetrathiafulvalenes, tetraselenafulvalenes, metal coordination complexes, sandwich coordination compounds, triarylamines, 1,4-phenylenediamines, xanthenes, flavins, phenazines, phenothiazines, acridines, quinolines, 2,2-bipyridyls, 4,4-bipyridyls, tetrathiotetracenes, and peri-bridged naphthalene dichalcogenides. Linear and cyclic polyenes as described herein may be unsubstituted or substituted with one or more heteroatoms such as N, O, or S. Sandwich coordination compounds as described herein may include, but are not limited to, lanthanide sandwich coordination compounds, and may be double or triple-decker sandwich coordination compounds. Preferred structures include a porphyrin, a ferrocene, and a lanthanide porphyrinic triple-decker sandwich coordination compound. Synthesis techniques for such charge storage units are known to those skilled in the art, as described, for example, in: Rational Syntheses of Porphyrins Bearing up to Four Different Meso Substituents, Rao, P. D.; Dhanalekshmi, S.; Littler, B. J.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7323-7344; Synthesis of Porphyrin-Linker-Thiol Molecules with Diverse Linkers for Studies of Molecular-Based Information Storage, Gryko, D. T.; Clausen, C.; Roth, K. M.; Dontha, N.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7345-7355; Synthesis of Thiol-Derivatized Ferrocene-Porphyrins for Studies of Multibit Information Storage, Gryko, D. T.; Zhao, F.; Yasseri, A. A.; Roth, K. M.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7356-7362; Synthesis of Thiol-Derivatized Porphyrin Dimers and Trimers for Studies of Architectural Effects on Multibit Information Storage, Clausen, C.; Gryko, D. T.; Dabke, R. B.; Dontha, N.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7363-7370; Investigation of Tightly Coupled Porphyrin Arrays Comprised of Identical Monomers for Multibit Information Storage, Clausen, C.; Gryko, D. T.; Yasseri, A. A.; Diers, J. R.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7371-7378; Synthesis of Thiol-Derivatized Europium Porphyrinic Triple-Decker Sandwich Complexes for Multibit Molecular Information Storage, Li, J.; Gryko, D.; Dabke, R. B.; Diers, J. R.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Org. Chem. 2000, 65, 7379-7390; Studies Related to the Design and Synthesis of a Molecular Octal Counter, Gryko, D.; Li, J.; Diers, J. R.; Roth, K. M.; Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Mater. Chem. 2001, 11, 1162-1180; Investigation of Rational Syntheses of Heteroleptic Porphyrinic Lanthanide (Europium, Cerium) Triple-Decker Sandwich Complexes, Gross, T.; Chevalier, F.; Lindsey, J. S. Inorg. Chem. 2001, 40, 4762-4774; Design, Synthesis, and Characterization of Prototypical Multistate Counters in Three Distinct Architectures, Schweikart, K.-H.; Malinovskii, V. L.; Diers, J. R.; Yasseri, A. A.; and Bocian, D. F.; Kuhr, W. G.; Lindsey, J. S. J. Mater. Chem. 2002, 12, 808-828.

[0040] Examples of charge storage molecules for use in some embodiments of the present invention, such as those illustrated in FIG. 2, are shown in FIG. 3. In this example, a primary charge storage unit 310 has a relatively short linker 312 coupled thereto including a p-phenylene unit with a thiol surface attachment moiety. A secondary charge storage unit 320 has a much longer linker 322 attached thereto, which includes a butyl chain, three 1,4-bicyclooctane units, and a p-phenylene unit, with an alcohol surface attachment moiety. The length and saturation of much of the linker 322 may provide a much slower rate of electron transfer between the charge storage unit 320 and a surface.

[0041] As shown, the charge storage units 310, 320 are both zinc porphyrins, but the porphyrin in the primary charge storage unit 310 bears three mesityl groups while the porphyrin in the secondary storage molecule 320 bears three pentafluorophenyl groups. The former is expected to have first and second oxidation potentials at<0.9 V vs. Ag/Ag, while the latter is expected to have first and second oxidation potentials at>0.9 V vs. Ag/Ag, such that information may be written to the primary storage molecule 310 at potentials that do not affect the secondary storage molecule 320. It will be appreciated that other peripheral substituents and central metal atoms may be used in metalloporphyrins to achieve desired oxidation potentials.

[0042] Other exemplary molecules that could be used in the embodiments of FIG. 2 are shown in FIG. 4. Primary and secondary charge storage units 410, 420 both employ a ferrocene moiety, and are attached to respective p-phenylene linkers 412, 422 of different lengths. The oxidation potential of the ferrocene in the secondary charge storage unit 420 is shifted to a more positive potential than that of the first charge storage unit 410 by incorporation of two acetyl groups. It will be understood that, in general, electron-withdrawing groups (e.g., chloro, fluoro, methanesulfonyl, trifluoromethanesulfonyl, trifluoroacetyl, formyl, methoxycarbonyl, benzoyl) and electron-releasing groups (e.g., methyl, ethyl, alkyl, methoxy, ethoxy, p-methoxyphenyl) can be added to one or both of the charge storage units 410, 420, alone or in combination; such groups are well known to those skilled in the art. The ferrocene molecules afford a single cationic oxidation state and, thus, can be used as single-bit storage molecules.

[0043] FIG. 5 illustrates a variable-persistence molecular transistor 500 according to further embodiments of the present invention. The transistor 500 includes a substrate 550 (e.g., p-type silicon), in which source/drain regions 540a, 540b (e.g., n-doped silicon) are formed. A gate structure of the transistor 500 includes a gate electrode 510, an electrolyte 520 and a bipartite molecular information storage element 530. The bipartite molecular information storage element 530 includes first charge storage molecules 532a including first charge storage units 533a linked by first linkers 534a to a channel region 560 disposed between the source/drain regions 540a, 540b. The information storage element 530 further includes second charge storage molecules 532b including second charge storage units 533b linked to the first charge storage units 533a by second linkers 534b. The first and second charge storage units 533a, 533b may have respective different oxidation potentials, such that they can be independently programmed by application of selected potentials between the gate electrode 510 and the source/drain regions 540a, 540b. The first and second linkers 534a, 534b may provide respective different electron transfer rates to and from the first and second charge storage units 533a, 533b, such that the molecular information storage element 530 has multiple program/erase rates and multiple leakage rates. Thus, for example, if the second linker 534b provides a lower electron transfer rate than the first linker 534a, the first charge storage molecules 532a can be used as fast, volatile storage, e.g., storage that may be quickly accessed, but that will quickly discharge and may require refreshing, while the second charge storage molecules 532b may serve as slower, non-volatile or less volatile storage.

[0044] An exemplary bipartite molecular structure that may be used in the transistor 500 of FIG. 5 is illustrated in FIG. 6. In this example, the primary and second charge storage units 610, 620 are similar to those illustrated in FIG. 3, but have been incorporated into a bipartite molecular structure. The primary charge storage unit 610 has a short linker 612 attached thereto including a p-phenylene unit with thiol surface attachment moiety. The secondary charge storage unit 620 has a much longer linker 622 attached thereto including a p-phenylene unit, three 1,4-bicyclooctane units, and a p-phenylene unit. A potential advantage of the use of a bipartite molecular design compared with an admixture of molecules in a memory cell is that the homogeneity of the monolayer upon surface derivatization may be more readily achieved.

[0045] It will be appreciated that a variety of other constructs, such as those employing triple-decker lanthanide porphyrinic sandwich coordination compounds, can also be used in various embodiments of the invention. Furthermore, the redox-active units used for charge storage need not necessarily be of the same types, as described in the exemplary embodiments. For example, a metallocene can be employed for primary storage, while a porphyrinic macrocycle can be employed for secondary, less volatile storage. Moreover, a single charge-storage molecule can be used for primary storage, where long retention times may not be necessary, while an oligomer of charge-storage molecules can be employed for secondary storage. The use of an oligomer of charge-storage molecules may allow a large amount of charge to be stored as part of the secondary storage process.

[0046] FIG. 7 illustrates an exemplary memory device 700 according to some embodiments of the present invention, which uses variable-persistence memory cells 711, such as those described above with reference to FIGS. 2-6. The memory cells 711 are included in a variable-persistence memory cell array 710, and are coupled to word lines 712, bit lines 713 and source lines 714 in a configuration similar to that used for conventional flash memory arrays that use conventional floating gate transistors. The word lines 712, bit lines 713 and source lines 714 may be controlled by a memory control circuit 720, e.g., a circuit operative to provide the appropriate potentials at the terminals of the transistors 711 to program/erase selected ones of primary and secondary charge storage molecules in the transistors 711.

[0047] FIG. 8 illustrates exemplary operations that might be used with a variable-persistence molecular memory device, such as the memory device 700 of FIG. 7. In a first operational mode, e.g., a normal, full-powered active mode, the transistors 711 of the memory cell array 710 are programmed/erased (or refreshed) using a first set of potentials and/or program/erase times applied to the transistors 711 such that the more volatile primary information storage molecules of the transistors 711 are programmed and/or erased (Block 810). Information stored in the transistors 711 may be read from the memory cell transistors 711 according to first criteria, e.g., first threshold voltage criteria, that are associated with the states of the primary storage molecules (Block 820). It will be appreciated that these operations (Blocks 810, 820) may repeatedly occur.

[0048] Sometime before transition to a second operational state, such as a powered down or lower-power sleep state, information stored in the primary storage molecules of the transistors 711 is written to the secondary storage molecules of the transistors 711, e.g., by using different potentials and/or program/erase times (Block 830). Such saving of data may occur, for example, in response to initiation of a shutdown sequence and/or upon detection of a power failure. After transition to the second operational state (Block 840), the secondary charge storage molecules may retain the stored data without refresh, or with a reduced refresh rate (Block 850). Upon detection of a transition back to the active state (Block 860), information stored in the secondary storage molecules of the transistors 711 may be read according to second criteria (Block 870), and programmed back into the primary storage molecules, which may be more quickly read and/or modified during normal operation (Blocks 810, 820).

[0049] It will be appreciated that the memory architecture and operations described above with reference to FIGS. 7 and 8 are offered for exemplary purposes, and that a variety of other memory architectures and/or operations can be used with the present invention. For example, instead of a transistor array, such as the transistor array 710 of FIG. 7, variable-persistence molecular information storage elements according to the present invention may be used in other types of electrochemical cell arrangements, such as an array of electrochemical cells controlled by a conductor array, as in a crossbar array, or an array of molecular capacitors, similar to structures in a conventional DRAM. It will be appreciated that such arrangements may utilize different programming/reading circuitry and/or operations than those described above.

[0050] For example, an exemplary DRAM-like molecular memory cell array 900 according to further embodiments of the present invention is illustrated in FIG. 9. The memory array 900 includes a plurality of memory cells 901 coupled to bit lines 930 and word lines 940. Each memory cell 901 includes an access transistor 910 that controls a molecular storage capacitor 920. As shown, the molecular storage capacitor 920 includes first and second electrodes 921a, 921b and a variable-persistence memory storage element 922 disposed therebetween. It will be appreciated that the molecular storage element 922 may comprise a combination of first and second (or more) charge storage molecules, as described above.

[0051] An exemplary molecular crossbar array 1000 according to further embodiments of the present invention is illustrated in FIG. 10. The array 1000 includes an array of conductors 1030, 1040 (e.g., a crossbar array) that are coupled to electrochemical cells 1010. Each of the cells 1010 includes first and second electrodes 1012a, 1012b coupled to respective ones of the conductors 1030, 1040 and a variable-persistence molecular storage element 1014 disposed therebetween. It will be appreciated that the molecular storage element 1014 may comprise a combination of first and second (or more) charge storage molecules, as described above.

[0052] In the drawings and specification, there have been disclosed typical embodiments of the invention. Although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.