Codoping of source drains using carbon or fluorine ion implants to improve polysilicon depletion

[0001] This invention relates generally to the fabrication of integrated circuits.

[0002] In the fabrication of integrated circuits, commonly source drain junctions are formed using a gate and spacer structure as a mask. As lateral device dimensions have scaled, it is necessary to scale the vertical junction depth to keep short channel effects in control. This includes scaling the gate oxide along with the junction depth. As the gate oxide thickness is reduced, minimizing polysilicon depletion effects by increasing the polysilicon doping can provide a larger opportunity to improve transistor performance.

[0003] However, depending on the way that the dopant is activated, adding higher doping concentrations to the polysilicon is accompanied by the associated increase in the source/drain junctions and the resulting spread of source drain junctions. The diffusive spread of source drain junctions may result in short channel effects that degrade the performance of transistors.

[0004] Thus, there is a need for ways to increase the polysilicon doping without adverse short channel effects that accompany the increased doping in the source/drain junctions.

[0005] FIG. 1 is a schematic depiction of one embodiment of the present invention; and

[0006] FIG. 2 is a schematic depiction of another embodiment of the present invention.

[0007] By forming n-type source drain junctions by codoping with carbon or fluorine and relatively high dosages of phosphorous, a transistor may be fabricated with reduced polysilicon gate depletion and high drive currents. Using carbon or fluorine ion implant codoping controls the diffusion of phosphorous in the source and drain regions, reducing the degradation of the short channel performance. The diffusion of phosphorous in the polysilicon gate is unhindered because diffusion through grain boundaries is the primary mechanism.

[0008] In other words, while carbon or phosphorus controls the diffusion of phosphorous in single crystalline silicon, it does not unduly limit the diffusion of phosphorous in polysilicon because of the different diffusion mechanisms involved. Thus, surprisingly, the combination of heavy phosphorous doping with carbon or fluorine implants can result in transistors with good polysilicon depletion and high drive currents without degrading short channel effects.

[0009] Referring to FIG. 1, a tip or extension implant I1 may be used with a defined polysilicon structure 12 to form the tip or extension region 14 in the semiconductor substrate 10. The tip or extension implant I1 typically involves the use of arsenic.

[0010] Thereafter, a sidewall spacer may be formed which, in one embodiment, may be made up of a thinner layer 16, followed by a thicker layer 18. In some embodiments, the layers 16 and 18 may be insulators. The formation of sidewall spacers is well known to those skilled in the art.

[0011] Following the formation of sidewall spacers, the deep source drain junction 20 may be formed by implants I2 and I3, which are a relatively high dose phosphorous implant with a carbon or fluorine implant. The implants I2, I3 may be sequential in nature so that the carbon and phosphorous implants need not occur at the same time.

[0012] By the term relatively high dosage, it is intended to refer to dosages that are much higher than typical phosphorous doping. The higher phosphorous doping level overcomes any activation issues that may arise due to the use of carbon doping. For example, phosphorous doping on the order of 1E16 atoms per square centimeter or higher, for example at an energy of 15 keV, may be used.

[0013] In one advantageous embodiment of the present invention, the ratio of the carbon or fluorine to the phosphorous concentrations in the substrate may be from about 1 to 1 to about 1 to 10. These codoping ratios result in a reduction of short channel effects, an improvement in drive currents, and desirable polysilicon depletion levels in some embodiments.

[0014] The term improvement of short channel effect (SCE) refers to the phenomenon that for a given threshold voltage (Vt), a smaller Lg (gate length) can be supported. Codoping high doses of phosphorus with carbon or fluorine can be shown to improve these SCE's. In other words, with phosphorous at a dose of 1E16 atoms per square centimeter and an energy of 15 keV, the same Vt can support a shorter Lg when phosphorus is co-doped with carbon or fluorine. Thus, the addition of carbon or fluorine allows the use of relatively high dosages of phosphorous to improve transistor drive current without unduly compromising the short channel performance.

[0015] Increasing the phosphorous dose improves drive current (IDN) through electrical gate oxide thickness reduction arising from polysilicon depletion. Thus, comparing a phosphorous dosage of 1E15 at 15 keV energy to implants of phosphorous at 1E16, shows that greater phosphorus levels generally enable an increase in the drive current through a decrease in the polysilicon depletion layer thickness when the gate is biased in inversion.

[0016] While the present invention has been described with respect to a limited number of embodiments, those skilled in the art will appreciate numerous modifications and variations therefrom. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of this present invention.