Method and apparatus to facilitate test pattern design for model calibration and proximity correction

[0001] 1. Field of the Invention

[0002] The invention relates to the process of manufacturing an integrated circuit. More specifically, the invention relates to a method and an apparatus for calibrating a model related to manufacturing the integrated circuit.

[0003] 2. Related Art

[0004] Integrated circuits can be produced through an optical lithography process that involves creating a mask with a pattern specifying where the various features of the integrated circuit are to be placed and then passing radiation through the mask to expose the pattern on a semiconductor wafer. This pattern defines where the surface of the semiconductor wafer is to be etched or where new material is to be added to create the integrated circuit.

[0005] As the features of an integrated circuit continue to get smaller, resist effects, diffraction and process effects, and other manufacturing process variations become more significant. These diffraction effects cause the actual width of a line to change from the designed width. The pitch of the lines also affects the diffraction and can change the actual line width from the desired width. FIG. 1A illustrates line width and pitch. Line width 102 is the width of a line, while pitch 104 is the pitch of the lines. Note that pitch 104 includes line width 102 and the space between lines. Optionally, pitch can be measured from midpoint of a line to the midpoint of the next line.

[0006] Process engineers create a wafer using a test pattern in order to calibrate a computer model of the process. Process engineers then use the computer model to apply corrections to the layout design so that the finished wafer has the desired dimensions after the process is complete. FIG. 1B is a flowchart illustrating the process of creating model corrections. The system starts when a test pattern containing multiple line widths and pitches is received (step 106). Next, the system creates a mask from the test pattern (step 108). A test wafer is then formed using the mask (step 110).

[0007] After the test wafer has been fabricated, the actual line widths and pitches are measured (step 112). Next, the actual line widths are compared with the desired line widths to determine the error in the actual line widths (step 114). Finally, the measured error is used to calibrate the model so that the model will more accurately approximate actual line widths (step 116).

[0008] Except in some special cases, this method is not satisfactory because the measured errors are not linear. This non-linearity causes the model corrections to be understated or overstated, thereby requiring additional test wafers to be created. In the worse case, the corrections never converge on the desired line width. FIG. 1C is a graph plotting actual line width versus pitch for a target line width of 160 nm. Target CD 118 indicates the target line width of 160 nm. The region labeled valuable data 120 provides more useful information for the model. However, the regions labeled less valuable data 122 are far removed from target CD 118 and are in non-linear regions so that model corrections are difficult to compute.

[0009] What is needed is a method and an apparatus to facilitate test pattern design for model calibration and proximity correction that do not exhibit the problems described above.

[0010] One embodiment of the invention provides a system for using a test pattern to calibrate a model of a manufacturing process for an integrated circuit. The system operates by first receiving a basic test pattern and then performing optical proximity correction (OPC) on this basic test pattern using an optical model. This optical proximity correction creates a partially corrected or modified test pattern. This partially corrected test pattern is optical proximity effect free. A mask is generated from the partially corrected test pattern and then a test wafer is created using the mask. The system measures features on the test wafer to determine a difference between the desired width and the width on the test wafer. The system calibrates the model using this difference.

[0011] In one embodiment of the invention, the basic test pattern includes multiple line widths and for each line width the basic test pattern includes multiple line pitches.

[0012] In one embodiment of the invention, performing optical proximity correction on the basic test pattern compensates for optical effects involved in creating the test wafer.

[0013] In one embodiment of the invention, the difference between the partially corrected test pattern and the test wafer includes multiple measurements for each line width and pitch.

[0014] In one embodiment of the invention, the system sorts the measurements according to the expected line width.

[0015] In one embodiment of the invention, the system compares the expected line width at a specified pitch with the actual line width at the specified pitch to determine the model error, thereby creating measurements closer to the target dimension and providing more information for accurate OPC.

[0016] In one embodiment of the invention, the system calibrates the model to compensate for the model error allowing easier judgment about the model accuracy by a process engineer.

[0017] In one embodiment of the invention, receiving the test pattern includes designing the test pattern with a plurality of lines having different widths and pitches arranged in a grid.

[0018] FIG. 1A illustrates line width and pitch.

[0019] FIG. 1B is a flowchart illustrating the process of calibrating a model.

[0020] FIG. 1C is a graph plotting actual line width versus pitch for a target line width.

[0021] FIG. 2A is a flowchart illustrating the process of calibrating an optical model in accordance with an embodiment of the invention.

[0022] FIG. 2B is a graph plotting actual line width versus pitch for a target line width in accordance with an embodiment of the invention.

[0023] FIG. 3 illustrates model calibration in accordance with an embodiment of the invention.

[0024] Creating Model Calibrations

[0025] FIG. 2A is a flowchart illustrating the process of calibrating an optical model in accordance with an embodiment of the invention. An optical model is a model created by a model generator such as ModelGen, which corrects for optical effects while creating an integrated circuit. These effects include numerical aperture (NA), wavelength (), and sigma (). Calibrating this model with a model calibrator such as ModelCal allows the calibrated model to compensate for resist and/or etch effects. ModelGen and ModelCal are trademarks or registered trademarks of Numerical Technologies, Inc. of San Jose, Calif. The system starts when a basic test pattern containing multiple line widths and pitches is received (step 202). Next, the system performs optical proximity correction on the test pattern (step 204). Note that performing optical proximity correction on the test pattern at this stage provides more accurate results on the wafer line widths and, therefore, provides better data for model calibration. A mask is then created from the test pattern (step 206). After creating the mask, a test wafer is formed using the mask (step 208).

[0026] After the test wafer has been fabricated, the actual line widths and pitches are measured (step 210). Next, the actual line widths are compared with the desired line widths to determine the error in the actual line widths (step 212). Finally, the model is calibrated for resist and/or etch effects so that the model will create line widths closer to the desired line widths (step 214). Since optical proximity correction has been performed on the test pattern, the corrections are more accurate and determined with fewer measurements and calculations.

[0027] FIG. 2B is a graph plotting actual line width versus pitch for a target line width in accordance with an embodiment of the invention. Curve 218 illustrates the predicted critical dimension (CD) from the optical model. Curve 220 illustrates the predicted CD from the calibrated model. Curve 222 illustrates the measured CD on a wafer. As illustrated, the differences from these curves to target CD 216 are relatively small and are more linear.

[0028] Model Calibration

[0029] FIG. 3 illustrates model calibration 302 in accordance with an embodiment of the invention. The system starts with optical model 304, test pattern 310, and wafer critical dimension measurements 306. Optical model 304 applies corrections to mask patterns in a format such as GDSII stream format. Test pattern 310 is a pattern of multiple line widths at multiple pitches after optical proximity correction as described above. Wafer critical dimension measurements 306 are measurements of the lines on a test wafer corresponding to the lines on test pattern 310. These wafer critical dimension measurements 306 include resist and/or etch effects.

[0030] Model calibrator 308 receives optical model 304, test pattern 310, and wafer critical dimension measurements 306. Model calibrator 308 then determines corrections to be made to optical model 304 by comparing wafer critical dimension measurements 306 with test pattern 310 to determine the magnitude and direction of the errors. Finally, model calibrator 308 calibrates optical model 304 using the calculated measurements to generate a calibrated model 312. The ModelCal software from Numerical Technologies, Inc. can be used.

[0031] The preceding description is presented to enable one to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the invention. The invention can be readily adapted to be used with next generation optical lithography techniques including, but not limited to, deep ultraviolet (DUV), extreme ultraviolet (EUV), x-ray, and e-beam with suitable adaptations. Thus, the invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0032] The data structures and code described in this detailed description can be stored on a computer readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. This includes, but is not limited to, magnetic and optical storage devices such as disk drives, magnetic tape, CDs (compact discs) and DVDs (digital versatile discs or digital video discs), and computer instruction signals embodied in a transmission medium (with or without a carrier wave upon which the signals are modulated). For example, the transmission medium may include a communications network, such as the Internet. In one embodiment of the invention, the computer instruction signals can include instructions for calibrating a model from CD measurements taken from a test wafer.

[0033] The foregoing descriptions of embodiments of the invention have been presented for purposes of illustration and description only. They are not intended to be exhaustive or to limit the invention to the forms disclosed. The scope of the invention is defined by the appended claims.