Method for fabricating micro optical elements using CMP

[0001] Slight irregularities on the wafer surfaceor on deposited filmscan distort semiconductor patterns as they are transferred by a lithographic process to the wafer. Chemical mechanical polishing or planarization (CMP) has become the process of choice for preventing this distortion by first planarizing the wafer surface to a flat, uniform finish.

[0002] To planarize the wafer, CMP systems use an abrasive suspended in chemical slurry that levels wafer topography during mechanical polishing. In a common configuration, the wafer is held by a spinning pressure ring against a polishing pad that is held on a spinning platen.

[0003] Optical elements, such as lenses and mirrors, that are used in fiber optic systems are sometimes referred to micro optical elements. They are typically small to control beams that are typically less than a few millimeters, usually less than 500 micrometers, in diameter and can approach the 5 to 10 micrometer mode sizes found in single mode fiber at beam waists.

[0004] A number of different processes exist for fabricating micro optical elements with curved optical surfaces. They typically involve some wafer-level photolithographic patterning process followed by an etch process. For example, gray-scale and half-tone masks or photoresist reflow techniques are all directed to the objective of forming a resist layer that has a curvature, which is related to the desired optical surface. The curvature of the resist is then transferred into the substrate of the optical element, typically in a non-selective etch process. Similarly, in mass-transport processes, a binary intermediate structure is formed in the substrate using a patterned photoresist. This intermediate structure is then converted into a smooth curved optical surface in a mass transport process, which involves heating in a controlled atmosphere.

[0005] Each of these processes has different tradeoffs. The processes surrounding the formation of the curved resist layer and the subsequent etch must be well characterized and controlled to fabricate the micro optics with high yield, in a production environment. Mass transport techniques require careful control of mass transport step, which can require extended periods in an oven.

[0006] This invention relates to a technique for fabricating the required surface shapes for optical elements, such as curved micro mirrors and lenses. Starting with a simple, binary for example, approximation to the desired surface shape, polishing, e.g., chemical mechanical polishing (CMP), is used to form the smooth optical surface. Specifically, starting with a mesa or blind hole with a mesa profile, a smooth mirror or lens structure can be fabricated.

[0007] In general, according to one aspect, the invention features a method for fabricating optical elements. It comprises forming topographic features on the surface of an optical element substrate. Then, mechanical polishing is performed on the surface of the substrate to modify the features. Finally, the substrate is diced or separated into individual optical elements.

[0008] In some embodiments, the step of forming the topographic features comprises forming a blind hole having a mesa profile into the substrate. Alternatively, the step of forming the topographic features comprises forming a mesa in the substrate. The former example is relevant to the formation of concave surfaces, whereas the later is relevant to convex surfaces.

[0009] In some embodiments, when etching the blind hole, a multi-layer substrate is used. The etch is then formed into the substrate to the depth of a material layer, which acts as an etch stop. Alternatively, in other embodiments, a simple timed etch process can be used to control the height of the topographic features. In one example, silicon is used, which is etched in a reactive ion etching process.

[0010] According to the preferred embodiments, the step of polishing the surface comprises performing chemical mechanical polishing.

[0011] There are several advantages to using a polishing process, and specifically CMP, to fabricate micro optical elements. Polishing is inherently a batch process, is uniform across large wafers, and yields smooth surface finishes with roughnesses on the order of nanometers.

[0012] As a typical final step to the generation of optical elements, optical coatings are required. In one example, a highly reflective (HR) layer is deposited on the surface. This is a metal layer, such as aluminum, gold, or copper in some implementations. Alternatively, a thin film coating of alternating high and low index layers is used as the HR layer, especially when high reflectivity and/or low loss HR coating is required.

[0013] In an alternative embodiment, which is especially applicable in the context of lenses, an anti-reflective (AR) coating is deposited on the surface.

[0014] The above and other features of the invention including various novel details of construction and combinations of parts, and other advantages, will now be more particularly described with reference to the accompanying drawings and pointed out in the claims. It will be understood that the particular method and device embodying the invention are shown by way of illustration and not as a limitation of the invention. The principles and features of this invention may be employed in various and numerous embodiments without departing from the scope of the invention.

[0015] In the accompanying drawings, reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale; emphasis has instead been placed upon illustrating the principles of the invention. Of the drawings:

[0016] FIGS. 1A-1C are schematic, cross-sectional views showing the fabrication sequence for the formation of the optical elements in a substrate, according to the present invention;

[0017] FIG. 2 is a schematic cross-sectional view illustrating the polishing action between the substrate and polishing pad, surrounding topographic feature;

[0018] FIG. 3 is a plot of height relative to a surface of the substrate as a function of position for a starting profile, a predicted profile after polishing, and a final measured profile in the fabrication of a concave surface after polishing according to the present invention;

[0019] FIG. 4 is a top plan view of a region of the substrate showing the scribe or die saw lines for dicing the substrate into the individual optical elements;

[0020] FIGS. 5A-5C are schematic, cross-sectional views showing a fabrication sequence according to another embodiment of the present invention;

[0021] FIG. 6 is a plot of height as a function of position showing the starting profile and the predicted profile in the fabrication of a convex surface in the substrate, according to the present invention; and

[0022] FIGS. 7A and 7B are plots of power as a function of wavelength showing the spectral responses of two Fabry-Perot etalons that were constructed from mirrors made according to the principles of the present invention.

[0023] FIGS. 1A-1C show a fabrication process for optical elements, according to the present invention.

[0024] Specifically, as illustrated in FIG. 1A, a patterning layer 110 is deposited on a substrate 100. This patterning layer 110 is typically a photoresist or other photosensitive polymer. The substrate 100 is typically a semiconductor material such as silicon wafer material. Gallium phosphide is an alternative.

[0025] Generally, if the refractive optics are being fabricated, a high index substrate is typically preferred, which is further transmissive in the wavelengths of interest. When fabricating reflective optics, the transmissivity or index is less or not important.

[0026] As further illustrated in FIG. 1A, the patterning layer 110 is patterned, such as by exposure and development, to thereby expose regions, or lessen the coverage of regions, of the underlying substrate 100. Holes having mesa profiles are patterned into the patterning layer 110, in the illustrated implementation.

[0027] Next, as illustrated in FIG. 1B, the substrate 100 is etched through the holes 112 in the patterning layer 110. The depth of the resulting blind holes 114 in the substrate 100 is carefully controlled currently. A timed reactive ion etch process has been employed. Thereafter, the patterning layer 110 is stripped, if required.

[0028] Finally, as illustrated in FIG. 1C, the patterned surface or face 116 of the substrate 100 is exposed to a polishing process. In the present preferred embodiment, chemical mechanical polishing/planarization is used.

[0029] In one example, a colloidal silica slurry having a pH of about 10 with 30% loading is used. A Suba-5000 by Rodel pad is used with 1 PSI of pressure and 0.5 m/s of linear velocity.

[0030] The polishing process has the effect of rounding-over or smoothing the profiles and edges of the etched holes 114. This modification of the topographic features 114 yields a smooth concave profile 118 after sufficient polishing.

[0031] FIG. 2 is a schematic cross-sectional view illustrating the interaction between the polishing pad 210 of the CMP system and the substrate 100 and specifically the blind hole 114 that has been formed in the substrate 100.

[0032] FIG. 3 is a plot of height in nanometers as a function of position in micrometers showing the initial pillbox or mesa profile hole 114 and the resulting smooth, concave shape 1118 that results from the CMP process, based on both from theory and actual data. The starting structure was a 14 micrometer wide by 200 nanometer deep pillbox in silicon.

[0033] Generally, longer polishes tend to decrease the overall depth of the feature from the initial pillbox feature. Additional polishing tends to widen the overall mouth of the smooth concave feature relative to the original etched pillbox or blind hole feature 114, since this is inherently a planarization process.

[0034] It is theorized that the invention uses of the asperity structures on polishing pads to polish substrate surface structures that have length scales that are similar to the pad asperity length scales. Typically, CMP asperities have length scales on the order of 10's of micrometers. It is believed that pad characteristic length scales will limit the range of possible shapes that can be achieved through the polishing process.

[0035] Knowing the characteristic length scales of a polishing pad and the starting substrate surface profile, one can predict the evolution of the profile during the polish process. Warnock (1991) developed a phenomenological model of the polish process making use of the pad length scales to predict the polishing characteristics of arrays of surface structures in the context of semiconductor device manufacturing. This simple model assumes that the local polish rate is linearly proportional to the local pressure in observance of the Preston's equation. By conserving the overall polish rate, Warnock was able to predict how different substrate topographies would polish in time.

[0036] FIG. 4 illustrates the final step of coating and dicing. Specifically, the now smoothed concave optical surfaces 118 that are formed on the surface 116 of the substrate 100 are typically first coated and then diced.

[0037] The coating process typically involves the deposition of a reflective or antireflection coating 150. In one example, a highly reflective (HR) layer is deposited on the surface 116. This is a metal layer, such as aluminum, gold, or copper in some implementations. Alternatively, a thin film coating of alternating high and low index layers is used as the HR layer, especially when high reflectivity and/or low loss HR coating is required. Additional metalizations are sometimes included for metal mounting of the elements 115.

[0038] The dicing typically includes a die saw or scribe and cleave process, for example. Specifically, scribe or saw lanes 122 are defined in the substrate 100 so that individual or multiple smooth concave surface features 118 are provided on individual optical elements 115.

[0039] FIGS. 5A-5C illustrate an alternative embodiment in which a composite substrate 100 is used. Specifically, substrate 100 has an integral layer 125 that has been deposited or otherwise formed on a base material 101. For example, the base material 101 of the substrate 100 is a silicon wafer, and the integral surface layer 125 is an oxide layer that has been deposited or possible grown thermally on the wafer base material 101. In another example, a silicon nitride layer is formed.

[0040] This surface layer 125 is then patterned. This can be performed by depositing a patterning layer such as a photoresist and then selectively etching the surface layer 125 to the depth of the base layer 101.

[0041] Next, as illustrated in FIG. 5B, the CMP polishing process is performed. This has the effect of smoothing exposed portions of the substrate 110 and also the surface layer 125. As described previously, this polishing process results in smooth surface features 118 being polished into the substrate 100.

[0042] The advantage of this process is that the progress of the polishing process can be carefully monitored by monitoring the remaining thickness of the surface layer 125. In one example, where the surface layer 125 is silicon oxide, this can be monitored optically.

[0043] Generally, as illustrated in FIG. 5C, after polishing, the surface layer 125 is selectively removed leaving only the base material 101 of the substrate 100 with the smooth surface features 118 that had been formed into the surface 116. This is accomplished using a buffered oxide etch, for example.

[0044] The resulting profile of the holes performed using this two layer process is somewhat different than as illustrated in FIG. 1C. Specifically, smooth surface features tend to have hard transitions 126 between the smooth polished surface feature 118 and the unpolished areas of the surface.

[0045] The hard transitions 126 are avoided in some implementations by polishing the surface layer 125 completely off or polishing after the remnants of the surface layer 125 have been stripped.

[0046] FIG. 6 shows the use of the present invention in the manufacture of convex smooth features in the substrate. In this example, a mesa 130 is formed in the substrate. The polishing process then converts the rectilinear mesa 130 into a smooth optical surface 132 that would be appropriate for a convex lens. This can be performed by either using the process illustrated in FIGS. 1A-1C or FIGS. 5A-5C. Typically, if the process FIGS. 5A-5C is used, the polishing process is performed until layer 125 is completely removed to yield a completely smooth surface feature.

[0047] One application of the present invention is in the fabrication of the low sag mirror structures required in the single mode hemispherical cavity Fabry-Perot etalons as described in U.S. patent application Ser. No. 09/833,139, filed on Apr. 11, 2001 by Kuznetsov, which is incorporated herein by this reference in its entirety.

[0048] FIGS. 7A and 7B illustrate the frequency responses of hemispherical cavity etalons using the spatial mode control techniques described in the Kuznetsov applications with mirror structures having curvatures manufactured according to the present invention. The spectral responses show strong single mode behavior with the higher order modes being substantially suppressed.

[0049] Cavity 1 of FIG. 7A

[0050] V2

[0051] Free Spectral Range70.04 nm

[0052] Finesse2600

[0053] PDL0.8 dB

[0054] Two higher order modes

[0055] Cavity 2 of FIG. 7B

[0056] V1.75

[0057] Free Spectral Range70.84 nm

[0058] Finesse2600

[0059] PDL0.25 dB

[0060] Two higher order modes (2^nd higher order mode finesse1100)

[0061] While this invention has been particularly shown and described with references to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention encompassed by the appended claims.