US 12,598,993 B2Grant

Three-dimensional integrated circuit

Issue Date:2026-04-07

•18 Claims

•15 Drawing Sheets

Abstract

A three-dimensional integrated circuit device can include a group of die, a device layer and a thermal interface material formed above the substrate. A heat spreader can be located above the die, the device layer and the thermal interface material. The heat spreader can include a heat pipe comprising a rectangular-shaped heat pipe or disk-shaped heat pipe. A heat sink can be located above the heat spreader. The heat sink can include the heat pipe comprising the rectangular-shaped heat pipe or the disk-shaped heat pipe.

Metadata

Assignee

KV Innovations, LLC

Inventors

Kambiz Vafai
Sainan Lu

Application Information

Application Number:US 18/111,427

Filing Date:2023-02-17

Priority Date:2022-02-21

Art Unit:2812

Classifications

IPC:

H01L23/427H01L23/00H01L25/065

Field of Search:

H01L 23/427H01L 24/16H01L 24/32H01L 24/73H01L 25/0657

Patent Drawings (15 sheets)

Description

CROSS REFERENCE TO PROVISIONAL APPLICATION

[0001] This patent application claims priority under 35 U.S.C. § 119 to U.S. Provisional patent application Ser. No. 63/312,210 which was filed on Feb. 21, 2022, and is incorporated by reference herein in its entirety.

TECHNICAL FIELD

[0002] Embodiments are related to integrated circuits. Embodiments are also related to the thermal management of integrated circuits. Embodiments further relate to three-dimensional (3D) integrated circuits. Embodiments additionally relate to heat pipes and in particular flat-shaped heat pipes. Embodiments further relate to methods, systems and devices that improve the thermal performance of 3D integrated circuits utilizing rectangular-shaped and/or disk-shaped heat pipes.

BACKGROUND

[0003] Moore's law has been applicable for many of the advancements in modern electronics. The issue of coming up against proper thermal management, however, prevents electrical devices and electrical components from being produced in much smaller scales. Hence, the industry has moved from a two-dimensional approach to a three-dimensional set-up to utilize the volume more efficiently. A three-dimensional integrated circuit (3D IC) is a metal-oxide semiconductor integrated circuit manufactured by stacking silicon wafers or dies and interconnecting them vertically using through-silicon vias (TSVs), such that they behave as a single integrated device to achieve higher performance, lower power consumption, higher functional density, lower transistor packaging density, and a smaller formfactor than conventional two-dimensional integrated circuits.

[0004] Despite all these benefits, heat built up within the stacks must be removed. 3D ICs pack an extraordinary amount of complexity into an extremely small space, which creates a substantial amount of heat, resulting in damage to the device's reliability. Thermal hotspots in 3D ICs can exacerbate failure mechanisms such as junction leakage and electromigration, resulting in degradation of the device's performance. It is increasingly important to have effective and efficient thermal management in order to optimize the design characteristics of 3D ICs. Discussions regarding this topic have dominated research in recent years. Santos et al., for example, has demonstrated that non-thinned stacked dies may act as heat spreaders to alleviate hotspot issues. It was also proposed in that study that graphite-based heat spreaders can be used as an alternative to compensate the poor heat dissipation exhibited in 3D ICs [1].

[0005] Zhang et al. [2] concluded that the embedded microfluidic cooling shows significant junction temperature reduction compared to air-cooling by evaluating the hotspot temperature of different architectures of 3D ICs experimentally. Chiang et al. [3] discussed the thermal performance with various integration schemes of 3D ICs and showed that the effects of vias are crucial in analyzing the thermal performance. Tavakkoli et al. [4, 5] performed a comprehensive thermal analysis of 3D high performance chips using numerical simulations. The effect of parametric changes in the geometrical configuration on the temperature distribution and hotspot temperature were extensively highlighted, such as size, number and spacing, TSV arrangements (nominal TSVs, uniform TSVs and core-concentrated TSVs). The investigation also sufficiently outlined the impact of the thermophysical properties of the chip and cooling fluid on the flow and heat transfer. Their results presented the key features to be used for establishing optimized design and setup of 3D ICs. And it was established that a core-concentrated TSV arrangement is the foremost emplacement of the optimized TSV arrangement in varied cases.

[0006] Wang, C., Huang, X. J., & Vafai, K. (2021) [6] performed the heat transfer computational fluid dynamic analysis to study the effects of geometric and thermal properties of multilayer nominal 3D IC chips on the temperature hotspots with different distributions of processors (overlapped cores and staggered cores). They found that the larger the number of the chip layers, the higher the hotspot temperature is; but having a large Reynolds number can help decrease the hotspot temperature. And with core-concentrated thermal TSVs, the staggered cores have better thermal performance at a lower number of layers (2-8) while the overlapped core structure performed better at a higher number of layers (10-18) [6]. Xiao et al. [7] performed the FEA and 3D CFD analysis under a natural convection environment on the thermal performance of 3D stacked ICs and proposed a fast and accurate approach to estimate equivalent thermal conductivity of interposer with various TSV parameters. They advocated that a smaller TSV diameter and SiO₂thickness and a greater TSV pitch will increase the equivalent thermal conductivity in the x-y direction but a smaller TSV pitch and SiO2 thickness and a larger TSV diameter will raise the equivalent thermal conductivity in the z direction. It was also mentioned that the maximum junction temperature difference between each layer of stacked chips is negligible for the uniform heat source setting, while the thinner chip would result in noticeable hot spots [7]. However, this conclusion is based on 3D ICs without heat sinks. With heat sinks, the device layer that is farthest from heat sink is exposed to a higher temperature compared to the device layer that is closer to the heat sinks [4].

[0007] Jain et al. [8] developed analytical and finite-element models of heat transfer in stacked 3D ICs to investigate the impact of various geometric parameters and thermophysical properties on the thermal performance. This investigation established that package and heat sink thermal resistances play a more important role in determining the rise in temperature compared to inter-die bond thermal resistances.

[0008] Heat sinks are essentially heat dissipation devices for removing heat from a heat source, such as processors and GPUs, to keep the source at a proper operating temperature. Heat sinks are crucial in optimizing the thermal performance of 3D ICs. Heat pipes can be excellent heat sinks and have been contributing to the thermal management in existing integrated circuit technology. A heat pipe is a vacuum sealed metal tube that contains a working fluid that changes from liquid to vapor when heat is applied to one end of the tube. The heated vapor moves quickly to the other end of the tube where it condenses then travels through the wick material (sintered copper) back to the heat source section. This design allows heat pipes to transfer heat much more efficiently than a solid piece of metal with the added benefits of being much lighter weight and performing well in any orientation.

[0009] It has been well established in many applications, such as spacecraft thermal controls, electronic systems cooling and many commercial thermal devices. However, the traditional heat pipes have some limitations; for instance, they only transfer heat in one direction and the round shape makes it physically difficult to get close to a very small heat source. Vafai et al. [9-13] had established and analyzed comprehensively flat-shaped heat pipes that can overcome the limitations of the traditional heat pipes. The flat-shaped heat pipes offer an effective solution for the high heat generation of 3D ICs and have far-reaching impact on the thermal management of 3D ICs with unrivaled advantages, such as a secondary feeding mechanism, substantially better geometric adoptability for complex applications and ability to fully handle the asymmetrical heat load.

BRIEF SUMMARY

[0010] The following summary is provided to facilitate an understanding of some of the innovative features unique to the disclosed embodiments and is not intended to be a full description. A full appreciation of the various aspects of the embodiments disclosed herein can be gained by taking the entire specification, claims, drawings, and abstract as a whole.

[0011] It is, therefore, one aspect of the disclosed embodiments to provide for an improved integrated circuit.

[0012] It is another aspect of the disclosed embodiments to provide the thermal management of integrated circuits.

[0013] It is a further aspect of the embodiments to provide for an improved 3D integrated circuit.

[0014] It is also an aspect of the embodiments to provide for utilization of a flat-shaped heat pipe as a thermal management strategy for a 3D integrated circuit and other devices.

[0015] It is a further aspect of the embodiments to provide for an innovative rectangular-shaped or disk-shaped heat pipe as a heat sink for 3D integrated circuits.

[0016] It is also an aspect of the embodiments to provide for an innovative method, apparatus and system that uses a flat-shaped heat pipe as a heat spreader and a heat sink in a single 3D IC structure.

[0017] The aforementioned aspects and other objectives and advantages can now be achieved as described herein. In an embodiment, a 3D integrated circuit device, can include: a substrate; a plurality of die, a device layer and a thermal interface material formed above the substrate; a heat spreader located above the plurality of die, the device layer and the thermal interface material, the heat spreader comprising a heat pipe comprising a rectangular-shaped heat pipe or disk-shaped heat pipe; and a heat sink located above the heat spreader, the heat sink comprising the heat pipe comprising the rectangular-shaped heat pipe or the disk-shaped heat pipe.

[0018] In an embodiment, a 3D integrated circuit device can include a substrate; a thermal interface material layer; a plurality of die, a device layer and a micro-bump thermal interface material layer formed above thermal interface material layer; a heat spreader located above the plurality of die, the device layer and the thermal interface material, the heat spreader comprising a heat pipe comprising a rectangular-shaped heat pipe or disk-shaped heat pipe; and a heat sink located above the heat spreader, the heat sink comprising the heat pipe comprising the rectangular-shaped heat pipe or the disk-shaped heat pipe. In an embodiment, the thermal interface layer can comprise a C4 bump (or C4 bumps).

[0019] In an embodiment, a 3D integrated circuit device, can include a substrate; a thermal interface material layer comprising C4 bumps; a plurality of die, a device layer and a micro-bump thermal interface material layer formed above the C4-bump thermal interface material layer; a heat spreader located above the plurality of die, the device layer and the thermal interface material, the heat spreader comprising a heat pipe comprising a rectangular-shaped heat pipe or disk-shaped heat pipe; and a heat sink located above the heat spreader, the heat sink comprising the heat pipe comprising the rectangular-shaped heat pipe or the disk-shaped heat pipe.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying figures, in which like reference numerals refer to identical or functionally-similar elements throughout the separate views and which are incorporated in and form a part of the specification, further illustrate the present invention and, together with the detailed description of the invention, serve to explain the principles of the present invention.

[0021] FIG. 1 illustrates a schematic diagram of the structure of a three-dimensional IC, in accordance with an embodiment;

[0022] FIG. 2 illustrates a cross-sectional view of a rectangular-shaped or disk-shaped heat pipe, in accordance with an embodiment;

[0023] FIG. 3 illustrates a graph depicting data resulting from a grid independence study for the investigated geometries, in accordance with an embodiment;

[0024] FIG. 4 illustrates a graph depicting data indicative of a comparison of the temperature distribution for the nominal benchmark 3D IC with Tavakkoli et al. [4,5] (a) along the x direction for each device layer (b) along the y direction for each device layer (c) along the z direction at the vertical center line of each core and the center line of chip, in accordance with an embodiment;

[0025] FIG. 5 illustrates a graph depicting data indicative of a comparison of the effects of different TSV arrangement on the temperature distribution of the 3D IC structure with Tavakkoli et al. [4, 5] (a) along the x direction in device layer 1 (b) along the y direction in device layer 1 (c) along the z direction at vertical center line of the core processor 3, in accordance with an embodiment;

[0026] FIG. 6 illustrates a graph depicting data indicative of a comparison of the hotspot temperature with the experimental results, in accordance with an embodiment;

[0027] FIG. 7 illustrates a graph depicting data indicative of a comparison of the vapor and liquid pressure distributions along the heat pipe;

[0028] FIG. 8 illustrates a graph depicting data indicative of a comparison of the vapor temperature profiles for different injection Reynolds numbers, in accordance with an embodiment;

[0029] FIG. 9 illustrates a graph depicting data indicative of a Device layer 1 temperature distribution for different lengths of the heat sinks (a) Copper heat sink (b) rectangular-shaped heat pipe (c) disk-shaped heat pipe, in accordance with an embodiment;

[0030] FIG. 10 illustrates a graph depicting data indicative of the effect of the lengths of the heat sink and flat-shaped heat pipes on the hotspot temperature for a nominal 3D IC structure, in accordance with an embodiment;

[0031] FIG. 11 illustrates a graph depicting data indicative of the effect of the flat-shaped heat pipe on the hotspot temperature of a typical 3D IC for heat dissipation powers, in accordance with an embodiment;

[0032] FIG. 12 illustrates a graph depicting data indicative of the effect of different configurations of the rectangular-shaped heat pipe on the hotspot temperature of a typical 3D IC configuration, in accordance with an embodiment;

[0033] FIG. 13 illustrates a graph depicting data indicative of thermal resistance of different heat sinks implemented in the 3D IC, in accordance with an embodiment; and

[0034] FIG. 14 illustrates a graph depicting data indicative of the effect of a flat-shaped heat pipe as the heat spreader on the hotspot temperature of a 3D IC, in accordance with an embodiment.

DETAILED DESCRIPTION

[0035] The particular values and configurations discussed in these non-limiting examples can be varied and are cited merely to illustrate one or more embodiments and are not intended to limit the scope thereof.

[0036] Subject matter will now be described more fully hereinafter with reference to the accompanying drawings, which form a part hereof, and which show, by way of illustration, specific example embodiments. Subject matter may, however, be embodied in a variety of different forms and, therefore, covered or claimed subject matter is intended to be construed as not being limited to any example embodiments set forth herein; example embodiments are provided merely to be illustrative. Likewise, a reasonably broad scope for claimed or covered subject matter is intended. Among other things, for example, subject matter may be embodied as methods, devices, components, or systems. Accordingly, embodiments may, for example, take the form of hardware, software, firmware, or any combination thereof (other than software per se). The following detailed description is, therefore, not intended to be interpreted in a limiting sense.

[0037] Throughout the specification and claims, terms may have nuanced meanings suggested or implied in context beyond an explicitly stated meaning. Likewise, phrases such as “in one embodiment” or “in an example embodiment” and variations thereof as utilized herein do not necessarily refer to the same embodiment and the phrase “in another embodiment” or “in another example embodiment” and variations thereof as utilized herein may or may not necessarily refer to a different embodiment. It is intended, for example, that claimed subject matter include combinations of example embodiments in whole or in part. In addition, identical reference numerals utilized herein with respect to the drawings can refer to identical or similar parts or components.

[0038] In general, terminology may be understood, at least in part, from usage in context. For example, terms such as “and,” “or,” or “and/or” as used herein may include a variety of meanings that may depend, at least in part, upon the context in which such terms are used. Typically, “or” if used to associate a list, such as A, B, or C, is intended to mean A, B, and C, here used in the inclusive sense, as well as A, B, or C, here used in the exclusive sense. In addition, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures, or characteristics in a plural sense. Similarly, terms such as “a,” “an,” or “the”, again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0039] Rectangular-shaped and disk-shaped heat pipes, as innovative heat sinks, can be used to optimize the thermal performance of three-dimensional integrated circuits (3D ICs). Finite volume numerical analysis can be employed to carry out the simulation of the thermal performance of 3D ICs. Both rectangular-shaped and disk-shaped heat pipes can substantially improve the overall thermal performance and reduce the hotspot temperatures by, for example, 7 K and 11 K on average, respectively. Furthermore, utilizing the rectangular-shaped or the disk-shaped heat pipe embodiments as a heat spreader in place of a solid copper heat spreader can further optimize the thermal performance by reduction of the junction temperatures, for example, 14 K and 16 K on average, respectively. These reductions can be achieved while the weight of the set-up can be also significantly reduced. The results indicate that the disclosed innovative flat-shaped heat pipes can significantly optimize the thermal performance of 3D ICs. The model and results discussed herein aim to pave the way to markedly alleviate the thermal issues of 3D ICs.

[0040] The embodiments relate to the utilization of flat-shaped heat pipes as heat sinks and heat spreaders on the thermal performance of 3D ICs with a core-concentrated TSVs arrangement. A significant effect of flat-shaped heat pipes on the reduction of junction temperature and the overall thermal performance of the 3D IC structure may be improved through implementation of the embodiments.

[0041] FIG. 1 illustrates a schematic diagram of the structure of a three-dimensional IC, in accordance with an embodiment. The schematic of the nominal 3D IC structure is shown in FIG. 1 as shown in Tavakkoli et al. [4, 5]. As can be seen, the 3D IC structure incorporates a substrate, a thermal interface material (TIM) layer with C4 bumps, three layers of dies, device layers and thermal interface materials with microbumps, a heat spreader and a flat-shaped heat pipe as the heat sink. Device layers, bonded between TIM with microbumps and die, comprises four processors which are the main heat. Table 1 displays the nominal values for different components of the 3D IC structure, including materials, length and width, and thickness.

[0042] The nominal heat dissipation (30 W each layer) produced by the transistors in the processors, are conducted through the layers to the substrate downward and to the heat spreader, and subsequently dissipated to the heat sink upward and eventually to the ambient air through convective heat transfer. Conductive heat transfer through the solid, and isotropic layers of the 3D IC are governed by:

[0043]

\begin{matrix} \frac{\partial^{2} Θ_{s}^{+}}{\partial x^{+ 2}} + \frac{\partial^{2} Θ_{s}^{+}}{\partial y^{+ 2}} + \frac{\partial^{2} Θ_{s}^{+}}{\partial z^{+ 2}} + q_{g}^{+} = 0 & (1) \end{matrix}

[0044] Where q_g⁺ denotes the dimensionless volumetric heat generation in the central processing units and the nondimensionalized temperature and coordinates are set up as:

[0045]

x^{+} = \frac{x}{h},

y^{+} = \frac{y}{h},

z^{+} = \frac{z}{h},

Θ^{+} = \frac{T - T_{e}}{qh / k_{f}}

[0046] The natural convective heat transfer is replayed at the bottom surface of the substrate, whereas the forced convection is administered at the top surface of the flat-shaped heat pipes. The convective boundary conditions are:

[0047]

\begin{matrix} \frac{\partial Θ_{s}^{+}}{\partial n} = - Bi \cdot Θ_{s}^{+} & (2) \end{matrix}

[0048] Where n is the normal coordinate and Bi is the dimensionless Biot number.

[0049] The heat transfer and fluid flow are based on the Navier-stokes equations. The cooling fluid enters into the 3D IC package at ambient temperature with a specified Reynolds number and exits the package at atmospheric pressure with negligible streamwise temperature change. The dimensionless Navier-Stokes equations in Cartesian coordinates are:

Mass Conservation:

[0050]

\begin{matrix} \frac{\partial u^{+}}{\partial x^{+}} + \frac{\partial v^{+}}{\partial y^{+}} + \frac{\partial w^{+}}{\partial z^{+}} = 0 & (3) \end{matrix}

x-Momentum Equation:

[0051]

\begin{matrix} {Re}_{h} (u^{+} \frac{\partial u^{+}}{\partial x^{+}} + v^{+} \frac{\partial u^{+}}{\partial y^{+}} + w^{+} \frac{\partial u^{+}}{\partial z^{+}}) = - \frac{\partial p^{+}}{\partial x^{+}} + (\frac{\partial^{2} u^{+}}{\partial x^{+ 2}} + \frac{\partial^{2} u^{+}}{\partial y^{+ 2}} + \frac{\partial^{2} u^{+}}{\partial z^{+ 2}}) & (4) \end{matrix}

y-Momentum Equation:

[0052]

\begin{matrix} {Re}_{h} (u^{+} \frac{\partial v^{+}}{\partial x^{+}} + v^{+} \frac{\partial v^{+}}{\partial y^{+}} + w^{+} \frac{\partial v^{+}}{\partial z^{+}}) = - \frac{\partial p^{+}}{\partial y^{+}} + (\frac{\partial^{2} v^{+}}{\partial x^{+ 2}} + \frac{\partial^{2} v^{+}}{\partial y^{+ 2}} + \frac{\partial^{2} v^{+}}{\partial z^{+ 2}}) & (5) \end{matrix}

z-Momentum Equation:

[0053]

\begin{matrix} {Re}_{h} (u^{+} \frac{\partial w^{+}}{\partial x^{+}} + v^{+} \frac{\partial w^{+}}{\partial y^{+}} + w^{+} \frac{\partial w^{+}}{\partial z^{+}}) = - \frac{\partial p^{+}}{\partial z^{+}} + (\frac{\partial^{2} w^{+}}{\partial x^{+ 2}} + \frac{\partial^{2} w^{+}}{\partial y^{+ 2}} + \frac{\partial^{2} w^{+}}{\partial z^{+ 2}}) & (6) \end{matrix}

Energy Conservation for the Fluid Domain:

[0054]

\begin{matrix} {Pe}_{h} (u^{+} \frac{\partial Θ_{f}^{+}}{\partial x^{+}} + v^{+} \frac{\partial Θ_{f}^{+}}{\partial y^{+}} + w^{+} \frac{\partial Θ_{f}^{+}}{\partial z^{+}}) = \frac{\partial^{2} Θ_{f}^{+}}{\partial x^{+ 2}} + \frac{\partial^{2} Θ_{f}^{+}}{\partial y^{+ 2}} + \frac{\partial^{2} Θ_{f}^{+}}{\partial z^{+ 2}} & (7) \end{matrix}

The Nondimensionalized Terms in the Above Equations are:

[0055]

u^{+} = \frac{u}{u_{m}}, v^{+} = \frac{v}{v_{m}}, w^{+} = \frac{w}{w_{m}}, p^{+} = \frac{ph}{μ_{f} u_{m}}, {Re}_{h} = \frac{ρ_{f} u_{m} h}{μ_{f}}, {Pe}_{h} = \frac{ρ_{f} c_{p, f} u_{m} h}{k_{f}}

[0056] FIG. 2 illustrates a cross-sectional view of a heat pipe, in accordance with an embodiment. The design and set up of a rectangular-shaped or disk-shaped heat pipe in previous works of Vafai et al. [9-13] are deployed in this work. The cross section view of the heat pipe is displayed as FIG. 2. The assumptions made in this model are: (1) Vapor and liquid flow are steady, laminar and subsonic. (2) Transport properties for the vapor and liquid are taken as constant. (3) The vapor injection and suction rate are uniform in the evaporator and condenser sections. (4) The vapor velocity component in the z direction is negligible since there is no injection or suction on vertical wicks.

[0057] The analytical solution for the vapor pressure distribution, liquid pressure distribution and temperature distribution for the rectangular-shaped heat pipe and disk-shaped heat pipe are documented in Vafai et al. [9-13]. Based on the analysis given in these works, we can obtain the rectangular and disk-shaped vapor and liquid pressure and temperature distributions, as given in eqs. (8) to (14) which are used to validate our model.

Rectangular-Shaped Heat Pipe's Vapor Pressure Distribution

[0058]

\begin{matrix} Δ p_{v}^{+} (x^{+}) = {\begin{matrix} \begin{matrix} - \frac{4 (1 - φ)}{(2 - φ)} {Re}_{h} {[\frac{16 (1 - φ)}{25 φ} {Re}_{h} + \frac{1}{2 {(h_{b}^{+})}^{2}}] {(x^{+})}^{2} + \\ \int_{0}^{x^{+}} \frac{x^{+}}{f^{+} (x^{+}) (1 - f^{+} (x^{+}))} {dx}^{+}} \\ (0 \leq x^{+} \leq φ l^{+}) \end{matrix} \\ \begin{matrix} Δ p (φ l^{+}) - \frac{4 φ}{(2 - φ)} {Re}_{h} {[\frac{16 φ}{25 (2 - φ)} {Re}_{h} - \frac{1}{2 {(h_{b}^{+})}^{2}}] \\ [{(x^{+} - l^{+})}^{2} - {(φ l^{+} - l^{+})}^{2}] - \\ \int_{0}^{x^{+}} \frac{x^{+} - l^{+}}{f^{+} (x^{+}) (1 - f^{+} (x^{+}))} {dx}^{+}} \\ (φ l^{+} \leq x^{+} \leq l^{+}) \end{matrix} \end{matrix} & (8) \end{matrix}

[0059] Where f⁺(x⁺) can be found from:

[0060]

\begin{matrix} \frac{{df}^{+} (x^{+})}{{dx}^{+}} = {\begin{matrix} \begin{matrix} [- \frac{9}{2} (1 - φ) f^{+} (x^{+}) + \\ 5 \frac{(2 - φ)}{{Re}_{h}} \frac{1}{f^{+} (x^{+})} - \frac{5}{2} φ] \frac{1}{(1 - φ) x^{+}} \end{matrix} & (0 \leq x^{+} \leq φ l^{+}) \\ \begin{matrix} [- φ f^{+} (x^{+}) + \\ 10 \frac{(2 - φ)}{{Re}_{h}} \frac{1}{f^{+} (x^{+})}] \frac{1}{7 φ (l^{+} - x^{+})} \end{matrix} & (φ l^{+} \leq x^{+} \leq l^{+}) \end{matrix} & (9) \end{matrix}

Rectangular-Shaped Heat Pipe's Liquid Pressure Distribution

[0061]

\begin{matrix} Δ p_{l}^{+} (x^{+}) = {\begin{matrix} \begin{matrix} Δ p_{v}^{+} (l^{+}) - \frac{h_{w}^{+} μ^{+} (1 - φ) {Re}_{h}}{2 (2 - φ) K^{+}} {φ (1 - φ) {(l^{+})}^{2} + \\ [{(φ l^{+})}^{2} - {(x^{+})}^{2}]} \end{matrix} \\ (0 \leq x^{+} \leq φ l^{+}) \\ \begin{matrix} Δ p_{v}^{+} (l^{+}) - \frac{h_{w}^{+} μ^{+} φ {Re}_{h}}{2 (2 - φ) K^{+}} {(l^{+} - x^{+})}^{2} & (φ l^{+} \leq x^{+} \leq l^{+}) \end{matrix} \end{matrix} & (10) \end{matrix}

Rectangular-Shaped Heat Pipe's Temperature Distribution

[0062]

\begin{matrix} Δ T_{v}^{+} (x^{+}) = {(T_{ov}^{+})}^{2} [\frac{\ln p_{v}^{+ 2} (x^{+}) - \ln p_{ov}^{+}}{1 - T_{ov}^{+} (\ln p_{ov}^{+} - \ln p_{v}^{+} (x^{+}))}] & (11) \end{matrix}

Disk-Shaped Heat Pipe's Vapor Pressure Distribution

[0063]

\begin{matrix} p_{v}^{+} (r^{+}) = {\begin{matrix} \begin{matrix} p_{v}^{+} (0) - \frac{24}{25} {(\frac{1 - φ^{2}}{2 - φ^{2}} {Re}_{h} R^{+})}^{2} {(\frac{r^{+}}{R^{+}})}^{2} & (0 \leq r^{+} \leq φ R^{+}) \end{matrix} \\ \begin{matrix} p_{v}^{+} (0) - \frac{8}{25} {(\frac{φ^{2}}{2 - φ^{2}} {Re}_{h} R^{+})}^{2} [3 {(\frac{r^{+}}{R^{+}})}^{2} + {(\frac{R^{+}}{r^{+}})}^{2} \\ - 4 \ln \frac{r^{+}}{R^{+}} - 2 (3 - 2 \ln φ - \frac{1}{φ^{2}})] \\ (φ R^{+} \leq r^{+} \leq R^{+}) \end{matrix} \end{matrix} & (12) \end{matrix}

Disk-Shaped Heat Pipe's Liquid Pressure Distribution

[0064]

\begin{matrix} p_{l}^{+} (r^{+}) = {\begin{matrix} \begin{matrix} p_{v}^{+} (0) + \frac{v^{+} {{Re}_{h} (R^{+})}^{2}}{4 {K^{+} (h_{w}^{+})}^{3}} \frac{1 - φ^{2}}{2 - φ^{2}} [{(\frac{r^{+}}{R^{+}})}^{2} + \frac{2 φ^{2}}{2 - φ^{2}} \ln φ] - \\ {(\frac{4}{5} \frac{φ^{2} {Re}_{h}}{2 - φ^{2}} R^{+})}^{2} (2 \ln φ + \frac{1}{φ^{2} - 1)}) \\ (0 \leq r^{+} \leq φ R^{+}) \end{matrix} \\ \begin{matrix} p_{v}^{+} (0) + \frac{v^{+} {{Re}_{h} (R^{+})}^{2}}{4 {K^{+} (h_{w}^{+})}^{3}} \frac{φ^{2}}{2 - φ^{2}} [1 - {(\frac{r^{+}}{R^{+}})}^{2} - 2 \ln (\frac{R^{+}}{r^{+}})] - \\ {(\frac{4}{5} \frac{φ^{2} {Re}_{h}}{2 - φ^{2}} R^{+})}^{2} (2 \ln φ + \frac{1}{φ^{2}} - 1) \\ (φ R^{+} \leq r^{+} \leq R^{+}) \end{matrix} \end{matrix} & (13) \end{matrix}

Disk-Shaped Heat Pipe's Temperature Distribution

[0065]

\begin{matrix} Δ T_{v}^{+} (r^{+}) = {(T_{ov}^{+})}^{2} [\frac{\ln p_{v}^{+} (r^{+}) - \ln p_{ov}^{+}}{1 - T_{ov}^{+} (\ln p_{ov}^{+} - \ln p_{v}^{+} (r^{+}))}] & (14) \end{matrix}

[0066] Once the vapor pressure distribution is found, the vapor temperature distribution within the heat pipe can be obtained from equations (11) and (14). The temperature difference across the heat pipe may be employed to calculate the effective thermal conductivity of the rectangular-shaped heat pipe and disk-shaped heat pipe with the Eqs. (15) and (16) [14].

[0067]

\begin{matrix} k_{eff} = \frac{{QL}_{eff}}{A Δ T} & (15) \end{matrix}

\begin{matrix} L_{eff} = \frac{L_{evaporator} + L_{condenser}}{2} + L_{adiabatic} & (16) \end{matrix}

[0068] Where k_effis the effective thermal conductivity; Q is the power transported; L_effis the effective length; A is the cross-sectional area; ΔT is the temperature difference between evaporator and condenser sections. In this study, the evaporator section is on the bottom surface of the heat pipe and the rest of the heat pipe's external area acts as the condenser section [9]. Once the effective thermal conductivity is obtained, the heat pipe employed for the 3D IC structure will be modeled as a solid flat plate in the system. It should be noted that the rectangular shaped and disk-shaped heat pipes not only possess the extraordinary heat transfer capacity and rate, but also lighter in weight when compared to solid copper of the same size. This makes their use even more appealing. The nominal dimension of the heat pipe is 50×50×29.4 mm³in this investigation, in which the total height of the wick structure is 4 mm. The rest of the volume is a vapor channel, which is negligible in weight. Compared to the same sized solid copper plate, the weight of the heat pipe is over 7 times lighter.

[0069] COMSOL Multiphysics can be utilized to set up the simulations. For model validation, a grid independence study was executed for all investigated geometries and the junction temperature for each geometry was evaluated using computational meshes for different cell distributions. FIG. 3 presents the grid independence study for the nominal cases applying customized coarser, coarse, normal and fine mesh distributions. It can be concluded that there is no advantage to further increasing the number of grid cells after coarse mesh distribution. The last refined mesh gives a relative difference of %0.02 for the hotspot temperature in comparison with the prior mesh. To minimize the computational cost while maintaining the accuracy of the simulation, the coarse mesh distribution is applied in this study.

[0070] To ratify the model, the temperature distribution of the 3D IC is validated with both the previous simulation work [4] and the experimental results [2]. The vapor pressure distribution, liquid pressure distribution and temperature distribution within the rectangular-shaped heat pipe is compared with the comprehensive analytical solution of Vafai and Wang [9].

[0071] FIG. 4 illustrates the resemblance of the temperature distribution for the nominal benchmark 3D IC along the x, y, and z directions for each device layer between the work of Tavakkoli et al. [4] and the present work. FIG. 5 displays the comparison of the effect of different TSV arrangements on the temperature distribution of the 3D IC structure along the x, y and z directions in the device layer 1. It should be recognized that the z direction is at the vertical center line of the core processor 3. The comparisons between these two works show very good agreement.

[0072] The model is further validated by the experimental results obtained by Zhang et al. [2], where the setup model is similar with our simulation model. Zhang et al. [2] set up the air-cooled 3D IC stack with two layers of stacked processors instead of three for the current simulation model. For the validation purpose, the simulation of two layers of stacked processors are implemented to compare the hotspot temperature in the simulation model with the experimental results. FIG. 6 substantiates the validation of the 3D IC model setup used in the research work. FIG. 7 and FIG. 8 exhibit a comparison of our results for the flat-shaped heat pipes with the comprehensive analytical results acquired by Vafai & Wang [9].

[0073] The temperature distribution of a 3D IC deploying a copper heat sink, a rectangular-shaped heat pipe and a disk-shaped heat pipe with different heat sink lengths for device layer 1 is investigated. It was concluded in the work of Tavakkoli et al. [4] that the junction temperature is manifested in device layer 1. It should be emphasized that the core-concentrated TSV arrangement is employed throughout the study. The same study from Tavakkoli et al. [4] unveiled that the core-concentrated TSV is superior to the other employments of the optimized TSV arrangement. The current investigation is aimed to optimize the thermal performance based on the foremost employment with the preeminent performance in the previous work. As seen from FIG. 9, as the length of the heat sinks increases, the temperature decreases for all three heat sinks. It is evident that the temperature of the 3D IC drops significantly when the heat sink length increases from 50 mm to 100 mm. The rate of temperature deduction is slower as the length increases further. FIGS. 9(b) and (c) highlights the substantial effect of the rectangular-shaped and disk-shaped heat pipe on the performance of a 3D IC. The rectangular-shaped heat pipe improved the thermal performance by reducing the temperature by 8 degrees in all lengths compared to the copper heat sink. As it was strengthened in Vafai et al. investigations [9-13], the disk-shaped heat pipe showed more advanced performance than the rectangular-shaped heat pipe. With the fixed contact surface area, FIG. 9(c) demonstrated a 16 degrees reduction in temperature when the length of the heat sink is 50 mm (R=28 mm for the disk-shaped heat pipe) and an average 10 degrees in other lengths compared to the copper heat sink. These findings reveal that both the rectangular-shaped and disk-shaped heat pipe contribute to the optimization of the thermal performance of the 3D IC by maximizing the heat conduction and minimizing the temperature rise in the 3D ICs.

[0074] FIG. 10 further unveils a comparison of different lengths of a flat-shaped heat pipe and a copper heat sink on the hotspot temperature of the 3D IC. The hotspot temperature declines remarkably when the rectangular-shaped heat pipe and disk-shaped heat pipe are implemented in the 3D IC structure. As anticipated, the disk-shaped heat pipe performs superior to rectangular-shaped one at all lengths. There is considerable drop in the hot spot temperature when using a flat shaped heat pipe as compared with a copper heat sink. In addition, as mentioned earlier we also have the advantage of a substantial reduction in the weight when using the flat-shaped heat pipes for the 3D IC set up.

[0075] FIG. 11 demonstrates the effect of increasing the heat dissipation on the hotspot temperature of a typical 3D IC utilizing a flat-shaped heat pipe compared with a copper heat sink. The allowed operating temperature for 11^thGen Intel Core™ i7 & i9 is 373 K. The 3D IC with a copper heat sink is heated up to 393.45 K at a power of 300 W resulting in the termination of the 3D IC, while the 3D IC with a rectangular flat-shaped heat pipe can operate under 300 W heat dissipation and the one executed with a disk-shaped heat pipe can reach nearly 400 W. These data establish the powerful effect of both the rectangular-shaped and disk-shaped heat pipes on the junction temperature for high-power processors.

[0076] For a typical fixed contact surface area 10,000 mm², the hotspot temperature for different configurations of a rectangular-shaped heat pipe is investigated (50×200 mm², 60×167 mm², 70×143 mm², 80×125 mm², 90×112 mm², 100×100 mm²). FIG. 12 illustrates a moderate temperature drop of 2 K when using a square shaped flat-shaped heat pipe. That is the square shaped heat pipe (100×100 mm²) carries the premier thermal performance for 3D IC.

[0077] The thermal resistances of the three different heat sinks are probed. As it can be observed from FIG. 13, the average thermal resistance for the copper heat sink is about 0.104 K/W, while it is 0.0004 K/W for rectangular shaped heat pipe and almost zero for the disk-shaped heat pipe, respectively. These details authenticated the outstanding performance of the flat-shaped heat pipes compared to a copper heat sink.

[0078] FIG. 14 presents the effects of the flat-shaped heat pipe as a heat spreader on the hotspot temperature. The size of the flat-shaped heat pipe as the heat spreader employed in the simulation is 50×50×3 mm³(R=28 mm for disk-shaped one) with the effective thermal conductivity of 5000 W/m·K. The copper heat sink, rectangular-shaped heat pipe heat sink and disk-shaped heat pipe heat sink are administered on top of the copper heat spreader, rectangular-shaped heat pipe heat spreader and disk-shaped heat pipe heat spreader, respectively. It is seen that using a much lighter weight flat-shaped heat pipe as the heat spreader has a very substantial effect on the hotspot temperature of 3D ICs as opposed to a copper heat spreader of the same size. For a 3D IC with the heat sink length and width 100×100 mm², the hotspot temperature using the copper heat sink with the copper heat spreader reaches 321.48 K, while the one applying rectangular heat pipes as the heat sink and the heat spreader reduces the hotspot temperature by over 13 K and the one utilizing the disk-shaped heat pipes as the heat sink and the heat spreader further enhances the thermal performance by decreasing the hotspot temperature by almost 17 K.

[0079] The optimization and the thermal performance and management of 3D ICs utilizing the innovative rectangular-shaped and disk-shaped heat pipes is investigated in this work. The effects of these innovative flat shaped heat pipes on the temperature distribution and hotspots is explored in detail. All the models investigated in this work were rigorously validated with established analytical and experimental results. The thermal performance and management of the rectangular-shaped and disk-shaped heat pipe as heat sinks and heat spreaders for usage in 3D IC structures were analyzed in detail and their effectiveness were compared with the current use of copper heat sinks and copper heat spreaders. We have established that the flat-shaped heat pipes substantially reduce the temperature distribution and the hotspot temperature. The following conclusions were corroborated in the present work:

[0080] Both the rectangular-shaped and disk-shaped heat pipes substantially lower the hotspot temperatures. The rectangular-shaped heat pipe brought down the hotspot temperature by 8° C., the disk-shaped heat pipe can lower it by about 16° C. They offer this sizeable advantage while the 3D IC structure's weight at the same time becomes markedly lighter.

[0081] For high-power processors, flat-shaped heat pipes play a vital role in reducing the hotspot temperature. The most prominent solution is to deploy the disk-shaped heat pipe to reduce the hotspot temperature due to the high-power consumption.

[0082] The square-shaped heat pipe (100×100 mm²) has the superior thermal performance compared with other rectangular-shaped heat pipe configurations. However, the impact of the change in the configuration from square to rectangular is not that significant.

[0083] A copper heat spreader in the 3D IC structure can be replaced by the rectangular-shaped or disk-shaped heat pipe to further optimize the thermal performance. Within the scope of the current study, this replacement reduces the hotspot temperature by 13 K or 17 K, respectively.

[0084] It can be appreciated that the embodiments disclosed herein can be implemented in a number of systems and devices, and in the manufacturing of such systems and devices. Examples of systems/devices in which one or more of the embodiments may be implemented include mobile devices and NAND flash memory chips. One example where the disclosed 3D IC (for example, as a 3D IC chip) may find usefulness is in a handheld game console such as the Sony PlayStation Portable (PSB). The Sony PSB can include hardware, for example, such as eDRAM (embedded DRAM) memory in a 3D IC chip (e.g., a 3D system-in-package chip) with two dies stacked vertically. This semi-embedded DRAM arrangement has also been referred to as a ‘chip-on-chip’ (CoC) solution. Other examples where the embodiments can be implemented include multi-layer 3D IC's, embedded NAND flash memory, and multi-chip package and package on package solutions for NAND flash memory in mobile devices. Other devices in which the embodiments can be implemented include High Bandwidth Memory (HBM) including stacked chips and TSVs.

[0085] It will be appreciated that variations of the above-disclosed and other features and functions, or alternatives thereof, may be desirably combined into many other different systems or applications. It will also be appreciated that various presently unforeseen or unanticipated alternatives, modifications, variations or improvements therein may be subsequently made by those skilled in the art which are also intended to be encompassed by the following claims.

[0086]


NOMENCLATURE
c_p	Specific heat at constant pressure [J (kg · K)⁻¹]
f(x)	Position of the maximum value of vapor velocity in y direction
	[m]
h	Height [m]
h_b⁺	Dimensionless half width of any of the vapor channels, b/h
h_w	Thickness of the wick [m]
k	Thermal conductivity [W (m · K)⁻¹]
K	Permeability [m²]
k_eff	Effective thermal conductivity [W (m · K)⁻¹]
l	Length of the heat pipe [m]
L_eff	Effective length [m]
L_c	Characteristic length [m]
n	Normal coordinate
p	Pressure [Pa]
Δp_l	Overall liquid pressure drop along the heat pipe [Pa]
Δp_v	Overall vapor pressure drop along the heat pipe [Pa]
Pe_h	Peclet number
q	Heat flux [W · m⁻²]
{dot over (q)}_g	Volumetric heat generation rate [W · m⁻³]
r	coordinate
R	Radius of the disk-shaped heat pipe [m]
Re_h	Reynolds number
T	Temperature [K]
u	x-component of velocity [m · s⁻¹]
v	y-component of velocity [m · s⁻¹]
w	z-component of velocity [m · s⁻¹]
x, y, z	Cartesian coordinates
Greek symbols
φ	Ratio of the evaporator length to the heat pipe length
ν	Kinematic viscosity of the vapor [m²· s⁻¹]
Θ	Dimensionless temperature
ρ	Density [kg · m⁻³]
μ	Dynamic viscosity [(N · s)m⁻²]
Subscripts
f	Fluid
m	Mean
e	Evaporator
c	Condenser
l	Liquid phase
v	Vapor phase
w	Wick
0	Initial
Superscripts
+	Dimensionless quantities

REFERENCES

[0087] [1] Santos, C., Vivet, P., Colonna, J. P., Coudrain, P. and Reis, R., 2014, December. Thermal performance of 3D ICs: Analysis and alternatives. In 2014 International 3D Systems Integration Conference (3DIC) (pp. 1-7). IEEE.
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[0089] [3] Chiang, T. Y., Souri, S. J., Chui, C. O. and Saraswat, K. C., 2001, December. Thermal analysis of heterogeneous 3D ICs with various integration scenarios. In International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224) (pp. 31-2). IEEE.
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[0091] [5] Tavakkoli, F., Ebrahimi, S., Wang, S. and Vafai, K., 2016. Thermophysical and geometrical effects on the thermal performance and optimization of a three-dimensional integrated circuit. Journal of Heat Transfer, 138(8).
[0092] [6] Wang, C., Huang, X. J. and Vafai, K., 2021. Analysis of hotspots and cooling strategy for multilayer three-dimensional integrated circuits. Applied Thermal Engineering, 186, p. 116336.
[0093] [7] Xiao, C., He, H., Li, J., Cao, S. and Zhu, W., 2017. An effective and efficient numerical method for thermal management in 3D stacked integrated circuits. Applied Thermal Engineering, 121, pp. 200-209.
[0094] [8] Jain, A., Jones, R. E., Chatterjee, R. and Pozder, S., 2009. Analytical and numerical modeling of the thermal performance of three-dimensional integrated circuits. IEEE Transactions on Components and Packaging Technologies, 33(1), pp. 56-63.
[0095] [9] Vafai, K. and Wang, W., 1992. Analysis of flow and heat transfer characteristics of an asymmetrical flat plate heat pipe. International journal of heat and mass transfer, 35(9), pp. 2087-2099.
[0096] [10] Vafai, K., Zhu, N. and Wang, W., 1995. Analysis of asymmetric disk-shaped and flat-plate heat pipes.
[0097] [11] Wang, Y. and Vafai, K., 2000. An experimental investigation of the thermal performance of an asymmetrical flat plate heat pipe. International journal of heat and mass transfer, 43(15), pp. 2657-2668.
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[0099] [13] Vafai, K. and Zhu, N., 2014. Closure to “Analysis of Asymmetric Disk-Shaped and Flat-Plate Heat Pipes”. Journal of Heat Transfer, 136(11).
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Claims

What is claimed is:

1. A three-dimensional (3D) integrated circuit device, comprising:

a thermal interface material layer configured above or from a substrate;

a plurality of die, a device layer and a micro-bump thermal interface material layer formed above thermal interface material layer;

a heat sink located above the heat spreader, the heat sink selected from the rectangular-shaped heat pipe and the disk-shaped heat pipe, wherein the flat-shaped heat pipe is employed as both the heat spreader and the heat sink to improve a thermal performance of the 3D IC.

2. The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe provides an effective thermal conductivity of at least about 5000 W/m·K.

3. The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe has a weight that is at least seven times lighter than a copper heat spreader of the same size.

4. The 3D integrated circuit device of claim 1, wherein the 3D integrated circuit device with the flat-shaped heat pipe is operable at power dissipation levels of at least 300 W without exceeding an operating junction temperature of 373 K.

5. The 3D integrated circuit device of claim 1, wherein the plurality of die is interconnected using a core-concentrated TSV arrangement.

6. The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe reduces average thermal resistance of the 3D integrated circuit device to about 0.0004 K/W or less.

7. The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe is configured to reduce hotspot temperatures for high-power processor applications.

8. The 3D integrated circuit device of claim 1, wherein the 3D integrated circuit device is implemented in a chip-on-chip (CoC) arrangement, a multi-layer 3D IC, a multi-chip package, or a package-on-package configuration.

9. The 3D integrated circuit device of claim 1, wherein:

the plurality of die is interconnected using a core-concentrated TSV arrangement;

the flat-shaped heat pipe is configured to reduce hotspot temperatures for high-power processor applications; and

the 3D integrated circuit device is implemented in a chip-on-chip (CoC) arrangement, a multi-layer 3D IC, a multi-chip package, or a package-on-package configuration.

10. The 3D integrated circuit device of claim 9, wherein the flat-shaped heat pipe reduces average thermal resistance of the 3D integrated circuit device to about 0.0004 K/W or less.

11. The 3D integrated circuit device of claim 9, wherein the 3D integrated circuit device with the flat-shaped heat pipe is operable at power dissipation levels of at least 300 W without exceeding an operating junction temperature of 373 K.

12. The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe is configured to function simultaneously as a heat spreader and a heat sink.

13. The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe comprises a wick structure extending across a flat surface of the heat pipe.

14. A three-dimensional (3D) integrated circuit device, comprising:

a thermal interface material layer configured above or from a substrate;

a plurality of die, a device layer and a micro-bump thermal interface material layer formed above thermal interface material layer, the plurality of die interconnected using a core-concentrated TSV arrangement;

a heat spreader located above the plurality of die, the device layer and the thermal interface material, the heat spreader comprising a flat-shaped heat pipe selected from a rectangular-shaped heat pipe and a disk-shaped heat pipe, the flat-shaped heat pipe configured to reduce hotspot temperatures for high-power processor applications; and

15. The 3D integrated circuit device of claim 14, wherein the 3D integrated circuit device with the flat-shaped heat pipe is operable at power dissipation levels of at least 300 W without exceeding an operating junction temperature of 373 K.

16. The 3D integrated circuit device of claim 14, wherein the flat-shaped heat pipe is configured to function simultaneously as a heat spreader and a heat sink.

17. The 3D integrated circuit device of claim 14, wherein the flat-shaped heat pipe comprises a wick structure extending across a flat surface of the heat pipe.

18. A method of operating a three-dimensional (3D) integrated circuit device, the method comprising:

providing a 3D integrated circuit device comprising: a substrate; a thermal interface material (TIM) layer formed above the substrate; a plurality of die and a device layer stacked above the TIM layer and interconnected by micro-bumps; a heat spreader located above the plurality of die and the device layer, the heat spreader comprising a flat-shaped heat pipe selected from a rectangular-shaped heat pipe and a disk-shaped heat pipe; and a heat sink located above the heat spreader, the heat sink comprising a flat-shaped heat pipe selected from the rectangular-shaped heat pipe and the disk-shaped heat pipe;

providing electrical power to the plurality of die to operate the device layer; and

dissipating heat generated by the plurality of die through the TIM layer, the flat-shaped heat pipe heat spreader, and the flat-shaped heat pipe heat sink, thereby reducing hotspot temperatures in the 3D integrated circuit device.

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Abstract