High speed synchronization of plasma source/bias power delivery

[0001] The present disclosure relates to RF control systems and to a RF control system to improve power delivery to a load.

[0002] The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

[0003] Plasma etching is frequently used in semiconductor fabrication. In plasma etching, ions are accelerated by an electric field to etch exposed surfaces on a substrate. In one basic implementation, the electric field is generated based on Radio Frequency (RF) or Direct Current (DC) power signals generated by a respective RF or DC generator of a power delivery system. The power signals generated by the generator must be precisely controlled to effectively execute plasma etching.

[0004] A radio frequency (RF) generator includes a RF power source. The RF generator also includes a RF power controller coupled to the RF power source. The RF power controller generates a control signal to vary a first RF output from the RF power source to a non-linear load. The RF power controller is configured to control at least one of the first RF output or an actuator in a first predetermined manner over a first predetermined portion of a second RF output applied to the non-linear load. The first predetermined manner includes controlling at least one of a power of the first RF output, a frequency of the first RF output, or a match network actuator associated with the first RF output.

[0005] A RF generator includes a first RF generator having a first power source generating a first RF signal applied to a load. The RF generator also includes a second RF generator, which includes a second power source generating a second RF signal applied to the load and a power controller coupled to the second power source. The power controller is configured to respond to a trigger signal and to generate a control signal to vary at least one of the second RF signal or an actuator, wherein the control signal adjusts an electrical parameter of the second RF signal. The electrical parameter includes at least one of a power of the second RF signal or a frequency of the second RF signal, and the actuator includes a match network actuator associated with the second RF signal.

[0006] A method for generating a RF signal includes coupling a power controller to the RF source, controlling a first RF generator to output a first RF output signal, and generating a control signal. The control signal varies an electrical characteristic of the first RF output signal in accordance with a trigger signal. The trigger signal varies in accordance with a second RF output and indicates predetermined portions of the second RF output. The electrical characteristic includes at least one of a power of the first RF output signal or a frequency of the first RF output signal.

[0007] Further areas of applicability of the present disclosure will become apparent from the detailed description, the claims and the drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the disclosure.

[0028] In the drawings, reference numbers may be reused to identify similar and/or identical elements.

[0029] A power system may include an RF power generator, a matching network, and a load (e.g., a plasma chamber). The power generator generates an RF power signal, which is received by the matching network or impedance optimizing controller or circuit. The matching network or impedance optimizing controller or circuit matches an input impedance of the matching network to a characteristic impedance of a transmission line between the power generator and the matching network. This impedance matching aids in maximizing an amount of power forwarded to the matching network (“forward power”) and minimizing an amount of power reflected back from the matching network to the power generator (“reverse power”). Forward power may be maximized and reverse power may be minimized when the input impedance of the matching network matches the characteristic impedance of the transmission line.

[0030] In a typical RF power generator configuration, output power applied to the load is determined by using sensors that measure the forward and reflected power or the voltage and current of the RF signal applied to the load. Either set of these signals is analyzed to determine the parameters of the power applied to the load. The parameters can include, for example, voltage, current, frequency, and phase. The analysis typically determines a power value which is used to adjust the output of the RF power supply in order to vary the power applied to the load.

[0031] In the RF power source or supply field, there are typically two approaches to applying the RF signal to the load. A first, more traditional approach is to apply a continuous wave signal to the load. In a continuous wave mode, the continuous wave signal is typically a sinusoidal wave that is output continuously by the power source to the load. In the continuous wave approach, the RF signal assumes a sinusoidal output, and the amplitude and/or frequency of the sinusoidal wave can be varied in order to vary the output power applied to the load.

[0032] A second approach to applying the RF signal to the load involves pulsing the RF signal, rather than applying a continuous wave signal to the load. In a pulse mode of operation, a RF sinusoidal signal is modulated by a modulation signal in order to define an envelope for the modulated sinusoidal signal. In a conventional pulse modulation scheme, the RF sinusoidal signal typically is output at a constant frequency and amplitude. Power delivered to the load is varied by varying the modulation signal, rather than varying the sinusoidal, RF signal.

[0033] In a typical RF power supply configuration, output power applied to the load is determined using sensors that measure the forward and reflected power or the voltage and current of the RF signal applied to the load. Either set of these signals is analyzed in a control loop. The analysis determines a power value which is used to adjust the output of the RF power supply in order to vary the power applied to the load. In a RF power delivery system, where the load is a plasma chamber, the varying impedance of the load causes a corresponding varying power applied to the load, as applied power is in part a function of the impedance of the load.

[0034] In plasma systems, power is typically delivered in one of two configurations. In a first configuration, the power is capacitively coupled to the plasma chamber. Such systems are referred to as capacitively coupled plasma (CCP) systems. In a second configuration, the power is inductively coupled to the plasma chamber. Such systems are typically referred to as inductively coupled plasma (ICP) systems. Plasma delivery systems typically include a bias and a source that apply respective bias power and a source power applied to one or a plurality of electrodes. The source power typically generates a plasma within the plasma chamber, and the bias power tunes the plasma to an energy relative to the bias RF power supply. The bias and the source may share the same electrode or may use separate electrodes, in accordance with various design considerations.

[0035] When a RF power delivery system drives a load in the form of a plasma chamber, the electric field generated by the power delivered to the plasma chamber results in ion energy within the chamber. One characteristic measure of ion energy is the ion energy distribution function (IEDF). The ion energy distribution function (IEDF) can be controlled with a RF waveform. One way of controlling the IEDF for a system in which multiple RF power signals are applied to the load occurs by varying multiple RF signals that are related by frequency and phase. The frequencies between the multiple RF power signals are locked, and the relative phase between the multiple RF signals is also locked. Examples of such systems can be found with reference to U.S. Pat. Nos. 7,602,127; 8,110,991; and 8,395,322; assigned to the assignee of the present invention and incorporated by reference herein.

[0036] RF plasma processing systems include components for plasma generation and control. One such component is referred to as a plasma chamber or reactor. A typical plasma chamber or reactor utilized in RF plasma processing systems, such as by way of example, for thin-film manufacturing, utilizes a dual frequency system. One frequency (the source) of the dual frequency system is typically a high frequency and controls the generation of the plasma, and the other frequency (the bias) of the dual frequency system is typically a low frequency and controls ion energy. Examples of dual frequency systems include systems that are described in U.S. Pat. Nos. 7,602,127; 8,110,991; and 8,395,322; referenced above. The dual frequency system described in the above-referenced patents requires a closed-loop control system to adapt RF power supply operation for the purpose of controlling ion density and its corresponding ion energy distribution function (IEDF).

[0037] By way of one non-limiting example, reactive-ion etching (RIE) is an etching technology used in microfabrication. RIE is typically characterized as dry etching. RIE uses a chemically reactive plasma to remove material deposited on wafers. The plasma is generated under low pressure (vacuum) by an electromagnetic field. High-energy ions from the plasma bombard the wafer surface and react with it to affect the etching process. In one example of a RIE system, a high frequency source RF power generator (for example, 13 MHz-100 MHz) creates a plasma, and a lower frequency bias RF generator (100 kHz-13 MHz) accelerates positive ions from the plasma to the substrate surface to control ion energy and etch anisotropy. In this example dual frequency drive system, the low frequency bias source introduces fluctuations in both the power and load impedance and into source RF generator.

[0038] One approach responsive to fluctuations in both the power and load impedance introduced into the source RF generator utilizes multiple source and bias generators to improve control of the plasma. In such a configuration, the plasma consists of a generally neutrally charged bulk region and a sheath region that oscillates near the surfaces of the vacuum chamber and substrate. The thickness of the sheath determines a significant portion of the plasma capacitance and is most affected by the low frequency bias power supply. The higher frequency source generator can be adversely affected by the sheath capacitance variation, resulting in large impedance and reflected power fluctuations. These fluctuations are usually too fast to be measured by present sensors and metrology systems.

[0039] As a result of the bias-induced capacitance fluctuations, little or no RF source power is delivered to the plasma when the reflected power is high. Conventional techniques address this limitation by increasing the power level of the source RF generator. Such a response carries with it significant control complexities and additional capital and operating costs. For example, when a RF source operates at an increased power, increased electrical stresses and a greater numbers of parts required to supply the higher power result in lower reliability of the RF generator. Further yet, such an approach impedes process reliability, as process repeatability and chamber matching are adversely affected because of parameters that cannot be reliably controlled, such as chamber RF parasitic impedances and RF amplifier component tolerances.

[0040] Multiple approaches exist for controlling a plasma chamber for generating plasmas. For example, phase and frequency of the driving RF signals may be used to control plasma generation. For RF driven plasma sources, the periodic waveform affecting plasma sheath dynamics and the corresponding ion energy is generally known and the frequency of the periodic waveforms and the associated phase interaction. Another approach involves dual frequency operation. That is, two RF frequency sources are used to power a plasma chamber to provide substantially independent control of ion and electron densities.

[0041] Another approach utilizes wideband RF power sources to drive a plasma chamber, but includes certain challenges. One challenge is coupling the power to the electrode. A second challenge is that the transfer function of the generated waveform to the actual sheath voltage for a desired IEDF must be formulated for a wide-process space to support material surface interaction. In one other approach, in an inductively coupled plasma, controlling power applied to a source electrode controls the plasma density while controlling power applied to the bias electrode controls the IEDF to provide etch rate control. By using source electrode and bias electrode control, the etch rate is controlled via the ion density and energy.

[0042] FIG. 1 depicts a RF generator or power supply system 10. Power supply system 10 includes a pair of radio frequency (RF) generators or power supplies 12a, 12b, matching networks 18a, 18b, and load, such as a non-linear load or plasma chamber 32. In various embodiments, RF generator 12a is referred to as a source RF generator or power supply, and matching network 18a is referred to as a source matching network. Also in various embodiments, RF generator 12b is referred to as a bias RF generator or power supply, and matching network 18b is referred to as a bias matching network.

[0043] Bias RF generator 12b generates a control signal 30 or 30′ input to source RF generator 12a. As will be explained in greater detail, control signal 30 or 30′ represents an input signal to power supply 12a that indicates one or more operating characteristics or parameters of bias RF generator 12b. A synchronization detector 34 senses the RF signal output from matching network 18b to load 32 and outputs a synchronization or trigger signal 30 to power supply 12a. In various embodiments, a synchronization or trigger signal 30′ may be output from power supply 12b to power supply 12a, rather than trigger signal 30. A difference between trigger or synchronization signals 30, 30′ is the effect of matching network 18b, which can change the phase between the input and output signals to matching network 18b. Signals 30, 30′ include information about the operation of bias RF generator 12b that enables predictive responsiveness to address periodic fluctuations in the impedance of plasma chamber 32 caused by the bias generator 12b. When control signals 30 or 30′ are absent, RF generators 12a, 12b operate autonomously.

[0044] RF generators 12a, 12b include respective RF power sources or amplifiers 14a, 14b, RF sensors 16a, 16b, and processors, controllers, or control modules 20a, 20b. RF power sources 14a, 14b generate respective RF power signals 22a, 22b output to respective sensors 16a, 16b. Sensors 16a, 16b receive the output of RF power sources 14a, 14b and generate respective RF power signals or RF power signals f₁ and f₂. Sensors 16a, 16b also output signals that vary in accordance with various parameters sensed from load 32. While sensors 16a, 16b, are shown within respective RF generators 12a, 12b, RF sensors 16a, 16b can be located externally to the RF power generators 12a, 12b. Such external sensing can occur at the output of the RF generator, at the input of an impedance matching device located between the RF generator and the plasma chamber, or between the output of the impedance matching device (including within the impedance matching device) and the plasma chamber.

[0045] Sensors 16a, 16b detect operating parameters of plasma chamber 32 and output signals X and Y. Sensors 16a, 16b may include voltage, current, and/or directional coupler sensors. Sensors 16a, 16b may detect (i) voltage V and current I and/or (ii) forward power P_FWD output from respective power amplifiers 14a, 14b and/or RF generators 12a, 12b and reverse or reflected power P_REV received from respective matching network 18a, 18b or load 32 connected to respective sensors 16a, 16b. The voltage V, current I, forward power P_FWD, and reverse power P_REV may be scaled and/or filtered versions of the actual voltage, current, forward power, and reverse power associated with the respective power sources 14a, 14b. Sensors 16a, 16b may be analog and/or digital sensors. In a digital implementation, the sensors 16a, 16b may include analog-to-digital (A/D) converters and signal sampling components with corresponding sampling rates. Signals X and Y can represent any of the voltage V and current I or forward (or source) power P_FWD reverse (or reflected) power P_REV.

[0046] Sensors 16a, 16b generate sensor signals X, Y, which are received by respective controllers or power control modules 20a, 20b. Power control modules 20a, 20b process the respective X, Y signals 24a, 26a and 24b, 26b and generate one or a plurality of feedback control signals 28a, 28b to respective power sources 14a, 14b. Power sources 14a, 14b adjust the RF power signals 22a, 22b based on the received feedback control signal. Power control modules 20a, 20b may include, at least, proportional integral derivative (PID) controllers or subsets thereof and/or direct digital synthesis (DDS) component(s) and/or any of the various components described below in connection with the modules. In various embodiments, power control modules 20a, 20b are PID controllers or subsets thereof and may include functions, processes, processors, or submodules. Feedback control signals 28a, 28b may be drive signals and may include DC offset or rail voltage, voltage or current magnitude, frequency, and phase components. In various embodiments, feedback control signals 28a, 28b can be used as inputs to one or multiple control loops. In various embodiments, the multiple control loops can include a proportional-integral-derivative (PID) control loop for RF drive, and for rail voltage. In various embodiments, feedback control signals 28a, 28b can be used in a Multiple Input Multiple Output (MIMO) control scheme. An example of a MIMO control scheme can be found with reference to U.S. application Ser. No. 15/974,947, filed May 9, 2018, entitled Pulsed Bidirectional Radio Frequency Source/Load and assigned to the assignee of the present application, and incorporated by reference herein.

[0047] In various embodiments, power supply system 10 can include controller 20′. Controller 20′ may be disposed externally to either or both of RF generators 12a, 12b and may be referred to as external or common controller 20′. In various embodiments, controller 20′ may implement one or a plurality of functions, processes, or algorithms described herein with respect to one or both of controllers 20a, 20b. Accordingly, controller 20′ communicates with respective RF generators 12a, 12b via a pair of respective links 31, 33 which enable exchange of data and control signals, as appropriate, between controller 20′ and RF generators 12a, 12b. For the various embodiments, controllers 20a, 20b, 20′ can cooperatively provide analysis and control along with RF generators 12a, 12b. In various other embodiments, controller 20′ can provide control of RF generators 12a, 12b, eliminating the need for the respective local controllers 20a, 20b.

[0048] In various embodiments, RF power source 14a, sensor 16a, controller 20a, and match network 18a can be referred to as source RF power source 14a, source sensor 16a, source controller 20a, and source matching network 18a. Similarly in various embodiments, RF power source 14b, sensor 16b, controller 20b, and match network 18b can be referred to as bias RF power source 14b, bias sensor 16b, bias controller 20b, and bias matching network 18b. In various embodiments and as described above, the source term refers to the RF generator that generates the plasma, and the bias term refers to the RF generator that tunes the plasma Ion Energy Distribution Function (IEDF) relative to the bias RF power supply. In various embodiments, the source and bias RF power supplies operate at different frequencies. In various embodiments, the source RF power supply operates at a higher frequency than the bias RF power supply.

[0049] In various embodiments, source controller 20a adjusts the frequency of RF signal f₁ to compensate for impedance fluctuations resulting from the application of RF signal f₂ to plasma chamber 32. In various embodiments, RF signal f₂ is a frequency lower than the frequency of RF signal f₁. The lower frequency causes periodic impedance fluctuations in plasma chamber 32, which appear as reflected intermodulation distortion (IMD). In various embodiments, and as will be described in greater detail herein, adjusting the timing of application of RF signal f₁, the source signal, in relation to RF signal f₂, the bias signal, enables an increase of delivered power at predetermined, desired portions of the RF signal f₂. As will further be described herein, the adjusting the power output of RF signal f₁ can include synchronizing power delivery of f₁ relative to f₂, increasing power at predetermined portions of RF signal f₂, decreasing or cutting off power of source RF signal f₁ at predetermined portions of bias RF signal f₂, or a combination thereof. In various embodiments, using the periodic nature of both RF signals f₁ and f₂, frequency offsets or hops can be added to RF signal f₁ to compensate for anticipated impedance fluctuations introduced by RF signal f₂. The power timing, power amplitude, and frequency offsets can be predetermined and stored in one or multiple lookup tables, or may be determined dynamically

[0050] FIGS. 2-6 illustrate operation of FIG. 1 when controlled in a conventional manner. For example, in a conventional control approach, FIG. 1 may omit sync detector 34 and trigger or synchronization signals 30, 30′. In various conventional control approaches, power supplies 12a, 12b operate generally independently and output respective RF signals f₁, f₂ to load 32.

[0051] FIG. 2 depicts waveforms of voltage versus time for a bias RF power supply, such as power supply 12b, a source RF power supply, such as power supply 12a, and power delivered to load 32 via source power supply 12a. As can be seen in FIG. 2, waveform 50 indicates the output from bias power supply 12b applied to load 32. In various embodiments, waveform 50 represents the waveform output by matching network 18b and applied to load 32. That is, matching network 18b can impact the waveform shape of RF signal f₂ input to matching network 18b.

[0052] FIG. 2 also depicts respective forward voltage waveforms V_f 52 and reverse voltage waveform V_r 54. With respect to forward voltage waveform 52 and reverse voltage waveform 54, since source RF power supply 12a operates at a significantly higher frequency than bias RF power supply 12b, voltage waveforms 52, 54 appear as envelopes because of the selected time scale of the x-axis for the waveforms of FIG. 2. Waveform 58 indicates the power delivered to load 32 by source RF power supply 12a, which is a net power resulting from application of V_f and V_r. Rectangles 56, two of which are shown in FIG. 2, indicate sections of peak delivered power P_DEL of waveform 58. As can be seen, maximum power delivered P_DEL appears within rectangles 56. Rectangles 56 thus indicate that maximum source power is delivered near the zero-crossings of bias waveform 50 of FIG. 2.

[0053] The waveforms of FIG. 2 are exemplary for a typical capacitive discharge system used to etch high aspect ratio (HAR) features for three-dimensional NAND/memory, dynamic random access memory (DRAM), or similar structures. The waveforms of FIG. 2 are representative of a system of narrowband power detectors that filter out reflected intermodulation distortion (IMD) products. The source amplifier is typically tuned via frequency and matching network capacitance to achieve a best average impedance, disregarding dynamic behavior of the plasma impedance. Examples of such a narrowband detector can be found with reference to U.S. Pat. No. 6,707,255, assigned to the assignee of the present invention and incorporated by reference herein.

[0054] Waveform 60 of FIG. 3 indicates the reflected power spectrum for a conventional standard tuning. Waveform 60 of FIG. 3 represents a plot of reflected power versus frequency of the source RF generator 12a and includes several peaks 62, which indicate intermodulation distortion (IMD). In a conventional tuning using narrowband power detectors, however, IMD is filtered out since it is outside the bandwidth of the narrowband detector and thus matching networks or frequency tuning controllers do not recognize the IMD. In FIG. 3, the amplitude of the reflected power at the center frequency (60 mHz) is relatively low, as indicated at 64 since the matching network controller and frequency tuning controller of the generator are optimizing power delivery only at the fundamental. That is, conventional narrowband detector systems can mask the presence of the reflected power.

[0055] FIG. 4 represents a Smith chart representation of the source generator load impedance in the system of FIG. 2 measured using a wideband detector. The plot 68 in FIG. 4 represents the impedance measured at the output of source RF generator 12a when, for example, operating at 60 mHz, while bias RF generator 12b operates at 400 kHz. The plot 68 is the periodic impedance seen over one cycle of 2.5 microseconds. FIG. 5, on the other hand, represents the impedance measured at the source of RF generator 12a when utilizing a narrowband detector that filters out IMD. As can be seen, the measured impedance appears as a single point 70 appearing at the center of the Smith chart of FIG. 5.

[0056] FIG. 6 conveys similar information as in FIG. 2, but shows waveforms representative of forward source power P_FWD 80, reverse source power P_REV 82, and bias voltage V_BIAS 84. As shown by rectangle 86, delivered power appears at a maximum where the forward power waveform 80 is at a maximum within rectangles 86, reverse power P_REV is at a minimum of waveform 82 in rectangle 86. Referring to waveform 84, the maximum power delivered thus appears at zero-crossings of the bias voltage waveform V_BIAS using P_FWD is as a maximum and P_REV is at a minimum.

[0057] In view of the foregoing observations, it is desirable to maximize power delivered by the source and minimize power reflected to the source. Accordingly when high speed plasma dynamics are considered (that is, plasma dynamics that cannot easily be measured) it is beneficial to selectively tune the source RF delivery system to deliver power during specific portions of the bias RF signal f₂. The source RF power f₁ is primarily used to impart energy to electrons, which in turn disassociate the feed gas into a mix of radicals and ions. The ions, because they are charged particles, can be accelerated by the lower frequency bias voltage f₂ to effect physical and chemical changes at the substrate surface. Thus, it may be desirable to deliver high source power when the bias voltage is highly negative and reduce the source power at other times.

[0058] FIG. 7 depicts an expanded block diagram of FIG. 1 in which controller 20a includes an amplitude control section 36 and a frequency control section 38. Amplitude control section 36 includes a playback module 40, a power adjustment module 42, and an update module 44. Frequency control section 38 includes a playback module 46, a frequency offset module 48, and an update module 49. Each module 40, 42, 44 or 46, 48, 49 can be implemented collectively or individually as a process, a processor, a module, or a submodule. Further, each module 40, 42, 44 or 46, 48, 49 can be implemented as any of the various components described below in connection with the term module. Playback modules 40, 46 monitor for a triggering event or signal with which to synchronize the application of respective power, power adjustments, or frequency offsets to RF signal f₁. Once playback modules 40, 46 detect a triggering event or signal, playback modules 40, 46, respectively, initiate the addition of respective power and frequency offsets to RF signal f₁. Playback modules 40, 46 cooperate with respective power adjustment module 42 and frequency offset module 48. Power adjustment module 42 and frequency offset module 48 provide respective power and frequency adjustments to respective update modules 44, 49, which coordinate the application of respective power adjustment and frequency offset to RF signal f₁.

[0059] In various embodiments, power adjust module 42 and frequency offset module 48 may be implemented as respective lookup tables (LUTs). The respective power adjustments (both timing and amplitude) and frequency adjustments (offset or hops) are determined in accordance with, for example, a timing or synchronization relative to a triggering event or signal. Given the periodic nature of bias RF signal f₂ and the expected periodic impedance fluctuations that occur in response to application of RF signal f₂ to load 32, a LUT of the adjustments or offsets for RF signal f₁ can be determined. The power adjustments or frequency offsets or hops added to RF signal f₁ are generated to align with the dynamic impact on load 32 introduced by RF generator 12b and one or both improves the efficiency of operation of load 32 through selective and coordinated power deciphered by RF source generator 12a and at least partially cancels the bias RF interference, thereby reducing impedance fluctuations. In various embodiments, the LUT can be statically determined by experimentation, or automatically adjusted with an update process, such as with update modules 44, 49. In various other embodiments, the power adjustments and frequency adjustments can be determined dynamically.

[0060] FIG. 8 depicts waveforms similar to FIG. 2, but with the source generator 12a controlled with respect to operation of the bias generator 12b. As can be seen and will be explained in greater detail with respect to FIGS. 8-12, power delivery can be controlled by synchronization or timing of power, amplitude, or both, applied by source RF generator 12a relative to bias RF generator 12b. In FIG. 8, waveform 100 represents the bias voltage V_BIAS applied to load 32. Waveform 100 is similar in shape to waveform 50 of FIG. 2. Waveforms 102 and 104 represent the respective forward source voltage V_f and reverse source voltage V_r. By way of comparison, the forward source voltages V_f and reverse voltages V_r of FIGS. 2 and 8 operate at the same frequency. However, the source match is adjusted such that the reflected voltage 104 is minimized with respect to the bias voltage V_BIAS waveform 100, as shown at segment 110, yielding an increased delivered power P_DEL shown at waveform 106. Rectangles or regions 108 indicate a maximum source power P_DEL delivered to load 32. As can be seen at rectangles 108, the maximum delivered power P_DEL occurs during the negative half cycles of V_BIAS 100, as indicated at 110.

[0061] FIG. 9 depicts a plot of reflected power spectrum plotted with respect to frequency. Waveform 120 includes a number of peaks, including peaks 122 indicating IMD. FIG. 9 also includes a peak 124 at approximately 60 MHz, which is the frequency of the source power supply 12a. By way of comparison to FIG. 3, in FIG. 3, no peak appears at 60 mHz, such as peak 64 in FIG. 3. A source delivery system according to a conventional approach attempts to minimize reflected power at the 60 MHz center frequency and thus would be unable to maximize power at the negative peak 110 (of FIG. 8) of the bias waveform. By synchronizing the application of source power at the impedance detector with the bias waveform V_BIAS, the source match settings and source frequency can be adjusted to maximize delivered source power in the desired time region 110 of the bias waveform. Thus, by synchronizing the source voltage waveform to the bias voltage waveform, peak power can be achieved at arbitrary locations relative to the bias waveform. This additional control may be used to manipulate the plasma properties to improve etch rate, selectivity, etc. Controlling for maximum power delivery at the negative peak of the bias is one embodiment. Various other embodiments include maximizing power delivery near the positive peak or any other desirable location, including varying the width of regions 108.

[0062] From FIG. 9, the presence of IMD in the detected signal can enable a more complete assessment of the overall reflected power. Accordingly, sensors 16a, 16b may be implemented using wideband detectors, thereby enabling detection of IMD products. Processing of wideband detector signals may be accomplished with reference to U.S. patent application Ser. No. 15/876,189, filed Jan. 21, 2018, entitled Adaptive Counter Measure Control Thwarting IMD Jamming Impairments for RF Plasma Systems, assigned to the assignee of the present application, and incorporated by reference herein.

[0063] FIGS. 10 and 11 depict Smith charts for respective wideband detector impedance and narrowband detector impedance at source RF generator 12a. As can be seen in FIG. 10, the plot 68 from FIG. 4 has been rotated as shown at plot 130 in FIG. 10. The rotation indicates a minimized impedance for selected portions of the plot 130 near the center of the Smith chart. The rotation and position of plot 130 of FIG. 10 provides guidance as to during what position of V_BIAS, V_f should be applied, that is, where an improved impedance match occurs. The portion of plot 130 near the center of the Smith chart corresponds to the negative half cycle of V_BIAS. FIG. 11 depicts the impedance 132 as detected with a narrowband detector. Thus, implementing the control approach described with respect to FIG. 8 shifts the plot 70 from FIG. 5 for the narrowband detector impedance to 132 of FIG. 11.

[0064] FIG. 12 depicts a view similar to FIG. 6. In FIG. 12, waveform 140 indicates the bias voltage V_BIAS output by bias RF generator 12b. Waveform 142 indicates the forward power P_FWD output by source RF generator 12a, and waveform 144 represents the reverse power at RF source generator 12a. Rectangle 146 indicates that for a negative half cycle of V_BIAS, maximum forward power is delivered, as shown at waveform 142, and minimum reverse power occurs within rectangle 146, as shown at waveform 144.

[0065] FIGS. 13-16 indicate yet a further approach to controlling RF source generator 12a relative to RF bias generator 12b. In the approach of FIGS. 13-16, source RF generator 12a can be operated in a blanking or amplitude modulation mode in which different source voltages V_f are applied during different portions of the bias voltage V_BIAS. FIG. 13 depicts a voltage V_BIAS 150, a source forward voltage V_f 152, a source reverse voltage V_r 154, and a delivered power V_PDEL 156. In FIG. 13, rectangle 158 indicates a predetermined region, such as a negative half cycle of V_BIAS 150, during which RF source generator 12a is activated to output voltage V_f. FIG. 13 depicts two such half cycles during which source RF generator 12a is activated to output a forward voltage V_f. Source forward voltage V_f is synchronized to V_BIAS, thereby reducing the reverse voltage V_r within rectangle 158. During periods other than during the predetermined portions of bias voltage V_BIAS, such as half cycles of V_BIAS, the source forward voltage V_f is reduced or turned off (blanked), as shown at portions 152a, 152b, 152c, reducing the source power applied over the corresponding regions V_BIAS cycle. While the forward voltage V_f is shown as turned off during portions 152a, 152b, 152c, other modulation envelopes can be used other than a complete on or off approach. Such modulation envelopes can include trapezoidal, Gaussian, and sinusoidal. One benefit of the significant power reduction can be seen with respect to the reverse voltage V_r 154 during portions 152a, 152b, 152c. As can be seen, the reverse voltage V_r is minimized during this period. Minimization of the reverse voltage can reduce stress on the source generator in addition to facility power and cooling load reduction while maintaining processing power for periods where maximum source power is beneficial for thin film processing.

[0066] FIG. 14 depicts a representation of FIG. 13 from a power perspective of the source RF power supply 12a. As shown in FIG. 14, V_BIAS waveform 160 represents the bias voltage applied to load 32. The forward power waveform P_FWD 162 represents the forward power applied to load 32 by source RF power supply 12a, and source reverse power P_REV waveform 164 indicates the reverse power detected at source RF power supply 12a. As can be seen, during the negative path cycle of V_BIAS 160, the forward power P_FWD is maximized and the reverse power P_REV is thus minimized.

[0067] In various embodiments, in addition to synchronization and power control, the impedance match between RF source generator 12a and load 32 can be dynamically adjusted in order to reduce reflected power during transitions of the bias waveform. Such dynamic matching can occur by varying the source generator frequency, such as by using automatic frequency tuning or varying a reactance within match network 18a.

[0068] FIGS. 15-16 depict waveforms for a system in which the source RF generator 12a and bias RF generator 12b are operated using power synchronization, power modulation, and frequency tuning. In FIG. 15, waveform 170 represents the bias voltage V_BIAS applied to load 32. Waveform 172 represents the source forward voltage V_f applied to load 32, and waveform 174 represents the reflected voltage V_r returned to source RF generator 12a from load 32. The source forward voltage V_f is controlled with respect to a predetermined portion of the V_BIAS waveform, such as the negative half wave of the bias voltage V_BIAS. Waveform 172 also indicates power modulation of the source forward voltage V_f, such as blanking described above, during portions 172a, 172b, and 172c of forward voltage waveform V_f 172. Waveform 174 indicates the source reverse voltage V_r when controlling the source RF generator with respect to the bias RF generator as described above. The voltage delivered V_PDEL waveform 178 indicates the voltage delivered to load 32.

[0069] FIG. 15 also depicts a modulation signal V_fmod 176 which modulates the V_f waveform output from source RF generator 12a. Modulation signal V_fmod 176 introduces a frequency offset or hop to the output of source RF generator 12a, where the frequency offset effects frequency tuning to improve the impedance match. One benefit of the application of modulation signal V_fmod 176 is improved delivered voltage as shown at V_PDEL 178. With reference to voltage waveform V_PDEL 156 of FIG. 13, it can be seen that a higher, sustained V_PDEL 178 is achieved in FIG. 15. A further discussion of applying a frequency offset of hop can be found with reference to U.S. Pat. No. 9,947,514, issued Apr. 17, 2018, assigned to the assignee of the present application, and incorporated by reference herein.

[0070] FIG. 16 depicts a representation of FIG. 15 described from a delivered power perspective. FIG. 16 includes a bias voltage waveform V_BIAS 180 a source forward power P_FWD waveform 182, and source reverse power P_REV 184. As can be seen in FIG. 16, the reverse power waveform P_REV 184 is minimized, while the forward power P_FWD 182 is maximized during the negative portion of the bias voltage waveform V_BIAS 180.

[0071] FIG. 17 depicts a block diagram similar to FIG. 7, and like reference numerals used in FIGS. 1 and 7 will be used to describe similar components in FIG. 17. Such similar components will not be described herein. FIG. 17 includes a variable actuator or reactance 35, which may be implemented as a variable capacitance or a variable inductance. Variable reactance 35 of matching network 18a may be varied by a control signal 37 generated by controller 20a of source RF generator 12a.

[0072] While FIGS. 15 and 16 describe a frequency offset or hopping method in which a frequency offset is added to the source forward voltage V_f, in various embodiments, dynamic tuning can be achieved by adjusting variable reactance 35 of matching network 18a in accordance with a control signal 37 generated by controller 20a. Thus, in various embodiments, controller 20a, rather than generating a frequency offset or hop for automatic frequency tuning, generates a command signal 37 to adjust variable actuator or reactance element 35 of matching network 18a. Thus, a result similar to that provided by the automatic frequency tuning described with respect to FIGS. 15 and 16 can be achieved by dynamically adjusting the variable reactance 35 of match network 18a.

[0073] FIG. 18 shows a control module 200. Control module 200 incorporates various components of FIGS. 1, 7, and 17. Control module 200 may include amplitude control module 202, frequency control module 204, and impedance match module 206. Amplitude control module 202 may include submodules, including playback module 208, amplitude adjustment module 210, and amplitude update module 212. Frequency control module 204 may include submodules, including playback module 218, frequency adjustment module 220, and frequency update module 222. In various embodiments, control module 200 includes one or a plurality of processors that execute code associated with the modules 202, 204, 206, 208, 210, 212, 218, 220, and 222. Operation of the modules 202, 204, 206, 208, 210, 212, 218, 220, and 222 is described below with respect to the method of FIG. 19-20.

[0074] For further defined structure of controller 20a of FIGS. 1, 7, and 17, see the below provided method of FIGS. 19-20 and the below provided definition for the term “module”. The systems disclosed herein may be operated using numerous methods, an example control system method of which is illustrated in FIGS. 19-20. Although the following operations are primarily described with respect to the implementations of FIGS. 1, 7, and 17, the operations may be easily modified to apply to other implementations of the present disclosure. The operations may be iteratively performed. Although the following operations are shown and primarily described as being performed sequentially, one or more of the following operations may be performed while one or more of the other operations are being performed.

[0075] FIG. 19 depicts a flow diagram of the RF source generator or control method 230 described in the present disclosure. Control begins at block 232 in which various parameters are initialized. Control proceeds to block 234 which monitors for a trigger event from a first power supply or RF generator, such as bias generator output signal f₂ or V_BIAS. As will be described in greater detail herein, a trigger event can be any event which allows suitable application of adjustments to electrical parameters of a second power supply or RF generator, such as source RF signal f₁ output by RF generator 12a. Block 234 continues to monitor whether a trigger event has occurred and loops back in a wait state until such an event has occurred. Upon detection of a trigger event, control proceeds to block 236, which adjusts the output of the second RF generator based on the triggering event. In block 236, control proceeds to block 238, which determines at least one characteristic of the output of the first power supply. Such a characteristic could be, by way of non-limiting example, peak detection, zero cross detection, phase detection, peak power detection, minimum power detection, or others, either measured via sensors or output by a control module. From block 238, control proceeds to one or more of blocks 240, 242, and 244.

[0076] At block 240, the controller synchronizes the output power of the second power supply based on one or more characteristics of the output of the first power supply. The synchronization can include, for example, when to initiate the RF output of the second power supply, with respect to the output of the first power supply. In various embodiments, by way of non-limiting example, the synchronization can occur with respect to a predetermined portion of the output of the first power supply, such as negative half wave of the first RF power supply. In various embodiments, however, synchronization can be with respect to other, predetermined portions of the first RF power supply waveform.

[0077] At block 242, the output power levels (amplitude) are controlled. In various configurations, the power output of the second RF generator or power supply is controlled by amplitude control module 202 of FIG. 18. Such power control can include modulating the source RF output to a lower level or blanking the source RF output. In other embodiments, controlling output power to a second power supply can include, by way of non-limiting example, increasing the output power (amplitude) in accordance with predetermined portions of the RF waveform of the first power supply.

[0078] Block 244 is implemented by impedance match module 206 and adjusts the impedance match between the second power supply and the load using one of frequency offset or hopping or controlling an actuator or variable reactance 35 in matching network 18a, both of which are described above. In various embodiments, block 244 may be implemented via frequency control module 204 of FIG. 18 when applying a frequency offset or hop. In various other embodiments, block 244 may be implemented in impedance match module 206 when implementing match control.

[0079] In various embodiments, block 240 is implemented via amplitude control module 202 of FIG. 18. However, in various embodiments, the functions of any of blocks 240, 242, 244 can be segregated into a particular one of amplitude control module 202, frequency control module 204, or impedance match module 206. In various other embodiments, the implementation of blocks 240, 242, 244 can be shared between amplitude control module 202, frequency control module 204, and impedance match module 206.

[0080] FIG. 20 depicts an expanded block diagram of various embodiments for controlling selected parameters of operation of RF source module 12a, where such parameters can include, but are not limited to, the frequency, power (amplitude), phase, frequency offset/hopping, or variable reactance control. The flow diagram of the electrical parameter control method 250 is initiated at block 252.

[0081] Once playback is initiated, control proceeds to blocks 254. At blocks 254, electrical parameter adjustments are applied relative to the trigger event. The adjustments are in various embodiments determined in accordance with an expected impedance fluctuation referenced to an event, such as sequencing of an RF signal output from bias RF generator 12b. Once the trigger signal is received, playback commences at block 256. Control then proceeds to block 258, which determines the adjustment to the electrical control parameter. Once the electrical control parameter adjustment is determined, typically in relation to the trigger event, control proceeds to block 260 which applies the adjustment to the RF signal output from RF generator 12a. Control proceeds to block 262 which determines if the playback sequence has completed. That is, at decision block 262, if the playback sequence is completed, control proceeds to monitor for a next trigger event, such as at decision block 234 of FIG. 19, where monitoring for a trigger event continues. If the playback sequence is not completed, control proceeds to block 258 where the electrical parameter adjustment is determined.

[0082] Also shown in FIG. 20 are blocks 270 for updating the electrical parameter adjustments of block 258. Blocks 270 may be implemented by respective update modules 44, 49 of controller 20a. In blocks 270, control commences at block 272 which determines whether an electrical characteristic, either sensed or otherwise determined, such as impedance, forward power or voltage, or reverse power or voltage, or phase, at a selected phase relative to, for example, the trigger event. Control proceeds to decision block 274 which determines whether the electrical characteristic is acceptable. That is, at decision block 274, the measured characteristic is compared to a threshold to determine if the electrical characteristic is acceptable or within a threshold for a given parameter adjustment. If the electrical characteristic is acceptable, control proceeds back to block 272. If the electrical characteristic is outside a predetermined range or threshold, control proceeds to block 276 which updates the electrical parameter adjustment at the selected phase in order to improve the value of the electrical characteristic. Once the electrical parameter adjustment at the selected phase is determined, control proceeds to block 278 which proceeds to insert the updated frequency offset into block 258 which determines the frequency offset.

[0083] In various embodiments, the trigger event, such as discussed with respect to block 254, is intended to synchronize source RF generator 12a with bias RF generator 12b so that electrical parameter adjustments can be appropriately applied relative to the bias RF signal, thereby effecting a desired change in the electrical characteristic. Synchronization between RF generators 12a, 12b can occur using control signal 30, 30′, 31, or 33 which may provide a synchronization pulse or may replicate the RF signal output from RF generator 12b. In various other embodiments, synchronization with RF generator 12b can occur without a direct connection such as control signal 30 or other direct connection between RF generators 12a, 12b.

[0084] Synchronization without a direct connection can be achieved by analyzing the measured characteristics and phase-locking to a signal indicating the measured characteristics. For example, by analyzing signals X, Y output from sensor 16a, a signal indicating the measured characteristics can be generated. This signal can provide the appropriate trigger event. A signal indicating impedance fluctuation can be developed by performing a Fast Fourier transform (FFT) on the impedance fluctuation. In this configuration, the source RF generator 12a can effectively work as a standalone unit without connection to bias RF generator 12b.

[0085] The trigger events described in the various embodiments above are typically related to a periodicity of the trigger event. For example, the control signal received from bias RF generator 12b output control signal 30, 30′ may repeat periodically in accordance with the RF signal output from RF generator 12b. Similarly, the above-discussed signal indicating an impedance fluctuation may also have a periodicity to it. Other triggering events need not be periodic. In various embodiments, a triggering event can be a non-periodic, asynchronous event, such as an arc detected within plasma chamber 32. In various other embodiments, a triggering event can be associated with control loop times of source RF generator 12a, referred to as the power control loop. When the trigger event is associated with the power control loop of source RF generator 12a, a signal that is typically much slower than the digital control loop for RF generator 12a pulses provides a triggering event.

[0086] In various embodiments, adjustment modules 42, 48 and corresponding block 258, in which the parameter adjustment is determined, can be implemented in a lookup table (LUT). The LUT can be statically determined by obtaining empirical data relating to the measured characteristics relative to the bias RF signal output from RF generator 12b and applied to load 32. When the LUT is determined statically, flow diagram 720 of FIG. 20 may not be applicable. In other in various embodiments, LUT can be determined dynamically as described with respect to blocks 270. One example of dynamically updating the electrical parameter adjustments includes automatic frequency tuning to determine a specific portion or bin of the frequency offset. The reflected power for that bin may be examined, such as using sensor 16a, and corrected. This correction provides the frequency offset for the selected bin.

[0087] In various embodiments, the electrical parameter adjustments can be applied in equal increments relative to the RF signal output by bias RF generator 12b, providing a consistent resolution over the range of electrical parameter adjustments. In various other embodiments, the resolution of the electrical parameter adjustments can vary. That is, the electrical parameter adjustments can be variably spaced in time so that more offsets may be applied for a given duration of the bias RF output signal, and fewer offsets may be applied for the same duration in a different portion of the bias RF output signal. The state-based approach herein thus increases resolution of the electrical parameter adjustments where necessary, such as when the electrical characteristic is more unstable for a given period, and decreases resolution of the electrical parameter adjustments where appropriate, such as where the measured electrical characteristic is more stable for a given period. A state-based approach can provide a more efficient implementation by reducing computational or processing overhead where appropriate. In various embodiments, the magnitude of each offset can vary.

[0088] In various embodiments, electrical parameter adjustments are provided using frequency modulation in the digital domain. In a digital domain, a Direct Digital Synthesizer (DDS) can implement the frequency offsets or hops. In various other embodiments, frequency offsets or hops can be introduced using various circuitry. Such circuitry can include a voltage-controlled oscillator (VCO) to add frequency offsets to the RF signal output from RF generator 12a.

[0089] In various other embodiments, a feedback control loop within RF generator 12a can provide information for applying the offset frequencies and can apply frequencies dynamically, without reference to predetermined offsets. In order to implement such a system, existing frequency tuning methods, such as servo-based frequency tuning or dynamic frequency impedance information, are utilized. This impedance information can be used to prospectively adjust the frequency offset in order to correspondingly reduce the impedance fluctuations.

[0090] The various embodiments described above can be discussed with respect to dissipation of each various embodiment. Dissipation, in turn, varies in accordance with the reflected or reverse power P_REV. By minimizing reflected power, stress on the power supply components can be in turn reduced. Reflected power, in turn, correlates to the average reflection ratio. Accordingly the chart below indicates the reflection ratio of each embodiment, including a conventional tuning approach.

[0091]

	Tuning Approach	Ave. Reflection Ratio
	Conventional approach	0.54
	Tuning to a predetermined portion	0.64
	of the VBIAS waveform (such as a
	negative half cycle)
	Power modulation (such as blanking)	0.30
	Frequency offset/hopping	0.04

From the above, it can be seen that the power modulation and frequency offset approaches provide a relative improvement to the standard method of reducing reflected power. Tuning to a predetermined portion of the bias waveform may not reduce reflected power over the prior art approach, but it may offer additional actuators for controlling plasma behavior.

[0092] The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be executed in different order (or concurrently) without altering the principles of the present disclosure. Further, although each of the embodiments is described above as having certain features, any one or more of those features described with respect to any embodiment of the disclosure can be implemented in and/or combined with features of any of the other embodiments, even if that combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and permutations of one or more embodiments with one another remain within the scope of this disclosure.

[0093] Spatial and functional relationships between elements (for example, between modules, circuit elements, semiconductor layers, etc.) are described using various terms, including “connected,” “engaged,” “coupled,” “adjacent,” “next to,” “on top of,” “above,” “below,” and “disposed.” Unless explicitly described as being “direct,” when a relationship between first and second elements is described in the above disclosure, that relationship can be a direct relationship where no other intervening elements are present between the first and second elements, but can also be an indirect relationship where one or more intervening elements are present (either spatially or functionally) between the first and second elements. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean “at least one of A, at least one of B, and at least one of C.”

[0094] In the figures, the direction of an arrow, as indicated by the arrowhead, generally demonstrates the flow of information (such as data or instructions) that is of interest to the illustration. For example, when element A and element B exchange a variety of information but information transmitted from element A to element B is relevant to the illustration, the arrow may point from element A to element B. This unidirectional arrow does not imply that no other information is transmitted from element B to element A. Further, for information sent from element A to element B, element B may send requests for, or receipt acknowledgements of, the information to element A.

[0095] In this application, including the definitions below, the term “module” or the term “controller” may be replaced with the term “circuit.” The term “module” may refer to, be part of, or include: an Application Specific Integrated Circuit (ASIC); a digital, analog, or mixed analog/digital discrete circuit; a digital, analog, or mixed analog/digital integrated circuit; a combinational logic circuit; a field programmable gate array (FPGA); a processor circuit (shared, dedicated, or group) that executes code; a memory circuit (shared, dedicated, or group) that stores code executed by the processor circuit; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system-on-chip.

[0096] The module may include one or more interface circuits. In some examples, the interface circuits may include wired or wireless interfaces that are connected to a local area network (LAN), the Internet, a wide area network (WAN), or combinations thereof. The functionality of any given module of the present disclosure may be distributed among multiple modules that are connected via interface circuits. For example, multiple modules may allow load balancing. In a further example, a server (also known as remote, or cloud) module may accomplish some functionality on behalf of a client module.

[0097] The term code, as used above, may include software, firmware, and/or microcode, and may refer to programs, routines, functions, classes, data structures, and/or objects. The term shared processor circuit encompasses a single processor circuit that executes some or all code from multiple modules. The term group processor circuit encompasses a processor circuit that, in combination with additional processor circuits, executes some or all code from one or more modules. References to multiple processor circuits encompass multiple processor circuits on discrete dies, multiple processor circuits on a single die, multiple cores of a single processor circuit, multiple threads of a single processor circuit, or a combination of the above. The term shared memory circuit encompasses a single memory circuit that stores some or all code from multiple modules. The term group memory circuit encompasses a memory circuit that, in combination with additional memories, stores some or all code from one or more modules.

[0098] The term memory circuit is a subset of the term computer-readable medium. The term computer-readable medium, as used herein, does not encompass transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); the term computer-readable medium may therefore be considered tangible and non-transitory. Non-limiting examples of a non-transitory, tangible computer-readable medium are nonvolatile memory circuits (such as a flash memory circuit, an erasable programmable read-only memory circuit, or a mask read-only memory circuit), volatile memory circuits (such as a static random access memory circuit or a dynamic random access memory circuit), magnetic storage media (such as an analog or digital magnetic tape or a hard disk drive), and optical storage media (such as a CD, a DVD, or a Blu-ray Disc).

[0099] In this application, apparatus elements described as having particular attributes or performing particular operations are specifically configured to have those particular attributes and perform those particular operations. Specifically, a description of an element to perform an action means that the element is configured to perform the action. The configuration of an element may include programming of the element, such as by encoding instructions on a non-transitory, tangible computer-readable medium associated with the element.

[0100] The apparatuses and methods described in this application may be partially or fully implemented by a special purpose computer created by configuring a general purpose computer to execute one or more particular functions embodied in computer programs. The functional blocks, flowchart components, and other elements described above serve as software specifications, which can be translated into the computer programs by the routine work of a skilled technician or programmer.

[0101] The computer programs include processor-executable instructions that are stored on at least one non-transitory, tangible computer-readable medium. The computer programs may also include or rely on stored data. The computer programs may encompass a basic input/output system (BIOS) that interacts with hardware of the special purpose computer, device drivers that interact with particular devices of the special purpose computer, one or more operating systems, user applications, background services, background applications, etc.

[0102] The computer programs may include: (i) descriptive text to be parsed, such as HTML (hypertext markup language), XML (extensible markup language), or JSON (JavaScript Object Notation) (ii) assembly code, (iii) object code generated from source code by a compiler, (iv) source code for execution by an interpreter, (v) source code for compilation and execution by a just-in-time compiler, etc. As examples only, source code may be written using syntax from languages including C, C++, C #, Objective-C, Swift, Haskell, Go, SQL, R, Lisp, Java®, Fortran, Perl, Pascal, Curl, OCaml, Javascript®, HTML5 (Hypertext Markup Language 5th revision), Ada, ASP (Active Server Pages), PHP (PHP: Hypertext Preprocessor), Scala, Eiffel, Smalltalk, Erlang, Ruby, Flash®, Visual Basic®, Lua, MATLAB, SIMULINK, and Python®.